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\hypertarget{classdisplay__driver__w__decoder}{}\section{display\+\_\+driver\+\_\+w\+\_\+decoder Entity Reference}
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\label{classdisplay__driver__w__decoder}\index{display\+\_\+driver\+\_\+w\+\_\+decoder@{display\+\_\+driver\+\_\+w\+\_\+decoder}}
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Top entity of the display driver.
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Inheritance diagram for display\+\_\+driver\+\_\+w\+\_\+decoder\+:\nopagebreak
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\begin{figure}[H]
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\begin{center}
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\leavevmode
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\includegraphics[width=207pt]{classdisplay__driver__w__decoder__inherit__graph}
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\end{center}
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\end{figure}
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Collaboration diagram for display\+\_\+driver\+\_\+w\+\_\+decoder\+:\nopagebreak
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\begin{figure}[H]
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\begin{center}
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\leavevmode
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\includegraphics[width=207pt]{classdisplay__driver__w__decoder__coll__graph}
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\end{center}
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\end{figure}
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\subsection*{Entities}
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\begin{DoxyCompactItemize}
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\item
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\hyperlink{classdisplay__driver__w__decoder_1_1display__driver__w__decoder__arch}{display\+\_\+driver\+\_\+w\+\_\+decoder\+\_\+arch} architecture
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\begin{DoxyCompactList}\small\item\em Architecture definition of the \hyperlink{classdisplay__driver__w__decoder}{display\+\_\+driver\+\_\+w\+\_\+decoder}. \end{DoxyCompactList}\end{DoxyCompactItemize}
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\subsection*{Libraries}
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\begin{DoxyCompactItemize}
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\item
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\mbox{\Hypertarget{classdisplay__driver__w__decoder_a0a6af6eef40212dbaf130d57ce711256}\label{classdisplay__driver__w__decoder_a0a6af6eef40212dbaf130d57ce711256}}
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\hyperlink{classdisplay__driver__w__decoder_a0a6af6eef40212dbaf130d57ce711256}{ieee}
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\end{DoxyCompactItemize}
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\subsection*{Use Clauses}
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\begin{DoxyCompactItemize}
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\item
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\mbox{\Hypertarget{classdisplay__driver__w__decoder_acd03516902501cd1c7296a98e22c6fcb}\label{classdisplay__driver__w__decoder_acd03516902501cd1c7296a98e22c6fcb}}
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\hyperlink{classdisplay__driver__w__decoder_acd03516902501cd1c7296a98e22c6fcb}{std\+\_\+logic\+\_\+1164}
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\item
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\mbox{\Hypertarget{classdisplay__driver__w__decoder_a2edc34402b573437d5f25fa90ba4013e}\label{classdisplay__driver__w__decoder_a2edc34402b573437d5f25fa90ba4013e}}
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\hyperlink{classdisplay__driver__w__decoder_a2edc34402b573437d5f25fa90ba4013e}{numeric\+\_\+std}
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\end{DoxyCompactItemize}
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\subsection*{Ports}
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\begin{DoxyCompactItemize}
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\item
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\mbox{\Hypertarget{classdisplay__driver__w__decoder_a4a4609c199d30b3adebbeb3a01276ec5}\label{classdisplay__driver__w__decoder_a4a4609c199d30b3adebbeb3a01276ec5}}
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\hyperlink{classdisplay__driver__w__decoder_a4a4609c199d30b3adebbeb3a01276ec5}{clk} {\bfseries {\bfseries \textcolor{keywordflow}{in}\textcolor{vhdlchar}{ }}} {\bfseries \textcolor{comment}{std\+\_\+logic}\textcolor{vhdlchar}{ }}
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\begin{DoxyCompactList}\small\item\em input clock, xx M\+Hz. \end{DoxyCompactList}\item
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\mbox{\Hypertarget{classdisplay__driver__w__decoder_aad8dc6359d9e23dabcbf342fadf2fa06}\label{classdisplay__driver__w__decoder_aad8dc6359d9e23dabcbf342fadf2fa06}}
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\hyperlink{classdisplay__driver__w__decoder_aad8dc6359d9e23dabcbf342fadf2fa06}{reset} {\bfseries {\bfseries \textcolor{keywordflow}{in}\textcolor{vhdlchar}{ }}} {\bfseries \textcolor{comment}{std\+\_\+logic}\textcolor{vhdlchar}{ }}
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\begin{DoxyCompactList}\small\item\em active high \end{DoxyCompactList}\item
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\mbox{\Hypertarget{classdisplay__driver__w__decoder_a11737d50bbf001c0d64a327a2afca193}\label{classdisplay__driver__w__decoder_a11737d50bbf001c0d64a327a2afca193}}
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\hyperlink{classdisplay__driver__w__decoder_a11737d50bbf001c0d64a327a2afca193}{ascii\+\_\+in} {\bfseries {\bfseries \textcolor{keywordflow}{in}\textcolor{vhdlchar}{ }}} {\bfseries \textcolor{comment}{std\+\_\+logic\+\_\+vector}\textcolor{vhdlchar}{ }\textcolor{vhdlchar}{(}\textcolor{vhdlchar}{ }\textcolor{vhdlchar}{ } \textcolor{vhdldigit}{7} \textcolor{vhdlchar}{ }\textcolor{keywordflow}{downto}\textcolor{vhdlchar}{ }\textcolor{vhdlchar}{ } \textcolor{vhdldigit}{0} \textcolor{vhdlchar}{ }\textcolor{vhdlchar}{)}\textcolor{vhdlchar}{ }}
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\begin{DoxyCompactList}\small\item\em input A\+S\+C\+II code to display \end{DoxyCompactList}\item
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\mbox{\Hypertarget{classdisplay__driver__w__decoder_a8f9235710fc037196ed1f7fa93aa0ef3}\label{classdisplay__driver__w__decoder_a8f9235710fc037196ed1f7fa93aa0ef3}}
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\hyperlink{classdisplay__driver__w__decoder_a8f9235710fc037196ed1f7fa93aa0ef3}{wr\+\_\+en} {\bfseries {\bfseries \textcolor{keywordflow}{in}\textcolor{vhdlchar}{ }}} {\bfseries \textcolor{comment}{std\+\_\+logic}\textcolor{vhdlchar}{ }}
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\begin{DoxyCompactList}\small\item\em active high write enable to store the A\+S\+C\+II code in a register \end{DoxyCompactList}\item
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\hyperlink{classdisplay__driver__w__decoder_ae5d1871b211b0ea1a0592bd84db8cfd9}{disp\+\_\+data\+\_\+q} {\bfseries {\bfseries \textcolor{keywordflow}{out}\textcolor{vhdlchar}{ }}} {\bfseries \textcolor{comment}{std\+\_\+logic\+\_\+vector}\textcolor{vhdlchar}{ }\textcolor{vhdlchar}{(}\textcolor{vhdlchar}{ }\textcolor{vhdlchar}{ } \textcolor{vhdldigit}{14} \textcolor{vhdlchar}{ }\textcolor{keywordflow}{downto}\textcolor{vhdlchar}{ }\textcolor{vhdlchar}{ } \textcolor{vhdldigit}{0} \textcolor{vhdlchar}{ }\textcolor{vhdlchar}{)}\textcolor{vhdlchar}{ }}
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\item
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\hyperlink{classdisplay__driver__w__decoder_ac39d5faa22b7c7b88914e8915f901d69}{disp\+\_\+sel} {\bfseries {\bfseries \textcolor{keywordflow}{out}\textcolor{vhdlchar}{ }}} {\bfseries \textcolor{comment}{std\+\_\+logic}\textcolor{vhdlchar}{ }}
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\end{DoxyCompactItemize}
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\subsection{Detailed Description}
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Top entity of the display driver.
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Top entity of the decoder architecture. Module description also goes here.
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\subsection{Member Data Documentation}
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\mbox{\Hypertarget{classdisplay__driver__w__decoder_ae5d1871b211b0ea1a0592bd84db8cfd9}\label{classdisplay__driver__w__decoder_ae5d1871b211b0ea1a0592bd84db8cfd9}}
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\index{display\+\_\+driver\+\_\+w\+\_\+decoder@{display\+\_\+driver\+\_\+w\+\_\+decoder}!disp\+\_\+data\+\_\+q@{disp\+\_\+data\+\_\+q}}
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\index{disp\+\_\+data\+\_\+q@{disp\+\_\+data\+\_\+q}!display\+\_\+driver\+\_\+w\+\_\+decoder@{display\+\_\+driver\+\_\+w\+\_\+decoder}}
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\subsubsection{\texorpdfstring{disp\+\_\+data\+\_\+q}{disp\_data\_q}}
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{\footnotesize\ttfamily \hyperlink{classdisplay__driver__w__decoder_ae5d1871b211b0ea1a0592bd84db8cfd9}{disp\+\_\+data\+\_\+q} {\bfseries \textcolor{keywordflow}{out}\textcolor{vhdlchar}{ }} {\bfseries \textcolor{comment}{std\+\_\+logic\+\_\+vector}\textcolor{vhdlchar}{ }\textcolor{vhdlchar}{(}\textcolor{vhdlchar}{ }\textcolor{vhdlchar}{ } \textcolor{vhdldigit}{14} \textcolor{vhdlchar}{ }\textcolor{keywordflow}{downto}\textcolor{vhdlchar}{ }\textcolor{vhdlchar}{ } \textcolor{vhdldigit}{0} \textcolor{vhdlchar}{ }\textcolor{vhdlchar}{)}\textcolor{vhdlchar}{ }} \hspace{0.3cm}{\ttfamily [Port]}}
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Typically the data fed to display (single or multiple) is provided for single display at a time. If multiple displays are required disp\+\_\+sel signal must be provided (according typical dynamic display indication).\hypertarget{index_disp_data_bit_mapping}{}\subsection{Display Segment Bit Mapping}\label{index_disp_data_bit_mapping}
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\tabulinesep=1mm
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\begin{longtabu} spread 0pt [c]{*{16}{|X[-1]}|}
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\hline
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\rowcolor{\tableheadbgcolor}\PBS\centering \textbf{ Bit Number }&\PBS\centering \textbf{ 14}&\PBS\centering \textbf{ 13}&\PBS\centering \textbf{ 12}&\PBS\centering \textbf{ 11}&\PBS\centering \textbf{ 10}&\PBS\centering \textbf{ 9}&\PBS\centering \textbf{ 8}&\PBS\centering \textbf{ 7}&\PBS\centering \textbf{ 6}&\PBS\centering \textbf{ 5}&\PBS\centering \textbf{ 4}&\PBS\centering \textbf{ 3}&\PBS\centering \textbf{ 2}&\PBS\centering \textbf{ 1}&\PBS\centering \textbf{ 0 }\\\cline{1-16}
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\endfirsthead
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\hline
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\endfoot
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\hline
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\rowcolor{\tableheadbgcolor}\PBS\centering \textbf{ Bit Number }&\PBS\centering \textbf{ 14}&\PBS\centering \textbf{ 13}&\PBS\centering \textbf{ 12}&\PBS\centering \textbf{ 11}&\PBS\centering \textbf{ 10}&\PBS\centering \textbf{ 9}&\PBS\centering \textbf{ 8}&\PBS\centering \textbf{ 7}&\PBS\centering \textbf{ 6}&\PBS\centering \textbf{ 5}&\PBS\centering \textbf{ 4}&\PBS\centering \textbf{ 3}&\PBS\centering \textbf{ 2}&\PBS\centering \textbf{ 1}&\PBS\centering \textbf{ 0 }\\\cline{1-16}
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\endhead
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\PBS\centering Display Segment&\PBS\centering dp&\PBS\centering m&\PBS\centering l&\PBS\centering k&\PBS\centering j&\PBS\centering i&\PBS\centering h&\PBS\centering g2&\PBS\centering g1&\PBS\centering f&\PBS\centering e&\PBS\centering d&\PBS\centering c&\PBS\centering b&\PBS\centering a \\\cline{1-16}
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\end{longtabu}
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Note that there is no standard way to name the segments. Current data bits correspondt to display segments according this picture\+: \href{https://www.maximintegrated.com/en/images/appnotes/3211/3211Fig02.gif}{\tt https\+://www.\+maximintegrated.\+com/en/images/appnotes/3211/3211\+Fig02.\+gif} \mbox{\Hypertarget{classdisplay__driver__w__decoder_ac39d5faa22b7c7b88914e8915f901d69}\label{classdisplay__driver__w__decoder_ac39d5faa22b7c7b88914e8915f901d69}}
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\index{display\+\_\+driver\+\_\+w\+\_\+decoder@{display\+\_\+driver\+\_\+w\+\_\+decoder}!disp\+\_\+sel@{disp\+\_\+sel}}
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\index{disp\+\_\+sel@{disp\+\_\+sel}!display\+\_\+driver\+\_\+w\+\_\+decoder@{display\+\_\+driver\+\_\+w\+\_\+decoder}}
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\subsubsection{\texorpdfstring{disp\+\_\+sel}{disp\_sel}}
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{\footnotesize\ttfamily \hyperlink{classdisplay__driver__w__decoder_ac39d5faa22b7c7b88914e8915f901d69}{disp\+\_\+sel} {\bfseries \textcolor{keywordflow}{out}\textcolor{vhdlchar}{ }} {\bfseries \textcolor{comment}{std\+\_\+logic}\textcolor{vhdlchar}{ }} \hspace{0.3cm}{\ttfamily [Port]}}
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If more displays needs to be fed change disp\+\_\+sel to vector with length equal to number of displays. Use principles of the standard dynamic indication\+: provide data then enable the displays sequentially. If brightness control is desired just A\+ND the selector and the P\+WM controller output.
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The documentation for this class was generated from the following file\+:\begin{DoxyCompactItemize}
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\item
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C\+:/\+Projects/single-\/14-\/segment-\/display-\/driver-\/w-\/decoder/\+Project/\+Sources/\hyperlink{_display_driverw_decoder___top_8vhd}{Display\+Driverw\+Decoder\+\_\+\+Top.\+vhd}\end{DoxyCompactItemize}
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