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<HTML>
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<HEAD><TITLE>Lattice Map TRACE Report</TITLE>
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</HEAD>
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<PRE><A name="Map_Twr"></A><B><U><big>Map TRACE Report</big></U></B>
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Loading design for application trce from file displaydriverwdecoder_impl1_map.ncd.
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Design name: DisplayDriverWrapper
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NCD version: 3.3
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Vendor: LATTICE
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Device: LFE5UM5G-45F
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Package: CABGA381
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Performance: 8
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Loading device for application trce from file 'sa5p45m.nph' in environment: C:/lscc/diamond/3.8_x64/ispfpga.
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Package Status: Final Version 1.36.
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Performance Hardware Data Status: Final Version 50.1.
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Setup and Hold Report
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--------------------------------------------------------------------------------
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<A name="Map_Twr_setup"></A><B><U><big>Lattice TRACE Report - Setup, Version Diamond (64-bit) 3.8.0.115.3</big></U></B>
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Fri Jan 13 00:54:52 2017
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Copyright (c) 1991-1994 by NeoCAD Inc. All rights reserved.
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Copyright (c) 1995 AT&T Corp. All rights reserved.
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Copyright (c) 1995-2001 Lucent Technologies Inc. All rights reserved.
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Copyright (c) 2001 Agere Systems All rights reserved.
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Copyright (c) 2002-2016 Lattice Semiconductor Corporation, All rights reserved.
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<A name="mtw1_set_ri"></A><B><U><big>Report Information</big></U></B>
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------------------
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Command line: trce -v 1 -gt -mapchkpnt 0 -sethld -o DisplayDriverwDecoder_impl1.tw1 -gui -msgset C:/Projects/single-14-segment-display-driver-w-decoder/Project/Lattice_FPGA_Build/promote.xml DisplayDriverwDecoder_impl1_map.ncd DisplayDriverwDecoder_impl1.prf
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Design file: displaydriverwdecoder_impl1_map.ncd
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Preference file: displaydriverwdecoder_impl1.prf
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Device,speed: LFE5UM5G-45F,8
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Report level: verbose report, limited to 1 item per preference
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--------------------------------------------------------------------------------
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<A name="mtw1_set_ps"></A><B><U><big>Preference Summary</big></U></B>
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<LI><A href='#map_twr_pref_0_0' Target='right'>Default path enumeration(0 errors)</A></LI> 0 items scored, 0 timing errors detected.
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<LI><A href='#map_twr_pref_0_1' Target='right'>Default net enumeration(0 errors)</A></LI> 0 items scored, 0 timing errors detected.
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BLOCK ASYNCPATHS
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BLOCK RESETPATHS
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--------------------------------------------------------------------------------
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================================================================================
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<A name="map_twr_pref_0_0"></A>Preference: Default path enumeration
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0 items scored, 0 timing errors detected.
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--------------------------------------------------------------------------------
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================================================================================
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<A name="map_twr_pref_0_1"></A>Preference: Default net enumeration
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0 items scored, 0 timing errors detected.
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--------------------------------------------------------------------------------
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<A name="mtw1_set_rs"></A><B><U><big>Report Summary</big></U></B>
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--------------
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Preference | Constraint| Actual|Levels
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----------------------------------------------------------------------------
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Default net enumeration | -| -| 0
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----------------------------------------------------------------------------
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All preferences were met.
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<A name="mtw1_set_clkda"></A><B><U><big>Clock Domains Analysis</big></U></B>
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------------------------
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Found 0 clocks:
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<A name="mtw1_set_ts"></A><B><U><big>Timing summary (Setup):</big></U></B>
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---------------
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Timing errors: 0 Score: 0
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Cumulative negative slack: 0
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Constraints cover 0 paths, 0 nets, and 0 connections (100.00% coverage)
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