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<HTML> <HEAD><TITLE></TITLE> <STYLE TYPE="text/css"> <!-- body,pre{ font-family:'Courier New', monospace; color: #000000; font-size:88%; background-color: #ffffff; } h1 { font-weight: bold; margin-top: 24px; margin-bottom: 10px; border-bottom: 3px solid #000; font-size: 1em; } h2 { font-weight: bold; margin-top: 18px; margin-bottom: 5px; font-size: 0.90em; } h3 { font-weight: bold; margin-top: 12px; margin-bottom: 5px; font-size: 0.80em; } p { font-size:78%; } P.Table { margin-top: 4px; margin-bottom: 4px; margin-right: 4px; margin-left: 4px; } table { border-width: 1px 1px 1px 1px; border-style: solid solid solid solid; border-color: black black black black; border-collapse: collapse; } th { font-weight:bold; padding: 4px; border-width: 1px 1px 1px 1px; border-style: solid solid solid solid; border-color: black black black black; vertical-align:top; text-align:left; font-size:78%; } td { padding: 4px; border-width: 1px 1px 1px 1px; border-style: solid solid solid solid; border-color: black black black black; vertical-align:top; font-size:78%; } a { color:#013C9A; text-decoration:none; } a:visited { color:#013C9A; } a:hover, a:active { text-decoration:underline; color:#5BAFD4; } .pass { background-color: #00ff00; } .fail { background-color: #ff0000; } .comment { font-size: 90%; font-style: italic; } --> </STYLE> </HEAD> <BODY> <PRE>Setting log file to 'C:/Projects/single-14-segment-display-driver-w-decoder/Project/Lattice_FPGA_Build/impl1/hdla_gen_hierarchy.html'.
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Starting: parse design source files
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(VHDL-1481) Analyzing VHDL file C:/lscc/diamond/3.8_x64/ispfpga/vhdl_packages/standard.vhd
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/vhdl_packages/standard.vhd(9,9-9,17) (VHDL-1014) analyzing package standard
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(VHDL-1481) Analyzing VHDL file C:/lscc/diamond/3.8_x64/ispfpga/vhdl_packages/std_1164.vhd
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/vhdl_packages/std_1164.vhd(15,9-15,23) (VHDL-1014) analyzing package std_logic_1164
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/vhdl_packages/std_1164.vhd(178,14-178,28) (VHDL-1013) analyzing package body std_logic_1164
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(VHDL-1481) Analyzing VHDL file C:/lscc/diamond/3.8_x64/ispfpga/vhdl_packages/mgc_qsim.vhd
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/vhdl_packages/mgc_qsim.vhd(18,9-18,19) (VHDL-1014) analyzing package qsim_logic
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/vhdl_packages/mgc_qsim.vhd(753,14-753,24) (VHDL-1013) analyzing package body qsim_logic
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(VHDL-1481) Analyzing VHDL file C:/lscc/diamond/3.8_x64/ispfpga/vhdl_packages/numeric_bit.vhd
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/vhdl_packages/numeric_bit.vhd(54,9-54,20) (VHDL-1014) analyzing package numeric_bit
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/vhdl_packages/numeric_bit.vhd(834,14-834,25) (VHDL-1013) analyzing package body numeric_bit
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(VHDL-1481) Analyzing VHDL file C:/lscc/diamond/3.8_x64/ispfpga/vhdl_packages/numeric_std.vhd
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/vhdl_packages/numeric_std.vhd(57,9-57,20) (VHDL-1014) analyzing package numeric_std
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/vhdl_packages/numeric_std.vhd(874,14-874,25) (VHDL-1013) analyzing package body numeric_std
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(VHDL-1481) Analyzing VHDL file C:/lscc/diamond/3.8_x64/ispfpga/vhdl_packages/textio.vhd
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/vhdl_packages/textio.vhd(13,9-13,15) (VHDL-1014) analyzing package textio
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/vhdl_packages/textio.vhd(114,14-114,20) (VHDL-1013) analyzing package body textio
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(VHDL-1481) Analyzing VHDL file C:/lscc/diamond/3.8_x64/ispfpga/vhdl_packages/std_logic_textio.vhd
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/vhdl_packages/std_logic_textio.vhd(26,9-26,25) (VHDL-1014) analyzing package std_logic_textio
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/vhdl_packages/std_logic_textio.vhd(72,14-72,30) (VHDL-1013) analyzing package body std_logic_textio
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(VHDL-1481) Analyzing VHDL file C:/lscc/diamond/3.8_x64/ispfpga/vhdl_packages/syn_attr.vhd
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/vhdl_packages/syn_attr.vhd(39,9-39,19) (VHDL-1014) analyzing package attributes
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(VHDL-1481) Analyzing VHDL file C:/lscc/diamond/3.8_x64/ispfpga/vhdl_packages/syn_misc.vhd
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/vhdl_packages/syn_misc.vhd(30,9-30,23) (VHDL-1014) analyzing package std_logic_misc
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/vhdl_packages/syn_misc.vhd(182,14-182,28) (VHDL-1013) analyzing package body std_logic_misc
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INFO - ./.__tmp_vxr_0_(56,9-56,18) (VHDL-1014) analyzing package math_real
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INFO - ./.__tmp_vxr_0_(685,14-685,23) (VHDL-1013) analyzing package body math_real
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(VHDL-1481) Analyzing VHDL file C:/lscc/diamond/3.8_x64/ispfpga/vhdl_packages/mixed_lang_vltype.vhd
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/vhdl_packages/mixed_lang_vltype.vhd(9,9-9,17) (VHDL-1014) analyzing package vl_types
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/vhdl_packages/mixed_lang_vltype.vhd(88,14-88,22) (VHDL-1013) analyzing package body vl_types
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(VHDL-1481) Analyzing VHDL file C:/lscc/diamond/3.8_x64/ispfpga/vhdl_packages/syn_arit.vhd
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/vhdl_packages/syn_arit.vhd(25,9-25,24) (VHDL-1014) analyzing package std_logic_arith
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/vhdl_packages/syn_arit.vhd(206,14-206,29) (VHDL-1013) analyzing package body std_logic_arith
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(VHDL-1481) Analyzing VHDL file C:/lscc/diamond/3.8_x64/ispfpga/vhdl_packages/syn_sign.vhd
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/vhdl_packages/syn_sign.vhd(35,9-35,25) (VHDL-1014) analyzing package std_logic_signed
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/vhdl_packages/syn_sign.vhd(96,14-96,30) (VHDL-1013) analyzing package body std_logic_signed
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(VHDL-1481) Analyzing VHDL file C:/lscc/diamond/3.8_x64/ispfpga/vhdl_packages/syn_unsi.vhd
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/vhdl_packages/syn_unsi.vhd(35,9-35,27) (VHDL-1014) analyzing package std_logic_unsigned
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/vhdl_packages/syn_unsi.vhd(94,14-94,32) (VHDL-1013) analyzing package body std_logic_unsigned
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(VHDL-1481) Analyzing VHDL file C:/lscc/diamond/3.8_x64/ispfpga/vhdl_packages/synattr.vhd
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/vhdl_packages/synattr.vhd(50,9-50,19) (VHDL-1014) analyzing package attributes
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(VERI-1482) Analyzing Verilog file C:/lscc/diamond/3.8_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/ecp5um.v
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(VHDL-1481) Analyzing VHDL file C:/lscc/diamond/3.8_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/ecp5um.vhd
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(VHDL-1481) Analyzing VHDL file C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/Decoding_Table/ROM_ASCII_Decoder/DistRomAsciiDecoder/DistRomAsciiDecoder/DistRomAsciiDecoder.vhd
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INFO - C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/Decoding_Table/ROM_ASCII_Decoder/DistRomAsciiDecoder/DistRomAsciiDecoder/DistRomAsciiDecoder.vhd(12,8-12,27) (VHDL-1012) analyzing entity distromasciidecoder
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INFO - C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/Decoding_Table/ROM_ASCII_Decoder/DistRomAsciiDecoder/DistRomAsciiDecoder/DistRomAsciiDecoder.vhd(18,14-18,23) (VHDL-1010) analyzing architecture structure
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(VHDL-1481) Analyzing VHDL file C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/ASCIIDecoder.vhd
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INFO - C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/ASCIIDecoder.vhd(15,8-15,20) (VHDL-1012) analyzing entity asciidecoder
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INFO - C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/ASCIIDecoder.vhd(28,14-28,18) (VHDL-1010) analyzing architecture arch
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(VHDL-1481) Analyzing VHDL file C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/DisplayDriverwDecoder_Top.vhd
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INFO - C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/DisplayDriverwDecoder_Top.vhd(16,8-16,33) (VHDL-1012) analyzing entity displaydriverwdecoder_top
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INFO - C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/DisplayDriverwDecoder_Top.vhd(51,14-51,18) (VHDL-1010) analyzing architecture arch
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(VHDL-1481) Analyzing VHDL file C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/DisplayDriverWrapper.vhd
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INFO - C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/DisplayDriverWrapper.vhd(15,8-15,28) (VHDL-1012) analyzing entity displaydriverwrapper
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INFO - C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/DisplayDriverWrapper.vhd(37,14-37,18) (VHDL-1010) analyzing architecture arch
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INFO - C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/DisplayDriverWrapper.vhd(15,8-15,28) (VHDL-1067) elaborating DisplayDriverWrapper(arch)
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INFO - C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/DisplayDriverwDecoder_Top.vhd(16,8-16,33) (VHDL-1067) elaborating DisplayDriverwDecoder_Top_uniq_0(arch)
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INFO - C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/ASCIIDecoder.vhd(15,8-15,20) (VHDL-1067) elaborating ASCIIDecoder_uniq_0(arch)
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INFO - C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/Decoding_Table/ROM_ASCII_Decoder/DistRomAsciiDecoder/DistRomAsciiDecoder/DistRomAsciiDecoder.vhd(12,8-12,27) (VHDL-1067) elaborating DistRomAsciiDecoder_uniq_0(Structure)
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INFO - C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/Decoding_Table/ROM_ASCII_Decoder/DistRomAsciiDecoder/DistRomAsciiDecoder/DistRomAsciiDecoder.vhd(25,5-29,42) (VHDL-1399) going to verilog side to elaborate module ROM128X1A
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/ecp5um.v(698,8-698,17) (VERI-1018) compiling module ROM128X1A_uniq_1
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/ecp5um.v(698,1-708,10) (VERI-9000) elaborating module 'ROM128X1A_uniq_1'
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INFO - C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/Decoding_Table/ROM_ASCII_Decoder/DistRomAsciiDecoder/DistRomAsciiDecoder/DistRomAsciiDecoder.vhd(25,5-29,42) (VHDL-1400) back to vhdl to continue elaboration
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INFO - C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/Decoding_Table/ROM_ASCII_Decoder/DistRomAsciiDecoder/DistRomAsciiDecoder/DistRomAsciiDecoder.vhd(31,5-35,42) (VHDL-1399) going to verilog side to elaborate module ROM128X1A
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/ecp5um.v(698,8-698,17) (VERI-1018) compiling module ROM128X1A_uniq_2
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/ecp5um.v(698,1-708,10) (VERI-9000) elaborating module 'ROM128X1A_uniq_2'
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INFO - C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/Decoding_Table/ROM_ASCII_Decoder/DistRomAsciiDecoder/DistRomAsciiDecoder/DistRomAsciiDecoder.vhd(31,5-35,42) (VHDL-1400) back to vhdl to continue elaboration
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INFO - C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/Decoding_Table/ROM_ASCII_Decoder/DistRomAsciiDecoder/DistRomAsciiDecoder/DistRomAsciiDecoder.vhd(37,5-41,42) (VHDL-1399) going to verilog side to elaborate module ROM128X1A
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/ecp5um.v(698,8-698,17) (VERI-1018) compiling module ROM128X1A_uniq_3
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/ecp5um.v(698,1-708,10) (VERI-9000) elaborating module 'ROM128X1A_uniq_3'
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INFO - C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/Decoding_Table/ROM_ASCII_Decoder/DistRomAsciiDecoder/DistRomAsciiDecoder/DistRomAsciiDecoder.vhd(37,5-41,42) (VHDL-1400) back to vhdl to continue elaboration
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INFO - C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/Decoding_Table/ROM_ASCII_Decoder/DistRomAsciiDecoder/DistRomAsciiDecoder/DistRomAsciiDecoder.vhd(43,5-47,42) (VHDL-1399) going to verilog side to elaborate module ROM128X1A
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/ecp5um.v(698,8-698,17) (VERI-1018) compiling module ROM128X1A_uniq_4
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/ecp5um.v(698,1-708,10) (VERI-9000) elaborating module 'ROM128X1A_uniq_4'
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INFO - C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/Decoding_Table/ROM_ASCII_Decoder/DistRomAsciiDecoder/DistRomAsciiDecoder/DistRomAsciiDecoder.vhd(43,5-47,42) (VHDL-1400) back to vhdl to continue elaboration
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INFO - C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/Decoding_Table/ROM_ASCII_Decoder/DistRomAsciiDecoder/DistRomAsciiDecoder/DistRomAsciiDecoder.vhd(49,5-53,41) (VHDL-1399) going to verilog side to elaborate module ROM128X1A
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/ecp5um.v(698,8-698,17) (VERI-1018) compiling module ROM128X1A_uniq_5
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/ecp5um.v(698,1-708,10) (VERI-9000) elaborating module 'ROM128X1A_uniq_5'
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INFO - C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/Decoding_Table/ROM_ASCII_Decoder/DistRomAsciiDecoder/DistRomAsciiDecoder/DistRomAsciiDecoder.vhd(49,5-53,41) (VHDL-1400) back to vhdl to continue elaboration
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INFO - C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/Decoding_Table/ROM_ASCII_Decoder/DistRomAsciiDecoder/DistRomAsciiDecoder/DistRomAsciiDecoder.vhd(55,5-59,41) (VHDL-1399) going to verilog side to elaborate module ROM128X1A
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/ecp5um.v(698,8-698,17) (VERI-1018) compiling module ROM128X1A_uniq_6
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/ecp5um.v(698,1-708,10) (VERI-9000) elaborating module 'ROM128X1A_uniq_6'
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INFO - C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/Decoding_Table/ROM_ASCII_Decoder/DistRomAsciiDecoder/DistRomAsciiDecoder/DistRomAsciiDecoder.vhd(55,5-59,41) (VHDL-1400) back to vhdl to continue elaboration
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INFO - C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/Decoding_Table/ROM_ASCII_Decoder/DistRomAsciiDecoder/DistRomAsciiDecoder/DistRomAsciiDecoder.vhd(61,5-65,41) (VHDL-1399) going to verilog side to elaborate module ROM128X1A
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/ecp5um.v(698,8-698,17) (VERI-1018) compiling module ROM128X1A_uniq_7
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/ecp5um.v(698,1-708,10) (VERI-9000) elaborating module 'ROM128X1A_uniq_7'
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INFO - C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/Decoding_Table/ROM_ASCII_Decoder/DistRomAsciiDecoder/DistRomAsciiDecoder/DistRomAsciiDecoder.vhd(61,5-65,41) (VHDL-1400) back to vhdl to continue elaboration
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| 90 |
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INFO - C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/Decoding_Table/ROM_ASCII_Decoder/DistRomAsciiDecoder/DistRomAsciiDecoder/DistRomAsciiDecoder.vhd(67,5-71,41) (VHDL-1399) going to verilog side to elaborate module ROM128X1A
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| 91 |
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/ecp5um.v(698,8-698,17) (VERI-1018) compiling module ROM128X1A_uniq_8
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| 92 |
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/ecp5um.v(698,1-708,10) (VERI-9000) elaborating module 'ROM128X1A_uniq_8'
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| 93 |
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INFO - C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/Decoding_Table/ROM_ASCII_Decoder/DistRomAsciiDecoder/DistRomAsciiDecoder/DistRomAsciiDecoder.vhd(67,5-71,41) (VHDL-1400) back to vhdl to continue elaboration
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| 94 |
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INFO - C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/Decoding_Table/ROM_ASCII_Decoder/DistRomAsciiDecoder/DistRomAsciiDecoder/DistRomAsciiDecoder.vhd(73,5-77,41) (VHDL-1399) going to verilog side to elaborate module ROM128X1A
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| 95 |
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/ecp5um.v(698,8-698,17) (VERI-1018) compiling module ROM128X1A_uniq_9
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| 96 |
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/ecp5um.v(698,1-708,10) (VERI-9000) elaborating module 'ROM128X1A_uniq_9'
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| 97 |
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INFO - C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/Decoding_Table/ROM_ASCII_Decoder/DistRomAsciiDecoder/DistRomAsciiDecoder/DistRomAsciiDecoder.vhd(73,5-77,41) (VHDL-1400) back to vhdl to continue elaboration
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| 98 |
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INFO - C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/Decoding_Table/ROM_ASCII_Decoder/DistRomAsciiDecoder/DistRomAsciiDecoder/DistRomAsciiDecoder.vhd(79,5-83,41) (VHDL-1399) going to verilog side to elaborate module ROM128X1A
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| 99 |
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/ecp5um.v(698,8-698,17) (VERI-1018) compiling module ROM128X1A_uniq_10
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/ecp5um.v(698,1-708,10) (VERI-9000) elaborating module 'ROM128X1A_uniq_10'
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| 101 |
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INFO - C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/Decoding_Table/ROM_ASCII_Decoder/DistRomAsciiDecoder/DistRomAsciiDecoder/DistRomAsciiDecoder.vhd(79,5-83,41) (VHDL-1400) back to vhdl to continue elaboration
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| 102 |
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INFO - C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/Decoding_Table/ROM_ASCII_Decoder/DistRomAsciiDecoder/DistRomAsciiDecoder/DistRomAsciiDecoder.vhd(85,5-89,41) (VHDL-1399) going to verilog side to elaborate module ROM128X1A
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| 103 |
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/ecp5um.v(698,8-698,17) (VERI-1018) compiling module ROM128X1A_uniq_11
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| 104 |
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/ecp5um.v(698,1-708,10) (VERI-9000) elaborating module 'ROM128X1A_uniq_11'
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| 105 |
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INFO - C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/Decoding_Table/ROM_ASCII_Decoder/DistRomAsciiDecoder/DistRomAsciiDecoder/DistRomAsciiDecoder.vhd(85,5-89,41) (VHDL-1400) back to vhdl to continue elaboration
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| 106 |
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INFO - C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/Decoding_Table/ROM_ASCII_Decoder/DistRomAsciiDecoder/DistRomAsciiDecoder/DistRomAsciiDecoder.vhd(91,5-95,41) (VHDL-1399) going to verilog side to elaborate module ROM128X1A
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| 107 |
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/ecp5um.v(698,8-698,17) (VERI-1018) compiling module ROM128X1A_uniq_12
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| 108 |
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/ecp5um.v(698,1-708,10) (VERI-9000) elaborating module 'ROM128X1A_uniq_12'
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| 109 |
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INFO - C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/Decoding_Table/ROM_ASCII_Decoder/DistRomAsciiDecoder/DistRomAsciiDecoder/DistRomAsciiDecoder.vhd(91,5-95,41) (VHDL-1400) back to vhdl to continue elaboration
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| 110 |
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INFO - C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/Decoding_Table/ROM_ASCII_Decoder/DistRomAsciiDecoder/DistRomAsciiDecoder/DistRomAsciiDecoder.vhd(97,5-101,41) (VHDL-1399) going to verilog side to elaborate module ROM128X1A
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| 111 |
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/ecp5um.v(698,8-698,17) (VERI-1018) compiling module ROM128X1A_uniq_13
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| 112 |
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/ecp5um.v(698,1-708,10) (VERI-9000) elaborating module 'ROM128X1A_uniq_13'
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| 113 |
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INFO - C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/Decoding_Table/ROM_ASCII_Decoder/DistRomAsciiDecoder/DistRomAsciiDecoder/DistRomAsciiDecoder.vhd(97,5-101,41) (VHDL-1400) back to vhdl to continue elaboration
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| 114 |
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INFO - C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/Decoding_Table/ROM_ASCII_Decoder/DistRomAsciiDecoder/DistRomAsciiDecoder/DistRomAsciiDecoder.vhd(103,5-107,41) (VHDL-1399) going to verilog side to elaborate module ROM128X1A
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| 115 |
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/ecp5um.v(698,8-698,17) (VERI-1018) compiling module ROM128X1A_uniq_14
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| 116 |
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/ecp5um.v(698,1-708,10) (VERI-9000) elaborating module 'ROM128X1A_uniq_14'
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| 117 |
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INFO - C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/Decoding_Table/ROM_ASCII_Decoder/DistRomAsciiDecoder/DistRomAsciiDecoder/DistRomAsciiDecoder.vhd(103,5-107,41) (VHDL-1400) back to vhdl to continue elaboration
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| 118 |
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/ecp5um.v(698,1-708,10) (VERI-9000) elaborating module 'ROM128X1A_uniq_1'
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| 119 |
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/ecp5um.v(698,1-708,10) (VERI-9000) elaborating module 'ROM128X1A_uniq_2'
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| 120 |
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/ecp5um.v(698,1-708,10) (VERI-9000) elaborating module 'ROM128X1A_uniq_3'
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| 121 |
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/ecp5um.v(698,1-708,10) (VERI-9000) elaborating module 'ROM128X1A_uniq_4'
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| 122 |
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/ecp5um.v(698,1-708,10) (VERI-9000) elaborating module 'ROM128X1A_uniq_5'
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| 123 |
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/ecp5um.v(698,1-708,10) (VERI-9000) elaborating module 'ROM128X1A_uniq_6'
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| 124 |
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/ecp5um.v(698,1-708,10) (VERI-9000) elaborating module 'ROM128X1A_uniq_7'
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| 125 |
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/ecp5um.v(698,1-708,10) (VERI-9000) elaborating module 'ROM128X1A_uniq_8'
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| 126 |
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/ecp5um.v(698,1-708,10) (VERI-9000) elaborating module 'ROM128X1A_uniq_9'
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| 127 |
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/ecp5um.v(698,1-708,10) (VERI-9000) elaborating module 'ROM128X1A_uniq_10'
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| 128 |
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/ecp5um.v(698,1-708,10) (VERI-9000) elaborating module 'ROM128X1A_uniq_11'
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| 129 |
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/ecp5um.v(698,1-708,10) (VERI-9000) elaborating module 'ROM128X1A_uniq_12'
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| 130 |
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/ecp5um.v(698,1-708,10) (VERI-9000) elaborating module 'ROM128X1A_uniq_13'
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| 131 |
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INFO - C:/lscc/diamond/3.8_x64/ispfpga/userware/NT/SYNTHESIS_HEADERS/ecp5um.v(698,1-708,10) (VERI-9000) elaborating module 'ROM128X1A_uniq_14'
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| 132 |
5 |
liubenoff |
Done: design load finished with (0) errors, and (0) warnings
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| 133 |
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| 134 |
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