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URL https://opencores.org/ocsvn/single-14-segment-display-driver-w-decoder/single-14-segment-display-driver-w-decoder/trunk

Subversion Repositories single-14-segment-display-driver-w-decoder

[/] [single-14-segment-display-driver-w-decoder/] [trunk/] [Project/] [Lattice_FPGA_Build/] [impl1/] [launch_synplify.tcl] - Blame information for rev 9

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Line No. Rev Author Line
1 5 liubenoff
#-- Lattice Semiconductor Corporation Ltd.
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#-- Synplify OEM project file C:/Projects/single-14-segment-display-driver-w-decoder/Project/Lattice_FPGA_Build/impl1/launch_synplify.tcl
3 9 liubenoff
#-- Written on Tue Jan 17 23:37:07 2017
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project -close
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set filename "C:/Projects/single-14-segment-display-driver-w-decoder/Project/Lattice_FPGA_Build/impl1/impl1_syn.prj"
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if ([file exists "$filename"]) {
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        project -load "$filename"
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        project_file -remove *
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} else {
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        project -new "$filename"
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}
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set create_new 0
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#device options
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set_option -technology ECP5UM5G
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set_option -part LFE5UM5G_45F
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set_option -package BG381C
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set_option -speed_grade -8
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if {$create_new == 1} {
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#-- add synthesis options
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        set_option -symbolic_fsm_compiler true
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        set_option -resource_sharing true
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        set_option -vlog_std v2001
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        set_option -frequency auto
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        set_option -maxfan 1000
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        set_option -auto_constrain_io 0
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        set_option -disable_io_insertion false
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        set_option -retiming false; set_option -pipe true
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        set_option -force_gsr false
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        set_option -compiler_compatible 0
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        set_option -dup false
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        set_option -default_enum_encoding default
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        set_option -write_apr_constraint 1
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        set_option -fix_gated_and_generated_clocks 1
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        set_option -update_models_cp 0
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        set_option -resolve_multiple_driver 0
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}
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#-- add_file options
47 6 liubenoff
add_file -vhdl "C:/lscc/diamond/3.8_x64/cae_library/synthesis/vhdl/ecp5um.vhd"
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add_file -vhdl -lib "work" "C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/Decoding_Table/ROM_ASCII_Decoder/DistRomAsciiDecoder/DistRomAsciiDecoder/DistRomAsciiDecoder.vhd"
49 9 liubenoff
add_file -vhdl -lib "work" "C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/ascii_decoder.vhd"
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add_file -vhdl -lib "work" "C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/display_driver_w_decoder.vhd"
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add_file -vhdl -lib "work" "C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/display_driver_wrapper.vhd"
52 5 liubenoff
#-- top module name
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set_option -top_module {}
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project -result_file {C:/Projects/single-14-segment-display-driver-w-decoder/Project/Lattice_FPGA_Build/impl1/impl1.edi}
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project -save "$filename"

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