URL https://opencores.org/ocsvn/single-14-segment-display-driver-w-decoder/single-14-segment-display-driver-w-decoder/trunk

Subversion Repositories single-14-segment-display-driver-w-decoder

[/] [single-14-segment-display-driver-w-decoder/] [trunk/] [Project/] [Lattice_FPGA_Build/] [impl1/] [synlog/] [report/] [DisplayDriverwDecoder_impl1_fpga_mapper_timing_report.xml] - Blame information for rev 5

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C:\Projects\single-14-segment-display-driver-w-decoder\Project\Lattice_FPGA_Build\impl1\synlog\DisplayDriverwDecoder_impl1_fpga_mapper.srr
START OF TIMING REPORT


Clock Name
Req Freq
Est Freq
Slack


DisplayDriverWrapper|clk
1220.4 MHz
1037.3 MHz
-0.145



Line No.	Rev	Author	Line
1	5	liubenoff
2
6
7
8			`C:\Projects\single-14-segment-display-driver-w-decoder\Project\Lattice_FPGA_Build\impl1\synlog\DisplayDriverwDecoder_impl1_fpga_mapper.srr`
9			`START OF TIMING REPORT`
10
11
12			`Clock Name`
13			`Req Freq`
14			`Est Freq`
15			`Slack`
16
17
18			`DisplayDriverWrapper\|clk`
19			`1220.4 MHz`
20			`1037.3 MHz`
21			`-0.145`
22
23

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Subversion Repositories single-14-segment-display-driver-w-decoder

[/] [single-14-segment-display-driver-w-decoder/] [trunk/] [Project/] [Lattice_FPGA_Build/] [impl1/] [synlog/] [report/] [DisplayDriverwDecoder_impl1_fpga_mapper_timing_report.xml] - Blame information for rev 5