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liubenoff |
-- VHDL netlist generated by SCUBA Diamond (64-bit) 3.8.0.115.3
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-- Module Version: 2.8
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--C:\lscc\diamond\3.8_x64\ispfpga\bin\nt64\scuba.exe -w -n decoder_table_dist_rom -lang vhdl -synth synplify -bus_exp 7 -bb -arch sa5p00g -type rom -addr_width 7 -num_rows 128 -data_width 14 -outdata UNREGISTERED -memfile c:/projects/single-14-segment-display-driver-w-decoder/project/sources/decoding_table/decoder_table_init_binary.mem -memformat bin -fdc C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/Decoding_Table/ROM_ASCII_Decoder/decoder_table_dist_rom_impl/decoder_table_dist_rom/decoder_table_dist_rom.fdc
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-- Wed Jan 18 00:48:29 2017
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library IEEE;
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use IEEE.std_logic_1164.all;
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library ecp5um;
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use ecp5um.components.all;
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entity decoder_table_dist_rom is
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port (
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Address: in std_logic_vector(6 downto 0);
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Q: out std_logic_vector(13 downto 0));
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end decoder_table_dist_rom;
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architecture Structure of decoder_table_dist_rom is
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attribute NGD_DRC_MASK : integer;
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attribute NGD_DRC_MASK of Structure : architecture is 1;
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begin
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-- component instantiation statements
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mem_0_13: ROM128X1A
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generic map (initval=> X"DA3FFFFFBA3FFFFFB7FE6997BFFFFFFE")
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port map (AD6=>Address(6), AD5=>Address(5), AD4=>Address(4),
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AD3=>Address(3), AD2=>Address(2), AD1=>Address(1),
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AD0=>Address(0), DO0=>Q(13));
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mem_0_12: ROM128X1A
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generic map (initval=> X"EDEFFDEBFDEFFDEB7BFFB3E718FFD7FF")
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port map (AD6=>Address(6), AD5=>Address(5), AD4=>Address(4),
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AD3=>Address(3), AD2=>Address(2), AD1=>Address(1),
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AD0=>Address(0), DO0=>Q(12));
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mem_0_11: ROM128X1A
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generic map (initval=> X"F679B7FFEE79B7FFEFDFFA97BFFFFFDF")
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port map (AD6=>Address(6), AD5=>Address(5), AD4=>Address(4),
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AD3=>Address(3), AD2=>Address(2), AD1=>Address(1),
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AD0=>Address(0), DO0=>Q(11));
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mem_0_10: ROM128X1A
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generic map (initval=> X"F0BFD7FFB8BFD7FFEFFE7A176DFFFFFE")
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port map (AD6=>Address(6), AD5=>Address(5), AD4=>Address(4),
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AD3=>Address(3), AD2=>Address(2), AD1=>Address(1),
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AD0=>Address(0), DO0=>Q(10));
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mem_0_9: ROM128X1A
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generic map (initval=> X"EFEFFDEBFFEFFDEAF3FFF3E31AFFD7FF")
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port map (AD6=>Address(6), AD5=>Address(5), AD4=>Address(4),
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AD3=>Address(3), AD2=>Address(2), AD1=>Address(1),
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AD0=>Address(0), DO0=>Q(9));
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mem_0_8: ROM128X1A
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generic map (initval=> X"DCFF9FFEECFF9FFFBFFFF9976DFFFFFF")
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port map (AD6=>Address(6), AD5=>Address(5), AD4=>Address(4),
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AD3=>Address(3), AD2=>Address(2), AD1=>Address(1),
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AD0=>Address(0), DO0=>Q(8));
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mem_0_7: ROM128X1A
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generic map (initval=> X"9FF2FE59FFF2FE585CA3D3C7D0FFB0A3")
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port map (AD6=>Address(6), AD5=>Address(5), AD4=>Address(4),
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AD3=>Address(3), AD2=>Address(2), AD1=>Address(1),
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AD0=>Address(0), DO0=>Q(7));
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mem_0_6: ROM128X1A
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generic map (initval=> X"B7F2F69DFFF2F69DDC8B93C7D0FF388B")
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port map (AD6=>Address(6), AD5=>Address(5), AD4=>Address(4),
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AD3=>Address(3), AD2=>Address(2), AD1=>Address(1),
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AD0=>Address(0), DO0=>Q(6));
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mem_0_5: ROM128X1A
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generic map (initval=> X"7F100615F7100614FC8EFFC3E3FF288E")
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port map (AD6=>Address(6), AD5=>Address(5), AD4=>Address(4),
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AD3=>Address(3), AD2=>Address(2), AD1=>Address(1),
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AD0=>Address(0), DO0=>Q(5));
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mem_0_4: ROM128X1A
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generic map (initval=> X"3F180215F7180214FEBABFF7EBFF2ABA")
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port map (AD6=>Address(6), AD5=>Address(5), AD4=>Address(4),
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AD3=>Address(3), AD2=>Address(2), AD1=>Address(1),
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AD0=>Address(0), DO0=>Q(4));
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mem_0_3: ROM128X1A
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generic map (initval=> X"7BD56B4353D56B42DC92BFA7DAFF8492")
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port map (AD6=>Address(6), AD5=>Address(5), AD4=>Address(4),
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AD3=>Address(3), AD2=>Address(2), AD1=>Address(1),
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AD0=>Address(0), DO0=>Q(3));
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mem_0_2: ROM128X1A
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generic map (initval=> X"7F551A69DF551A69FC24FF85FFFFD024")
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port map (AD6=>Address(6), AD5=>Address(5), AD4=>Address(4),
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AD3=>Address(3), AD2=>Address(2), AD1=>Address(1),
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AD0=>Address(0), DO0=>Q(2));
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mem_0_1: ROM128X1A
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generic map (initval=> X"3F581AE99F581AE87C60FFF5F7FFD060")
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port map (AD6=>Address(6), AD5=>Address(5), AD4=>Address(4),
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AD3=>Address(3), AD2=>Address(2), AD1=>Address(1),
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AD0=>Address(0), DO0=>Q(1));
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mem_0_0: ROM128X1A
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generic map (initval=> X"7BE07F0193E07F007C12FFA7F2FF0012")
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port map (AD6=>Address(6), AD5=>Address(5), AD4=>Address(4),
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AD3=>Address(3), AD2=>Address(2), AD1=>Address(1),
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AD0=>Address(0), DO0=>Q(0));
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end Structure;
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