Subversion Repositories single-14-segment-display-driver-w-decoder

-- VHDL testbench template generated by SCUBA Diamond (64-bit) 3.8.0.115.3

library IEEE;

use IEEE.std_logic_1164.all;

use IEEE.std_logic_unsigned.all;

use IEEE.math_real.all;

use IEEE.numeric_std.all;

entity tb is

end entity tb;

architecture test of tb is

    component decoder_table_dist_rom

        port (Address : in std_logic_vector(6 downto 0);

        Q : out std_logic_vector(13 downto 0)

    );

    end component;

    signal Address : std_logic_vector(6 downto 0) := (others => '0');

    signal Q : std_logic_vector(13 downto 0);

begin

    u1 : decoder_table_dist_rom

        port map (Address => Address, Q => Q

        );

    process

    begin

      Address <= (others => '0') ;

      wait for 100 ns;

      wait for 10 ns;

      for i in 0 to 131 loop

        wait for 10 ns;

        Address <= Address + '1' ;

      end loop;

      wait;

    end process;

end architecture test;