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[/] [sio/] [trunk/] [rtl/] [example_sio_top.vhd] - Blame information for rev 2

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-- -----------------------------------------------------------------------------
2
--  This file is a top level application for conencting the wb_lpc to the sio_logic
3
-- written by : Istvan Nagy 11.01, 2019
4
-- 
5
-- A replacement for a chip like the Microchip SCH3227.
6
--  The LPC IP has a 32bit wishbone bus, but only lower 8bits used for SIO access, with 8bit LPC cycles.
7
-- Files from other projects needed:
8
--  - UART below this module: https://opencores.org/projects/uart16550
9
--     For the UART, use the 33MHz compliant version regs file: uart_regs_33m.v
10
--     In uart_defines.v uncomment the "`define DATA_BUS_WIDTH_8"
11
--  - PS2 below this module: http://www.opencores.org/projects/ps2/ 
12
--     In the ps2_defines, uncomment `define PS2_AUX to enble the keyboard
13
--  - LPC slave: https://opencores.org/projects/wb_lpc
14
--     Use these files: wb_lpc_periph.v, wb_lpc_defines.v, serirq_defines.v, serirq_slave.v
15
--     Some of the files had references, that needs rewriting to remove relative path: `include "wb_lpc_defines.v"
16
--     In wb_lpc_periph.v change a line: always @(posedge clk_i or negedge nrst_i) ===> always @(posedge clk_i) 
17
--  - Write your own device-top level file, instantiating/connecting the LPC and SIO.
18
-- Address range:
19
--  - COM1: 3F8-3FFh
20
--  - COM2: 2F8-2FFh
21
--  - COM3: 3E8-3EFh
22
--  - COM4: 2E8-2EFh
23
--  - PS2:  60h AND 64h
24
--  - post-code:  80h AND 81h
25
--  - Custom board logic registers: 200h...207h (r/w regs connect in/out outside, ro regs out NC)
26
-- -----------------------------------------------------------------------------
27
 
28
library IEEE;
29
use IEEE.STD_LOGIC_1164.ALL;
30
use IEEE.STD_LOGIC_ARITH.ALL;
31
use IEEE.STD_LOGIC_UNSIGNED.ALL;
32
 
33
 
34
--entity header  ----------------------------------------------------------------
35
entity example_sio_top is
36
    Port (
37
    clk_lpc : in std_logic;
38
    reset_n : in std_logic;
39
    lframe : in std_logic;
40
    lad   : inout std_logic_vector(3 downto 0);
41
    serirq   : inout  std_logic;
42
    parallel_irq : IN std_logic_vector(31 downto 0);
43
        register_0_out   : out std_logic_vector(7 downto 0);
44
        register_0_in   : in std_logic_vector(7 downto 0);
45
        register_1_out   : out std_logic_vector(7 downto 0);
46
        register_1_in   : in std_logic_vector(7 downto 0);
47
        register_2_out   : out std_logic_vector(7 downto 0);
48
        register_2_in   : in std_logic_vector(7 downto 0);
49
        register_3_out   : out std_logic_vector(7 downto 0);
50
        register_3_in   : in std_logic_vector(7 downto 0);
51
        register_4_out   : out std_logic_vector(7 downto 0);
52
        register_4_in   : in std_logic_vector(7 downto 0);
53
        register_5_out   : out std_logic_vector(7 downto 0);
54
        register_5_in   : in std_logic_vector(7 downto 0);
55
        register_6_out   : out std_logic_vector(7 downto 0);
56
        register_6_in   : in std_logic_vector(7 downto 0);
57
        register_7_out   : out std_logic_vector(7 downto 0);
58
        register_7_in   : in std_logic_vector(7 downto 0);
59
        port80   : out std_logic_vector(7 downto 0);
60
        port81   : out std_logic_vector(7 downto 0);
61
        serial1_tx: out std_logic; serial1_rx: in std_logic; serial1_rts: out std_logic; serial1_cts: in std_logic; serial1_dtr: out std_logic; serial1_dsr: in std_logic; serial1_ri: in std_logic; serial1_dcd: in std_logic;
62
        serial2_tx: out std_logic; serial2_rx: in std_logic; serial2_rts: out std_logic; serial2_cts: in std_logic; serial2_dtr: out std_logic; serial2_dsr: in std_logic; serial2_ri: in std_logic; serial2_dcd: in std_logic;
63
        serial3_tx: out std_logic; serial3_rx: in std_logic; serial3_rts: out std_logic; serial3_cts: in std_logic; serial3_dtr: out std_logic; serial3_dsr: in std_logic; serial3_ri: in std_logic; serial3_dcd: in std_logic;
64
        serial4_tx: out std_logic; serial4_rx: in std_logic; serial4_rts: out std_logic; serial4_cts: in std_logic; serial4_dtr: out std_logic; serial4_dsr: in std_logic; serial4_ri: in std_logic; serial4_dcd: in std_logic;
65
        ps2_kbd_clk_pad_oe_o: out std_logic; ps2_kbd_clk_pad_o: out std_logic; ps2_kbd_data_pad_oe_o: out std_logic; ps2_kbd_data_pad_o: out std_logic;
66
        ps2_aux_clk_pad_oe_o: out std_logic; ps2_aux_clk_pad_o: out std_logic; ps2_aux_data_pad_oe_o: out std_logic; ps2_aux_data_pad_o: out std_logic;
67
        ps2_kbd_clk_pad_i: in std_logic; ps2_kbd_data_pad_i: in std_logic; ps2_aux_clk_pad_i : in std_logic; ps2_aux_data_pad_i: in std_logic; kb_rstout: out std_logic
68
           );
69
end example_sio_top;
70
 
71
 
72
--architecture start ------------------------------------------------------------
73
architecture Behavioral of example_sio_top is
74
 
75
 
76
-- INTERNAL SIGNALS -------------------------------------------------------------
77
    SIGNAL dummy0:  std_logic;
78
    SIGNAL dummy1:  std_logic_VECTOR(6 DOWNTO 0);
79
        SIGNAL  xwbm_adr_i :  std_logic_vector(31 downto 0);
80
        SIGNAL  xwbm_dat_i :  std_logic_vector(31 downto 0);
81
        SIGNAL  xwbm_sel_i :  std_logic_vector(3 downto 0);
82
        SIGNAL  xwbm_tga_i :  std_logic_vector(1 downto 0);
83
        SIGNAL  xwbm_we_i :  std_logic;
84
        SIGNAL  xwbm_stb_i :  std_logic;
85
        SIGNAL  xwbm_cyc_i :  std_logic;
86
        SIGNAL  xwbm_dat_o :  std_logic_vector(31 downto 0);
87
        SIGNAL  xwbm_ack_o :  std_logic;
88
        SIGNAL  xwbm_err_o :  std_logic;
89
        SIGNAL dma_bs1  :  std_logic_vector(2 downto 0);
90
        SIGNAL dma_bs2  :  std_logic;
91
        SIGNAL  serirq_i :  std_logic;
92
        SIGNAL  serirq_o :  std_logic;
93
        SIGNAL  serirq_oe :  std_logic;
94
        SIGNAL  lad_i :  std_logic_vector(3 downto 0);
95
        SIGNAL  lad_o :  std_logic_vector(3 downto 0);
96
        SIGNAL  lad_oe :  std_logic;
97
 
98
 
99
 
100
--------- COMPONENT DECLARATIONS (introducing the IPs) --------------------------
101
        COMPONENT sio_logic
102
        PORT(
103
                clk : IN std_logic;
104
                reset_n : IN std_logic;
105
                wbm_adr_i : IN std_logic_vector(31 downto 0);
106
                wbm_dat_i : IN std_logic_vector(31 downto 0);
107
                wbm_sel_i : IN std_logic_vector(3 downto 0);
108
                wbm_tga_i : IN std_logic_vector(1 downto 0);
109
                wbm_we_i : IN std_logic;
110
                wbm_stb_i : IN std_logic;
111
                wbm_cyc_i : IN std_logic;
112
                register_0_in : IN std_logic_vector(7 downto 0);
113
                register_1_in : IN std_logic_vector(7 downto 0);
114
                register_2_in : IN std_logic_vector(7 downto 0);
115
                register_3_in : IN std_logic_vector(7 downto 0);
116
                register_4_in : IN std_logic_vector(7 downto 0);
117
                register_5_in : IN std_logic_vector(7 downto 0);
118
                register_6_in : IN std_logic_vector(7 downto 0);
119
                register_7_in : IN std_logic_vector(7 downto 0);
120
                serial1_rx : IN std_logic;
121
                serial1_cts : IN std_logic;
122
                serial1_dsr : IN std_logic;
123
                serial1_ri : IN std_logic;
124
                serial1_dcd : IN std_logic;
125
                serial2_rx : IN std_logic;
126
                serial2_cts : IN std_logic;
127
                serial2_dsr : IN std_logic;
128
                serial2_ri : IN std_logic;
129
                serial2_dcd : IN std_logic;
130
                serial3_rx : IN std_logic;
131
                serial3_cts : IN std_logic;
132
                serial3_dsr : IN std_logic;
133
                serial3_ri : IN std_logic;
134
                serial3_dcd : IN std_logic;
135
                serial4_rx : IN std_logic;
136
                serial4_cts : IN std_logic;
137
                serial4_dsr : IN std_logic;
138
                serial4_ri : IN std_logic;
139
                serial4_dcd : IN std_logic;
140
                ps2_kbd_clk_pad_i : IN std_logic;
141
                ps2_kbd_data_pad_i : IN std_logic;
142
                ps2_aux_clk_pad_i : IN std_logic;
143
                ps2_aux_data_pad_i : IN std_logic;
144
                wbm_dat_o : OUT std_logic_vector(31 downto 0);
145
                wbm_ack_o : OUT std_logic;
146
                wbm_err_o : OUT std_logic;
147
                register_0_out : OUT std_logic_vector(7 downto 0);
148
                register_1_out : OUT std_logic_vector(7 downto 0);
149
                register_2_out : OUT std_logic_vector(7 downto 0);
150
                register_3_out : OUT std_logic_vector(7 downto 0);
151
                register_4_out : OUT std_logic_vector(7 downto 0);
152
                register_5_out : OUT std_logic_vector(7 downto 0);
153
                register_6_out : OUT std_logic_vector(7 downto 0);
154
                register_7_out : OUT std_logic_vector(7 downto 0);
155
                port80 : OUT std_logic_vector(7 downto 0);
156
                port81 : OUT std_logic_vector(7 downto 0);
157
                serial1_tx : OUT std_logic;
158
                serial1_rts : OUT std_logic;
159
                serial1_dtr : OUT std_logic;
160
                serial2_tx : OUT std_logic;
161
                serial2_rts : OUT std_logic;
162
                serial2_dtr : OUT std_logic;
163
                serial3_tx : OUT std_logic;
164
                serial3_rts : OUT std_logic;
165
                serial3_dtr : OUT std_logic;
166
                serial4_tx : OUT std_logic;
167
                serial4_rts : OUT std_logic;
168
                serial4_dtr : OUT std_logic;
169
                --kb_rstout : OUT std_logic;
170
                ps2_kbd_clk_pad_oe_o : OUT std_logic;
171
                ps2_kbd_clk_pad_o : OUT std_logic;
172
                ps2_kbd_data_pad_oe_o : OUT std_logic;
173
                ps2_kbd_data_pad_o : OUT std_logic;
174
                ps2_aux_clk_pad_oe_o : OUT std_logic;
175
                ps2_aux_clk_pad_o : OUT std_logic;
176
                ps2_aux_data_pad_oe_o : OUT std_logic;
177
                ps2_aux_data_pad_o : OUT std_logic
178
                );
179
        END COMPONENT;
180
 
181
        COMPONENT wb_lpc_periph
182
        PORT(
183
                clk_i : IN std_logic;
184
                nrst_i : IN std_logic;
185
                wbm_dat_i : IN std_logic_vector(31 downto 0);
186
                wbm_ack_i : IN std_logic;
187
                wbm_err_i : IN std_logic;
188
                lframe_i : IN std_logic;
189
                lad_i : IN std_logic_vector(3 downto 0);
190
                wbm_adr_o : OUT std_logic_vector(31 downto 0);
191
                wbm_dat_o : OUT std_logic_vector(31 downto 0);
192
                wbm_sel_o : OUT std_logic_vector(3 downto 0);
193
                wbm_tga_o : OUT std_logic_vector(1 downto 0);
194
                wbm_we_o : OUT std_logic;
195
                wbm_stb_o : OUT std_logic;
196
                wbm_cyc_o : OUT std_logic;
197
                dma_chan_o : OUT std_logic_vector(2 downto 0);
198
                dma_tc_o : OUT std_logic;
199
                lad_o : OUT std_logic_vector(3 downto 0);
200
                lad_oe : OUT std_logic
201
                );
202
        END COMPONENT;
203
 
204
 
205
        COMPONENT serirq_slave
206
        PORT(
207
                clk_i : IN std_logic;
208
                nrst_i : IN std_logic;
209
                irq_i : IN std_logic_vector(31 downto 0);
210
                serirq_i : IN std_logic;
211
                serirq_o : OUT std_logic;
212
                serirq_oe : OUT std_logic
213
                );
214
        END COMPONENT;
215
 
216
 
217
--architecture body start -------------------------------------------------------
218
begin
219
 
220
 
221
 
222
--------- COMPONENT INSTALLATIONS (connecting the IPs to local signals) ---------
223
        Inst_sio_logic: sio_logic PORT MAP(
224
                clk => clk_lpc ,
225
                reset_n => reset_n  ,
226
                wbm_adr_i => xwbm_adr_i,
227
                wbm_dat_i => xwbm_dat_i,
228
                wbm_dat_o => xwbm_dat_o,
229
                wbm_sel_i => xwbm_sel_i,
230
                wbm_tga_i => xwbm_tga_i,
231
                wbm_we_i => xwbm_we_i,
232
                wbm_stb_i => xwbm_stb_i,
233
                wbm_cyc_i => xwbm_cyc_i,
234
                wbm_ack_o => xwbm_ack_o,
235
                wbm_err_o => xwbm_err_o,
236
                register_0_out           =>     register_0_out,
237
                register_0_in    =>     register_0_in,
238
                register_1_out           =>     register_1_out,
239
                register_1_in    =>     register_1_in,
240
                register_2_out           =>     register_2_out,
241
                register_2_in    =>     register_2_in,
242
                register_3_out           =>     register_3_out,
243
                register_3_in    =>     register_3_in,
244
                register_4_out           =>     register_4_out,
245
                register_4_in    =>     register_4_in,
246
                register_5_out           =>     register_5_out,
247
                register_5_in    =>     register_5_in,
248
                register_6_out           =>     register_6_out,
249
                register_6_in    =>     register_6_in,
250
                register_7_out           =>     register_7_out,
251
                register_7_in    =>     register_7_in,
252
                port80           =>     port80,
253
                port81           =>     port81,
254
                serial1_tx       =>     serial1_tx,
255
                serial1_rx       =>     serial1_rx,
256
                serial1_rts      =>     serial1_rts,
257
                serial1_cts      =>     serial1_cts,
258
                serial1_dtr      =>     serial1_dtr,
259
                serial1_dsr      =>     serial1_dsr,
260
                serial1_ri       =>     serial1_ri,
261
                serial1_dcd      =>     serial1_dcd,
262
                serial2_tx       =>     serial2_tx,
263
                serial2_rx       =>     serial2_rx,
264
                serial2_rts      =>     serial2_rts,
265
                serial2_cts      =>     serial2_cts,
266
                serial2_dtr      =>     serial2_dtr,
267
                serial2_dsr      =>     serial2_dsr,
268
                serial2_ri       =>     serial2_ri,
269
                serial2_dcd      =>     serial2_dcd,
270
                serial3_tx       =>     serial3_tx,
271
                serial3_rx       =>     serial3_rx,
272
                serial3_rts      =>     serial3_rts,
273
                serial3_cts      =>     serial3_cts,
274
                serial3_dtr      =>     serial3_dtr,
275
                serial3_dsr      =>     serial3_dsr,
276
                serial3_ri       =>     serial3_ri,
277
                serial3_dcd      =>     serial3_dcd,
278
                serial4_tx       =>     serial4_tx,
279
                serial4_rx       =>     serial4_rx,
280
                serial4_rts      =>     serial4_rts,
281
                serial4_cts      =>     serial4_cts,
282
                serial4_dtr      =>     serial4_dtr,
283
                serial4_dsr      =>     serial4_dsr,
284
                serial4_ri       =>     serial4_ri,
285
                serial4_dcd      =>     serial4_dcd,
286
                --kb_rstout      =>     kb_rstout, --missing???
287
                ps2_kbd_clk_pad_oe_o     =>     ps2_kbd_clk_pad_oe_o,
288
                ps2_kbd_clk_pad_o        =>     ps2_kbd_clk_pad_o,
289
                ps2_kbd_data_pad_oe_o    =>     ps2_kbd_data_pad_oe_o,
290
                ps2_kbd_data_pad_o       =>     ps2_kbd_data_pad_o,
291
                ps2_aux_clk_pad_oe_o     =>     ps2_aux_clk_pad_oe_o,
292
                ps2_aux_clk_pad_o        =>     ps2_aux_clk_pad_o,
293
                ps2_aux_data_pad_oe_o    =>     ps2_aux_data_pad_oe_o,
294
                ps2_aux_data_pad_o       =>     ps2_aux_data_pad_o,
295
                ps2_kbd_clk_pad_i        =>     ps2_kbd_clk_pad_i,
296
                ps2_kbd_data_pad_i       =>     ps2_kbd_data_pad_i,
297
                ps2_aux_clk_pad_i        =>     ps2_aux_clk_pad_i,
298
                ps2_aux_data_pad_i       =>     ps2_aux_data_pad_i
299
 
300
 
301
        );
302
 
303
 
304
        Inst_wb_lpc_periph: wb_lpc_periph PORT MAP(
305
                clk_i => clk_lpc ,
306
                nrst_i => reset_n ,
307
                wbm_adr_o => xwbm_adr_i ,
308
                wbm_dat_o => xwbm_dat_i ,
309
                wbm_dat_i => xwbm_dat_o ,
310
                wbm_sel_o => xwbm_sel_i ,
311
                wbm_tga_o => xwbm_tga_i ,
312
                wbm_we_o => xwbm_we_i ,
313
                wbm_stb_o => xwbm_stb_i ,
314
                wbm_cyc_o => xwbm_cyc_i ,
315
                wbm_ack_i => xwbm_ack_o ,
316
                wbm_err_i => xwbm_err_o ,
317
                dma_chan_o => dma_bs1,
318
                dma_tc_o => dma_bs2,
319
                lframe_i => lframe ,
320
                lad_i => lad_i,
321
                lad_o => lad_o ,
322
                lad_oe => lad_oe
323
        );
324
 
325
 
326
        Inst_serirq_slave: serirq_slave PORT MAP(
327
                clk_i => clk_lpc ,
328
                nrst_i => reset_n ,
329
                irq_i => parallel_irq ,
330
                serirq_o => serirq_o ,
331
                serirq_i => serirq_i ,
332
                serirq_oe => serirq_oe
333
        );
334
 
335
 
336
 
337
 
338
-- local Logic ------------------------------------------------------------------
339
 
340
         process ( reset_n, lad_oe, lad_o)
341
    begin
342
       if (reset_n='0') then
343
           lad <= "ZZZZ";
344
       else
345
         if (lad_oe='1') then lad <= lad_o;
346
                        else lad <= "ZZZZ";
347
                        end if;
348
       end if;
349
    end process;
350
    lad_i <= lad;
351
 
352
         process ( reset_n, serirq_oe , serirq_o )
353
    begin
354
       if (reset_n='0') then
355
           serirq <= 'Z';
356
       else
357
         if (serirq_oe ='1') then serirq <= serirq_o ;
358
                        else serirq <= 'Z';
359
                        end if;
360
       end if;
361
    end process;
362
    serirq_i  <= serirq;
363
 
364
 
365
 
366
 
367
 
368
--end file ----------------------------------------------------------------------
369
end Behavioral;

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