URL https://opencores.org/ocsvn/smbus_controller/smbus_controller/trunk

Subversion Repositories smbus_controller

[/] [smbus_controller/] [trunk/] [hw/] [simulations/] [Testbench_SMBusPec_behav.wcfg] - Blame information for rev 2

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      clock_12M
      clock_12M
   
   
      reset
      reset
   
   
      enable
      enable
   
   
      data[7:0]
      data[7:0]
   
   
      crc_reg[7:0]
      crc_reg[7:0]
   
   
      i_pec_verif[7:0]
      i_pec_verif[7:0]
   
   
      pec_match
      pec_match
   


Line No.	Rev	Author	Line
1	2	ldalmasso
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23			`clock_12M`
24			`clock_12M`
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27			`reset`
28			`reset`
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31			`enable`
32			`enable`
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35			`data[7:0]`
36			`data[7:0]`
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39			`crc_reg[7:0]`
40			`crc_reg[7:0]`
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43			`i_pec_verif[7:0]`
44			`i_pec_verif[7:0]`
45
46
47			`pec_match`
48			`pec_match`
49
50

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Subversion Repositories smbus_controller

[/] [smbus_controller/] [trunk/] [hw/] [simulations/] [Testbench_SMBusPec_behav.wcfg] - Blame information for rev 2