URL https://opencores.org/ocsvn/socgen/socgen/trunk

Subversion Repositories socgen

[/] [socgen/] [trunk/] [Makefile] - Blame information for rev 134

Go to most recent revision | Details | Compare with Previous | View Log


SHELL=/bin/sh
MAKE=make
CUR_DIR=$(shell pwd)
home=$(CUR_DIR)
design=socgen
project=fpgas
vendor=opencores.org
 
 
 
 
 
.PHONY all: clean
all:
        (\
        ${home}/tools/sys/workspace  opencores.org  fpgas;\
        ${home}/tools/sys/workspace  opencores.org  logic;\
        ${home}/tools/sys/workspace  opencores.org  adv_debug_sys;\
        ${home}/tools/sys/workspace  opencores.org  io;\
        ${home}/tools/sys/workspace  opencores.org  Mos6502;\
        ${home}/tools/sys/workspace  opencores.org  wishbone;\
        ${home}/tools/sys/workspace  opencores.org  cde;\
         )
 
 
.PHONY workspace: clean
workspace:
        (\
        ${home}/tools/sys/workspace  opencores.org  fpgas;\
        ${home}/tools/sys/workspace  opencores.org  logic;\
        ${home}/tools/sys/workspace  opencores.org  adv_debug_sys;\
        ${home}/tools/sys/workspace  opencores.org  io;\
        ${home}/tools/sys/workspace  opencores.org  Mos6502;\
        ${home}/tools/sys/workspace  opencores.org  wishbone;\
        ${home}/tools/sys/workspace  opencores.org  cde;\
         )
 
 
.PHONY dock:
dock:
        (\
        ${home}/tools/documentation/create_lib_doc   opencores.org  cde            ;\
        ${home}/tools/documentation/create_lib_doc   opencores.org  adv_debug_sys  ;\
        ${home}/tools/documentation/create_lib_doc   opencores.org  logic          ;\
        ${home}/tools/documentation/create_lib_doc   opencores.org  io             ;\
        ${home}/tools/documentation/create_lib_doc   opencores.org  Mos6502        ;\
        ${home}/tools/documentation/create_lib_doc   opencores.org  Testbench      ;\
        ${home}/tools/documentation/create_lib_doc   opencores.org  wishbone       ;\
        ${home}/tools/documentation/create_lib_doc   opencores.org  fpgas          ;\
         )
 
 
 
 
 
 
 
 
.PHONY clean:
clean:
        (\
        ./tools/yp/clean ;\
        rm -f -r doc/geda/*  ;\
        find . | grep "~" | xargs rm -f  $1 ;\
         )
 
 
 
 
.PHONY index:
index:
        (\
        ${home}/tools/busdefs/create_busdefs ;\
         )
 
 
 
.PHONY build_elab:
build_elab:
        (\
        rm -f -r dbs/*  ;\
        rm -f -r io_ports  ;\
        ${home}/tools/sys/build_elab_master  ;\
        ${home}/tools/verilog/gen_instance_roots  ;\
        )
 
 
 
.PHONY build_hw:
build_hw:
        (\
        ${home}/tools/sys/build_hw_master  ;\
        )
 
 
 
 
.PHONY build_sw:
build_sw:
        (\
        ${home}/tools/sys/build_sw_master  ;\
        )
 
 
.PHONY run_sims:
run_sims:
        (\
        ${home}/tools/simulation/build_sim_master  ;\
         )
 
.PHONY build_fpgas:
build_fpgas:
        (\
        ${home}/tools/synthesys/build_fpga_master  ;\
         )
 
 
.PHONY check_sims:
check_sims:
        @for COMP in `ls $(CUR_DIR)/work`; do \
        echo "*******************************************************************************************";\
        echo " number of $$COMP sims run";\
        find ./work/$$COMP  | grep test_define | grep -v target | grep -v children| grep -v cov | wc -l;\
        echo " number of sims that finished";\
        find ./work/$$COMP  | grep _sim.log | xargs grep PASSED $1    | wc -l    ;\
        echo " number of warnings";\
        find ./work/$$COMP  | grep _sim.log | xargs grep WARNING $1   | wc -l ;\
        echo " number of errors";\
        find ./work/$$COMP  | grep _sim.log | xargs grep ERROR $1     | wc -l ;\
        echo " Elaboration Errors";\
        find ./work/$$COMP  | grep _elab.log | xargs cat $1  ;\
        echo " Code Coverage";\
        echo " number of warnings";\
        find ./work/$$COMP  | grep _cov.log | xargs grep WARNING $1  ;\
        echo " number of errors";\
        find ./work/$$COMP  | grep _cov.log | xargs grep ERROR $1    ;\
        echo " Lint Coverage";\
        echo " number of errors";\
        find ./work/$$COMP  | grep lint.log | xargs grep Error $1  ;\
        done;\
 
 
 
 
.PHONY check_fpgas:
check_fpgas:
        (\
        cd ${home}/work  ;\
        echo " number of fpgas";\
        find . | grep syn/ise |grep Yst |  wc -l   ;\
        echo " number that finished";\
        find . | grep Board_Design_jtag.bit | wc -l ;\
         )
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 

Line No.	Rev	Author	Line
1	6	jt_eaton	`SHELL=/bin/sh`
2			`MAKE=make`
3			`CUR_DIR=$(shell pwd)`
4	56	jt_eaton	`home=$(CUR_DIR)`
5	6	jt_eaton	`design=socgen`
6	100	jt_eaton	`project=fpgas`
7	117	jt_eaton	`vendor=opencores.org`
8	6	jt_eaton
9
10	131	jt_eaton
11
12
13	134	jt_eaton	`.PHONY all: clean`
14	101	jt_eaton	`all:`
15			`(\`
16	131	jt_eaton	`${home}/tools/sys/workspace opencores.org fpgas;\`
17			`${home}/tools/sys/workspace opencores.org logic;\`
18			`${home}/tools/sys/workspace opencores.org adv_debug_sys;\`
19			`${home}/tools/sys/workspace opencores.org io;\`
20			`${home}/tools/sys/workspace opencores.org Mos6502;\`
21			`${home}/tools/sys/workspace opencores.org wishbone;\`
22			`${home}/tools/sys/workspace opencores.org cde;\`
23	101	jt_eaton	`)`
24
25	131	jt_eaton
26	133	jt_eaton	`.PHONY workspace: clean`
27			`workspace:`
28			`(\`
29			`${home}/tools/sys/workspace opencores.org fpgas;\`
30			`${home}/tools/sys/workspace opencores.org logic;\`
31			`${home}/tools/sys/workspace opencores.org adv_debug_sys;\`
32			`${home}/tools/sys/workspace opencores.org io;\`
33			`${home}/tools/sys/workspace opencores.org Mos6502;\`
34			`${home}/tools/sys/workspace opencores.org wishbone;\`
35			`${home}/tools/sys/workspace opencores.org cde;\`
36			`)`
37
38
39	131	jt_eaton	`.PHONY dock:`
40			`dock:`
41			`(\`
42			`${home}/tools/documentation/create_lib_doc opencores.org cde ;\`
43			`${home}/tools/documentation/create_lib_doc opencores.org adv_debug_sys ;\`
44			`${home}/tools/documentation/create_lib_doc opencores.org logic ;\`
45			`${home}/tools/documentation/create_lib_doc opencores.org io ;\`
46			`${home}/tools/documentation/create_lib_doc opencores.org Mos6502 ;\`
47			`${home}/tools/documentation/create_lib_doc opencores.org Testbench ;\`
48			`${home}/tools/documentation/create_lib_doc opencores.org wishbone ;\`
49			`${home}/tools/documentation/create_lib_doc opencores.org fpgas ;\`
50			`)`
51
52
53
54
55
56
57
58
59	100	jt_eaton	`.PHONY clean:`
60			`clean:`
61	10	jt_eaton	`(\`
62	131	jt_eaton	`./tools/yp/clean ;\`
63	119	jt_eaton	`rm -f -r doc/geda/* ;\`
64	83	jt_eaton	`find . \| grep "~" \| xargs rm -f $1 ;\`
65	56	jt_eaton	`)`
66	6	jt_eaton
67
68	100	jt_eaton
69
70	117	jt_eaton	`.PHONY index:`
71			`index:`
72			`(\`
73	131	jt_eaton	`${home}/tools/busdefs/create_busdefs ;\`
74	117	jt_eaton	`)`
75
76
77	134	jt_eaton
78			`.PHONY build_elab:`
79			`build_elab:`
80			`(\`
81			`rm -f -r dbs/* ;\`
82			`rm -f -r io_ports ;\`
83			`${home}/tools/sys/build_elab_master ;\`
84			`${home}/tools/verilog/gen_instance_roots ;\`
85			`)`
86
87
88
89	57	jt_eaton	`.PHONY build_hw:`
90			`build_hw:`
91	131	jt_eaton	`(\`
92			`${home}/tools/sys/build_hw_master ;\`
93			`)`
94	6	jt_eaton
95	134	jt_eaton
96
97
98	131	jt_eaton	`.PHONY build_sw:`
99			`build_sw:`
100			`(\`
101			`${home}/tools/sys/build_sw_master ;\`
102			`)`
103	57	jt_eaton
104
105	131	jt_eaton	`.PHONY run_sims:`
106	96	jt_eaton	`run_sims:`
107	131	jt_eaton	`(\`
108			`${home}/tools/simulation/build_sim_master ;\`
109			`)`
110	6	jt_eaton
111			`.PHONY build_fpgas:`
112			`build_fpgas:`
113	131	jt_eaton	`(\`
114			`${home}/tools/synthesys/build_fpga_master ;\`
115			`)`
116	6	jt_eaton
117	49	jt_eaton
118	6	jt_eaton	`.PHONY check_sims:`
119	49	jt_eaton	`check_sims:`
120			@for COMP in `ls $(CUR_DIR)/work`; do \
121	54	jt_eaton	`echo "*******************************************************************************************";\`
122	49	jt_eaton	`echo " number of $$COMP sims run";\`
123	97	jt_eaton	`find ./work/$$COMP \| grep test_define \| grep -v target \| grep -v children\| grep -v cov \| wc -l;\`
124	6	jt_eaton	`echo " number of sims that finished";\`
125	130	jt_eaton	`find ./work/$$COMP \| grep _sim.log \| xargs grep PASSED $1 \| wc -l ;\`
126	6	jt_eaton	`echo " number of warnings";\`
127	54	jt_eaton	`find ./work/$$COMP \| grep _sim.log \| xargs grep WARNING $1 \| wc -l ;\`
128	6	jt_eaton	`echo " number of errors";\`
129	54	jt_eaton	`find ./work/$$COMP \| grep _sim.log \| xargs grep ERROR $1 \| wc -l ;\`
130	100	jt_eaton	`echo " Elaboration Errors";\`
131			`find ./work/$$COMP \| grep _elab.log \| xargs cat $1 ;\`
132	49	jt_eaton	`echo " Code Coverage";\`
133	19	jt_eaton	`echo " number of warnings";\`
134	54	jt_eaton	`find ./work/$$COMP \| grep _cov.log \| xargs grep WARNING $1 ;\`
135	19	jt_eaton	`echo " number of errors";\`
136	54	jt_eaton	`find ./work/$$COMP \| grep _cov.log \| xargs grep ERROR $1 ;\`
137	83	jt_eaton	`echo " Lint Coverage";\`
138			`echo " number of errors";\`
139			`find ./work/$$COMP \| grep lint.log \| xargs grep Error $1 ;\`
140	125	jt_eaton	`done;\`
141	6	jt_eaton
142
143	83	jt_eaton
144
145	6	jt_eaton	`.PHONY check_fpgas:`
146			`check_fpgas:`
147			`(\`
148	56	jt_eaton	`cd ${home}/work ;\`
149	6	jt_eaton	`echo " number of fpgas";\`
150	128	jt_eaton	`find . \| grep syn/ise \|grep Yst \| wc -l ;\`
151	6	jt_eaton	`echo " number that finished";\`
152	54	jt_eaton	`find . \| grep Board_Design_jtag.bit \| wc -l ;\`
153	6	jt_eaton	`)`
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175

Browse

Tools

Subversion Repositories socgen

[/] [socgen/] [trunk/] [Makefile] - Blame information for rev 134