URL https://opencores.org/ocsvn/socgen/socgen/trunk

Subversion Repositories socgen

[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [Mos6502/] [ip/] [T6502/] [sim/] [verilator/] [kim_2/] [wave.sav] - Blame information for rev 135

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[*]
[*] GTKWave Analyzer v3.3.66 (w)1999-2015 BSI
[*] Sat Oct 29 01:55:17 2016
[*]
[dumpfile] "/home/johne/socgen/work/opencores.org__Mos6502/ip/T6502/sim/verilator/kim_2/TestBench.vcd"
[dumpfile_mtime] "Sat Oct 29 01:52:21 2016"
[dumpfile_size] 9553555
[savefile] "/home/johne/socgen/work/opencores.org__Mos6502/ip/T6502/sim/verilator/kim_2/wave.sav"
[timestart] 32000
[size] 1589 854
[pos] 181 0
*-18.000000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
[treeopen] TOP.
[treeopen] TOP.v.
[treeopen] TOP.v.test.
[sst_width] 415
[signals_width] 230
[sst_expanded] 1
[sst_vpaned_height] 245
@28
TOP.v.clk
@22
TOP.v.test.dut.ADDR[31:0]
TOP.v.test.dut.cpu_addr[15:0]
TOP.v.test.dut.cpu_rdata[15:0]
TOP.v.test.dut.data_rdata[15:0]
TOP.v.test.dut.gpio_0_in[7:0]
TOP.v.test.dut.gpio_1_in[7:0]
TOP.v.test.dut.io_module_pic_irq_in[7:0]
@29
TOP.v.test.dut.io_reg_cs
[pattern_trace] 1
[pattern_trace] 0

Line No.	Rev	Author	Line
1	135	jt_eaton	`[*]`
2			`[*] GTKWave Analyzer v3.3.66 (w)1999-2015 BSI`
3			`[*] Sat Oct 29 01:55:17 2016`
4			`[*]`
5			`[dumpfile] "/home/johne/socgen/work/opencores.org__Mos6502/ip/T6502/sim/verilator/kim_2/TestBench.vcd"`
6			`[dumpfile_mtime] "Sat Oct 29 01:52:21 2016"`
7			`[dumpfile_size] 9553555`
8			`[savefile] "/home/johne/socgen/work/opencores.org__Mos6502/ip/T6502/sim/verilator/kim_2/wave.sav"`
9			`[timestart] 32000`
10			`[size] 1589 854`
11			`[pos] 181 0`
12			`*-18.000000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1`
13			`[treeopen] TOP.`
14			`[treeopen] TOP.v.`
15			`[treeopen] TOP.v.test.`
16			`[sst_width] 415`
17			`[signals_width] 230`
18			`[sst_expanded] 1`
19			`[sst_vpaned_height] 245`
20			`@28`
21			`TOP.v.clk`
22			`@22`
23			`TOP.v.test.dut.ADDR[31:0]`
24			`TOP.v.test.dut.cpu_addr[15:0]`
25			`TOP.v.test.dut.cpu_rdata[15:0]`
26			`TOP.v.test.dut.data_rdata[15:0]`
27			`TOP.v.test.dut.gpio_0_in[7:0]`
28			`TOP.v.test.dut.gpio_1_in[7:0]`
29			`TOP.v.test.dut.io_module_pic_irq_in[7:0]`
30			`@29`
31			`TOP.v.test.dut.io_reg_cs`
32			`[pattern_trace] 1`
33			`[pattern_trace] 0`

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[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [Mos6502/] [ip/] [T6502/] [sim/] [verilator/] [kim_2/] [wave.sav] - Blame information for rev 135