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[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [Mos6502/] [ip/] [core/] [rtl/] [verilog/] [top.sim] - Blame information for rev 133

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reg [7*8-1:0]  A_instr;
reg [10*8-1:0] A_state;
reg [3*8-1:0]  A_alu_mode;
reg [3*8-1:0]  A_alu_op_a_sel;
reg [3*8-1:0]  A_alu_op_b_inv;
reg [3*8-1:0]  A_alu_op_b_sel;
reg [3*8-1:0]  A_alu_op_c_sel;
reg [4*8-1:0]  A_alu_status_update;
reg [3*8-1:0]  A_dest;
reg [7*8-1:0]  A_ctrl;
reg [8*8-1:0]  A_cmd;
reg [5*8-1:0]  A_ins_type;
reg [3*8-1:0]  A_idx_sel;
 
 
   always@(posedge clk)
    begin
    if (enable && now_fetch_op)
       begin
        if(prog_counter[0])
         begin
         $display("%t  %h   %h     %h",$realtime,prog_counter,prog_data[15:8],addr);
         end
        else
         begin
         $display("%t  %h   %h     %h",$realtime,prog_counter,prog_data[7:0],addr);
         end
       end
    end
 
 
always @(*) begin
   case  (state)
 
      `FETCH_OP:     A_state = "FETCH_OP  ";
       `EXECUTE:     A_state = "EXECUTE   ";
         `EXE_1:     A_state = "EXE_1     ";
         `AXE_1:     A_state = "AXE_1     ";
         `AXE_2:     A_state = "AXE_2     ";
         `IDX_1:     A_state = "IDX_1     ";
         `IDX_2:     A_state = "IDX_2     ";
         `IDX_3:     A_state = "IDX_3     ";
         `IDY_1:     A_state = "IDY_1     ";
         `IDY_2:     A_state = "IDY_2     ";
         `IDY_3:     A_state = "IDY_3     ";
         `RESET:     A_state = "RESET     ";
          `HALT:     A_state = "HALT      ";
         `INT_2:     A_state = "INT_2     ";
         `INT_1:     A_state = "INT_1     ";
        default:     A_state = "-XXXXXXXX-";
   endcase
end
 
 
 
 
 
always @(*) begin
   case  (ir)
     `ADC_IMM:
      begin
      A_instr = "ADC_IMM";
      end
 
     `ADC_ZPG:
      begin
      A_instr = "ADC_ZPG";
      end
 
     `ADC_ZPX:
      begin
      A_instr = "ADC_ZPX";
      end
 
     `ADC_ABS:
      begin
      A_instr = "ADC_ABS";
      end
 
     `ADC_ABX:
      begin
      A_instr = "ADC_ABX";
      end
 
     `ADC_ABY:
      begin
      A_instr = "ADC_ABY";
      end
 
     `ADC_IDX:
      begin
      A_instr = "ADC_IDX";
      end
 
     `ADC_IDY:
      begin
      A_instr = "ADC_IDY";
      end
 
     `AND_IMM:
      begin
      A_instr = "AND_IMM";
      end
 
     `AND_ZPG:
      begin
      A_instr = "AND_ZPG";
      end
 
     `AND_ZPX:
      begin
      A_instr = "AND_ZPX";
      end
 
     `AND_ABS:
      begin
      A_instr = "AND_ABS";
      end
 
     `AND_ABX:
      begin
      A_instr = "AND_ABX";
      end
 
     `AND_ABY:
      begin
      A_instr = "AND_ABY";
      end
 
     `AND_IDX:
      begin
      A_instr = "AND_IDX";
      end
 
     `AND_IDY:
      begin
      A_instr = "AND_IDY";
      end
 
     `ASL_ACC:
      begin
      A_instr = "ASL_ACC";
      end
 
     `ASL_ZPG:
      begin
      A_instr = "ASL_ZPG";
      end
 
     `ASL_ZPX:
      begin
      A_instr = "ASL_ZPX";
      end
 
     `ASL_ABS:
      begin
      A_instr = "ASL_ABS";
      end
 
     `ASL_ABX:
      begin
      A_instr = "ASL_ABX";
      end
 
     `BCC_REL:
      begin
      A_instr = "BCC_REL";
      end
 
     `BCS_REL:
      begin
      A_instr = "BCS_REL";
      end
 
     `BEQ_REL:
      begin
      A_instr = "BEQ_REL";
      end
 
     `BIT_ZPG:
      begin
      A_instr = "BIT_ZPG";
      end
 
     `BIT_ABS:
      begin
      A_instr = "BIT_ABS";
      end
 
     `BMI_REL:
      begin
      A_instr = "BMI_REL";
      end
 
     `BNE_REL:
      begin
      A_instr = "BNE_REL";
      end
 
     `BPL_REL:
      begin
      A_instr = "BPL_REL";
      end
 
     `BRK_IMP:
      begin
      A_instr = "BRK_IMP";
      end
 
     `BVC_REL:
      begin
      A_instr = "BVC_REL";
      end
 
     `BVS_REL:
      begin
      A_instr = "BVS_REL";
      end
 
     `CLC_IMP:
      begin
      A_instr = "CLC_IMP";
      end
 
     `CLD_IMP:
      begin
      A_instr = "CLD_IMP";
      end
 
     `CLI_IMP:
      begin
      A_instr = "CLI_IMP";
      end
 
     `CLV_IMP:
      begin
      A_instr = "CLV_IMP";
      end
 
     `CMP_IMM:
      begin
      A_instr = "CMP_IMM";
      end
 
     `CMP_ZPG:
      begin
      A_instr = "CMP_ZPG";
      end
 
     `CMP_ZPX:
      begin
      A_instr = "CMP_ZPX";
      end
 
     `CMP_ABS:
      begin
      A_instr = "CMP_ABS";
      end
 
     `CMP_ABX:
      begin
      A_instr = "CMP_ABX";
      end
 
     `CMP_ABY:
      begin
      A_instr = "CMP_ABY";
      end
 
     `CMP_IDX:
      begin
      A_instr = "CMP_IDX";
      end
 
     `CMP_IDY:
      begin
      A_instr = "CMP_IDY";
      end
 
     `CPX_IMM:
      begin
      A_instr = "CPX_IMM";
      end
 
     `CPX_ZPG:
      begin
      A_instr = "CPX_ZPG";
      end
 
     `CPX_ABS:
      begin
      A_instr = "CPX_ABS";
      end
 
     `CPY_IMM:
      begin
      A_instr = "CPY_IMM";
      end
 
     `CPY_ZPG:
      begin
      A_instr = "CPY_ZPG";
      end
 
     `CPY_ABS:
      begin
      A_instr = "CPY_ABS";
      end
 
     `DEC_ZPG:
      begin
      A_instr = "DEC_ZPG";
      end
 
 
     `DEC_ZPX:
      begin
      A_instr = "DEC_ZPX";
      end
 
     `DEC_ABS:
      begin
      A_instr = "DEC_ABS";
      end
 
     `DEC_ABX:
      begin
      A_instr = "DEC_ABX";
      end
 
     `DEX_IMP:
      begin
      A_instr = "DEX_IMP";
      end
 
     `DEY_IMP:
      begin
      A_instr = "DEY_IMP";
      end
 
     `EOR_IMM:
      begin
      A_instr = "EOR_IMM";
      end
 
     `EOR_ZPG:
      begin
      A_instr = "EOR_ZPG";
      end
 
     `EOR_ZPX:
      begin
      A_instr = "EOR_ZPX";
      end
 
     `EOR_ABS:
      begin
      A_instr = "EOR_ABS";
      end
 
     `EOR_ABX:
      begin
      A_instr = "EOR_ABX";
      end
 
     `EOR_ABY:
      begin
      A_instr = "EOR_ABY";
      end
 
     `EOR_IDX:
      begin
      A_instr = "EOR_IDX";
      end
 
     `EOR_IDY:
      begin
      A_instr = "EOR_IDY";
      end
 
     `INC_ZPG:
      begin
      A_instr = "INC_ZPG";
      end
 
     `INC_ZPX:
      begin
      A_instr = "INC_ZPX";
      end
 
     `INC_ABS:
      begin
      A_instr = "INC_ABS";
      end
 
     `INC_ABX:
      begin
      A_instr = "INC_ABX";
      end
 
     `INX_IMP:
      begin
      A_instr = "INX_IMP";
      end
 
     `INY_IMP:
      begin
      A_instr = "INY_IMP";
      end
 
     `JMP_ABS:
      begin
      A_instr = "JMP_ABS";
      end
 
     `JMP_IND:
      begin
      A_instr = "JMP_IND";
      end
 
     `JSR_ABS:
      begin
      A_instr = "JSR_ABS";
      end
 
     `LDA_IMM:
      begin
      A_instr = "LDA_IMM";
      end
 
     `LDA_ZPG:
      begin
      A_instr = "LDA_ZPG";
      end
 
     `LDA_ZPX:
      begin
      A_instr = "LDA_ZPX";
      end
 
     `LDA_ABS:
      begin
      A_instr = "LDA_ABS";
      end
 
     `LDA_ABX:
      begin
      A_instr = "LDA_ABX";
      end
 
     `LDA_ABY:
      begin
      A_instr = "LDA_ABY";
      end
 
     `LDA_IDX:
      begin
      A_instr = "LDA_IDX";
      end
 
     `LDA_IDY:
      begin
      A_instr = "LDA_IDY";
      end
 
     `LDX_IMM:
      begin
      A_instr = "LDX_IMM";
      end
 
     `LDX_ZPG:
      begin
      A_instr = "LDX_ZPG";
      end
 
     `LDX_ZPY:
      begin
      A_instr = "LDX_ZPY";
      end
 
     `LDX_ABS:
      begin
      A_instr = "LDX_ABS";
      end
 
     `LDX_ABY:
      begin
      A_instr = "LDX_ABY";
      end
 
     `LDY_IMM:
      begin
      A_instr = "LDY_IMM";
      end
 
     `LDY_ZPG:
      begin
      A_instr = "LDY_ZPG";
      end
 
     `LDY_ZPX:
      begin
      A_instr = "LDY_ZPX";
      end
 
     `LDY_ABS:
      begin
      A_instr = "LDY_ABS";
      end
 
     `LDY_ABX:
      begin
      A_instr = "LDY_ABX";
      end
 
     `LSR_ACC:
      begin
      A_instr = "LSR_ACC";
      end
 
     `LSR_ZPG:
      begin
      A_instr = "LSR_ZPG";
      end
 
     `LSR_ZPX:
      begin
      A_instr = "LSR_ZPX";
      end
 
     `LSR_ABS:
      begin
      A_instr = "LSR_ABS";
      end
 
     `LSR_ABX:
      begin
      A_instr = "LSR_ABX";
      end
 
     `NOP_IMP:
      begin
      A_instr = "NOP_IMP";
      end
 
     `ORA_IMM:
      begin
      A_instr = "ORA_IMM";
      end
 
     `ORA_ZPG:
      begin
      A_instr = "ORA_ZPG";
      end
 
     `ORA_ZPX:
      begin
      A_instr = "ORA_ZPX";
      end
 
     `ORA_ABS:
      begin
      A_instr = "ORA_ABS";
      end
 
     `ORA_ABX:
      begin
      A_instr = "ORA_ABX";
      end
 
     `ORA_ABY:
      begin
      A_instr = "ORA_ABY";
      end
 
     `ORA_IDX:
      begin
      A_instr = "ORA_IDX";
      end
 
     `ORA_IDY:
      begin
      A_instr = "ORA_IDY";
      end
 
     `PHA_IMP:
      begin
      A_instr = "PHA_IMP";
      end
 
     `PHP_IMP:
      begin
      A_instr = "PHP_IMP";
      end
 
     `PLA_IMP:
      begin
      A_instr = "PLA_IMP";
      end
 
     `PLP_IMP:
      begin
      A_instr = "PLP_IMP";
      end
 
     `ROL_ACC:
      begin
      A_instr = "ROL_ACC";
      end
 
     `ROL_ZPG:
      begin
      A_instr = "ROL_ZPG";
      end
 
     `ROL_ZPX:
      begin
      A_instr = "ROL_ZPX";
      end
 
     `ROL_ABS:
      begin
      A_instr = "ROL_ABS";
      end
 
     `ROL_ABX:
      begin
      A_instr = "ROL_ABX";
      end
 
     `ROR_ACC:
      begin
      A_instr = "ROR_ACC";
      end
 
     `ROR_ZPG:
      begin
      A_instr = "ROR_ZPG";
      end
 
     `ROR_ZPX:
      begin
      A_instr = "ROR_ZPX";
      end
 
     `ROR_ABS:
      begin
      A_instr = "ROR_ABS";
      end
 
     `ROR_ABX:
      begin
      A_instr = "ROR_ABX";
      end
 
     `RTI_IMP:
      begin
      A_instr = "RTI_IMP";
      end
 
     `RTS_IMP:
      begin
      A_instr = "RTS_IMP";
      end
 
     `SBC_IMM:
      begin
      A_instr = "SBC_IMM";
      end
 
     `SBC_ZPG:
      begin
      A_instr = "SBC_ZPG";
      end
 
     `SBC_ZPX:
      begin
      A_instr = "SBC_ZPX";
      end
 
     `SBC_ABS:
      begin
      A_instr = "SBC_ABS";
      end
 
     `SBC_ABX:
      begin
      A_instr = "SBC_ABX";
      end
 
     `SBC_ABY:
      begin
      A_instr = "SBC_ABY";
      end
 
     `SBC_IDX:
      begin
      A_instr = "SBC_IDX";
      end
 
     `SBC_IDY:
      begin
      A_instr = "SBC_IDY";
      end
 
     `SEC_IMP:
      begin
      A_instr = "SEC_IMP";
      end
 
     `SED_IMP:
      begin
      A_instr = "SED_IMP";
      end
 
     `SEI_IMP:
      begin
      A_instr = "SEI_IMP";
      end
 
     `STA_ZPG:
      begin
      A_instr = "STA_ZPG";
      end
 
     `STA_ZPX:
      begin
      A_instr = "STA_ZPX";
      end
 
     `STA_ABS:
      begin
      A_instr = "STA_ABS";
      end
 
     `STA_ABX:
      begin
      A_instr = "STA_ABX";
      end
 
     `STA_ABY:
      begin
      A_instr = "STA_ABY";
      end
 
     `STA_IDX:
      begin
      A_instr = "STA_IDX";
      end
 
     `STA_IDY:
      begin
      A_instr = "STA_IDY";
      end
 
     `STX_ZPG:
      begin
      A_instr = "STX_ZPG";
      end
 
     `STX_ZPY:
      begin
      A_instr = "STX_ZPY";
      end
 
     `STX_ABS:
      begin
      A_instr = "STX_ABS";
      end
 
     `STY_ZPG:
      begin
      A_instr = "STY_ZPG";
      end
 
     `STY_ZPX:
      begin
      A_instr = "STY_ZPX";
      end
 
     `STY_ABS:
      begin
      A_instr = "STY_ABS";
      end
 
     `TAX_IMP:
      begin
      A_instr = "TAX_IMP";
      end
 
     `TAY_IMP:
      begin
      A_instr = "TAY_IMP";
      end
 
     `TXA_IMP:
      begin
      A_instr = "TXA_IMP";
      end
 
     `TYA_IMP:
      begin
      A_instr = "TYA_IMP";
      end
 
      default:    A_instr = "XXX_XXX";
   endcase
 
end
 
 
 
 
 
 
 
 
always @(*) begin
   case  (alu_mode)
      `alu_mode_add:          begin
                              A_alu_mode = "ADD";
                              end
      `alu_mode_and:          begin
                              A_alu_mode = "AND";
                              end
      `alu_mode_orr:          begin
                              A_alu_mode = "OR ";
                              end
      `alu_mode_eor:          begin
                              A_alu_mode = "EOR";
                              end
      `alu_mode_sfl:          begin
                              A_alu_mode = "SFL";
                              end
      `alu_mode_sfr:          begin
                              A_alu_mode = "SFR";
                              end
     default:                begin
                              A_alu_mode = "XXX";
                              end
   endcase
 
end
 
 
 
 
 
 
 
 
 
 
 
// alu_op_a_sel
 
 
 
always @(*) begin
   case  (alu_op_a_sel)
      `alu_op_a_00:           begin
                              A_alu_op_a_sel = "00 ";
                              end
      `alu_op_a_acc:          begin
                              A_alu_op_a_sel = "ACC";
                              end
      `alu_op_a_x  :          begin
                              A_alu_op_a_sel = " X ";
                              end
      `alu_op_a_y  :          begin
                              A_alu_op_a_sel = " Y ";
                              end
      `alu_op_a_ff :          begin
                              A_alu_op_a_sel = " FF ";
                              end
      `alu_op_a_psr:          begin
                              A_alu_op_a_sel = "PSR";
                              end
 
      default:                begin
                              A_alu_op_a_sel = "XXX";
                              end
   endcase
 
end
 
 
 
 
 
 
 
 
 
 
// alu_op_b_sel
 
 
always @(*) begin
   case  (alu_op_b_sel)
      `alu_op_b_00:           begin
                              A_alu_op_b_sel = " 0 ";
                              end
      `alu_op_b_opnd:         begin
                              A_alu_op_b_sel = "OPR";
                              end
      `alu_op_b_stk:          begin
                              A_alu_op_b_sel = "STK";
                              end
      `alu_op_b_imm:          begin
                              A_alu_op_b_sel = "IMM";
                              end
      default:                begin
                              A_alu_op_b_sel = "XXX";
                              end
   endcase
 
end
 
 
 
 
// alu_op_b_inv
 
 
always @(*) begin
   case  (alu_op_b_inv)
      1'b1:                   begin
                              A_alu_op_b_inv = "INV";
                              end
      1'b0:                   begin
                              A_alu_op_b_inv = "   ";
                              end
 
      default:                begin
                              A_alu_op_b_inv = "XXX";
                              end
   endcase
 
end
 
 
 
 
// alu_op_c_sel
 
 
always @(*) begin
   case  (alu_op_c_sel)
      `alu_op_c_00:          A_alu_op_c_sel = " 0 ";
      `alu_op_c_01:          A_alu_op_c_sel = " 1 ";
      `alu_op_c_cin:         A_alu_op_c_sel = "CIN";
      default:               A_alu_op_c_sel = "XXX";
 
   endcase
 
end
 
 
 
// alu_status_update
 
 
 
always @(*) begin
   case  (alu_status_update)
      `alu_status_update_none:begin
                              A_alu_status_update = "    ";
                              end
      `alu_status_update_nz:  begin
                              A_alu_status_update = "N Z ";
                              end
      `alu_status_update_nzc: begin
                              A_alu_status_update = "N ZC";
                              end
      `alu_status_update_nzcv:begin
                              A_alu_status_update = "NVZC";
                              end
      `alu_status_update_wr:  begin
                              A_alu_status_update = " WR ";
                              end
      `alu_status_update_z67: begin
                              A_alu_status_update = "76Z ";
                              end
      `alu_status_update_res: begin
                              A_alu_status_update = "RES ";
                              end
      default:                begin
                              A_alu_status_update = "XXXX";
                              end
   endcase
 
end
 
 
 
 
 
 
 
// dest
 
 
always @(*) begin
   case  (dest)
      `dest_none:          A_dest = "   ";
      `dest_alu_a:         A_dest = " A ";
      `dest_alu_x:         A_dest = " X ";
      `dest_alu_y:         A_dest = " Y ";
      `dest_mem:           A_dest = "MEM";
       default:            A_dest = "XXX";
 
   endcase
 
end
 
 
 
 
// ctrl
 
 
always @(*) begin
   case  (ctrl)
      `ctrl_none:        A_ctrl = "       ";
      `ctrl_jsr:         A_ctrl = "JMP_SUB";
      `ctrl_jmp:         A_ctrl = " JUMP  ";
      `ctrl_jmp_ind:     A_ctrl = "JMP_IND";
      `ctrl_brk:         A_ctrl = " BREAK ";
      `ctrl_rti:         A_ctrl = "RET INT";
      `ctrl_rts:         A_ctrl = "RET SUB";
      `ctrl_branch:      A_ctrl = "BRANCH ";
       default:          A_ctrl = " -XXX- ";
   endcase
 
end
 
 
 
 
// cmd
 
 
always @(*) begin
   case  (cmd)
      `cmd_none:        A_cmd = "        ";
      `cmd_run:         A_cmd = "   RUN  ";
      `cmd_load_add:    A_cmd = "LOAD ADD";
      `cmd_load_vec:    A_cmd = "LOAD VEC";
       default:         A_cmd = " -XXX- ";
   endcase
 
end
 
 
 
 
 
// ins_type
 
 
always @(*) begin
   case  (ins_type)
      `ins_type_none:     A_ins_type = "     ";
      `ins_type_read:     A_ins_type = "READ ";
      `ins_type_write:    A_ins_type = "WRITE";
      `ins_type_rmw:      A_ins_type = " RMW ";
       default:           A_ins_type = "-XXX-";
   endcase
 
end
 
 
// idx_sel
 
 
always @(*) begin
   case  (idx_sel)
      `idx_sel_00:        A_idx_sel = " 0 ";
      `idx_sel_x:         A_idx_sel = " X ";
      `idx_sel_y:         A_idx_sel = " Y ";
       default:           A_idx_sel = "---";
   endcase
 
end
 
 
 
 
 
 
 
 
 

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[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [Mos6502/] [ip/] [core/] [rtl/] [verilog/] [top.sim] - Blame information for rev 133

Line No.	Rev	Author	Line
1	131	jt_eaton
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10			`reg [7*8-1:0] A_instr;`
11			`reg [10*8-1:0] A_state;`
12			`reg [3*8-1:0] A_alu_mode;`
13			`reg [3*8-1:0] A_alu_op_a_sel;`
14			`reg [3*8-1:0] A_alu_op_b_inv;`
15			`reg [3*8-1:0] A_alu_op_b_sel;`
16			`reg [3*8-1:0] A_alu_op_c_sel;`
17			`reg [4*8-1:0] A_alu_status_update;`
18			`reg [3*8-1:0] A_dest;`
19			`reg [7*8-1:0] A_ctrl;`
20			`reg [8*8-1:0] A_cmd;`
21			`reg [5*8-1:0] A_ins_type;`
22			`reg [3*8-1:0] A_idx_sel;`
23
24
25	133	jt_eaton	`always@(posedge clk)`
26			`begin`
27			`if (enable && now_fetch_op)`
28			`begin`
29			`if(prog_counter[0])`
30			`begin`
31			`$display("%t %h %h %h",$realtime,prog_counter,prog_data[15:8],addr);`
32			`end`
33			`else`
34			`begin`
35			`$display("%t %h %h %h",$realtime,prog_counter,prog_data[7:0],addr);`
36			`end`
37			`end`
38			`end`
39
40
41	131	jt_eaton	`always @(*) begin`
42			`case (state)`
43
44			`FETCH_OP: A_state = "FETCH_OP ";
45			`EXECUTE: A_state = "EXECUTE ";
46			`EXE_1: A_state = "EXE_1 ";
47			`AXE_1: A_state = "AXE_1 ";
48			`AXE_2: A_state = "AXE_2 ";
49			`IDX_1: A_state = "IDX_1 ";
50			`IDX_2: A_state = "IDX_2 ";
51			`IDX_3: A_state = "IDX_3 ";
52			`IDY_1: A_state = "IDY_1 ";
53			`IDY_2: A_state = "IDY_2 ";
54			`IDY_3: A_state = "IDY_3 ";
55			`RESET: A_state = "RESET ";
56			`HALT: A_state = "HALT ";
57			`INT_2: A_state = "INT_2 ";
58			`INT_1: A_state = "INT_1 ";
59			`default: A_state = "-XXXXXXXX-";`
60			`endcase`
61			`end`
62
63
64
65
66
67			`always @(*) begin`
68			`case (ir)`
69			`ADC_IMM:
70			`begin`
71			`A_instr = "ADC_IMM";`
72			`end`
73
74			`ADC_ZPG:
75			`begin`
76			`A_instr = "ADC_ZPG";`
77			`end`
78
79			`ADC_ZPX:
80			`begin`
81			`A_instr = "ADC_ZPX";`
82			`end`
83
84			`ADC_ABS:
85			`begin`
86			`A_instr = "ADC_ABS";`
87			`end`
88
89			`ADC_ABX:
90			`begin`
91			`A_instr = "ADC_ABX";`
92			`end`
93
94			`ADC_ABY:
95			`begin`
96			`A_instr = "ADC_ABY";`
97			`end`
98
99			`ADC_IDX:
100			`begin`
101			`A_instr = "ADC_IDX";`
102			`end`
103
104			`ADC_IDY:
105			`begin`
106			`A_instr = "ADC_IDY";`
107			`end`
108
109			`AND_IMM:
110			`begin`
111			`A_instr = "AND_IMM";`
112			`end`
113
114			`AND_ZPG:
115			`begin`
116			`A_instr = "AND_ZPG";`
117			`end`
118
119			`AND_ZPX:
120			`begin`
121			`A_instr = "AND_ZPX";`
122			`end`
123
124			`AND_ABS:
125			`begin`
126			`A_instr = "AND_ABS";`
127			`end`
128
129			`AND_ABX:
130			`begin`
131			`A_instr = "AND_ABX";`
132			`end`
133
134			`AND_ABY:
135			`begin`
136			`A_instr = "AND_ABY";`
137			`end`
138
139			`AND_IDX:
140			`begin`
141			`A_instr = "AND_IDX";`
142			`end`
143
144			`AND_IDY:
145			`begin`
146			`A_instr = "AND_IDY";`
147			`end`
148
149			`ASL_ACC:
150			`begin`
151			`A_instr = "ASL_ACC";`
152			`end`
153
154			`ASL_ZPG:
155			`begin`
156			`A_instr = "ASL_ZPG";`
157			`end`
158
159			`ASL_ZPX:
160			`begin`
161			`A_instr = "ASL_ZPX";`
162			`end`
163
164			`ASL_ABS:
165			`begin`
166			`A_instr = "ASL_ABS";`
167			`end`
168
169			`ASL_ABX:
170			`begin`
171			`A_instr = "ASL_ABX";`
172			`end`
173
174			`BCC_REL:
175			`begin`
176			`A_instr = "BCC_REL";`
177			`end`
178
179			`BCS_REL:
180			`begin`
181			`A_instr = "BCS_REL";`
182			`end`
183
184			`BEQ_REL:
185			`begin`
186			`A_instr = "BEQ_REL";`
187			`end`
188
189			`BIT_ZPG:
190			`begin`
191			`A_instr = "BIT_ZPG";`
192			`end`
193
194			`BIT_ABS:
195			`begin`
196			`A_instr = "BIT_ABS";`
197			`end`
198
199			`BMI_REL:
200			`begin`
201			`A_instr = "BMI_REL";`
202			`end`
203
204			`BNE_REL:
205			`begin`
206			`A_instr = "BNE_REL";`
207			`end`
208
209			`BPL_REL:
210			`begin`
211			`A_instr = "BPL_REL";`
212			`end`
213
214			`BRK_IMP:
215			`begin`
216			`A_instr = "BRK_IMP";`
217			`end`
218
219			`BVC_REL:
220			`begin`
221			`A_instr = "BVC_REL";`
222			`end`
223
224			`BVS_REL:
225			`begin`
226			`A_instr = "BVS_REL";`
227			`end`
228
229			`CLC_IMP:
230			`begin`
231			`A_instr = "CLC_IMP";`
232			`end`
233
234			`CLD_IMP:
235			`begin`
236			`A_instr = "CLD_IMP";`
237			`end`
238
239			`CLI_IMP:
240			`begin`
241			`A_instr = "CLI_IMP";`
242			`end`
243
244			`CLV_IMP:
245			`begin`
246			`A_instr = "CLV_IMP";`
247			`end`
248
249			`CMP_IMM:
250			`begin`
251			`A_instr = "CMP_IMM";`
252			`end`
253
254			`CMP_ZPG:
255			`begin`
256			`A_instr = "CMP_ZPG";`
257			`end`
258
259			`CMP_ZPX:
260			`begin`
261			`A_instr = "CMP_ZPX";`
262			`end`
263
264			`CMP_ABS:
265			`begin`
266			`A_instr = "CMP_ABS";`
267			`end`
268
269			`CMP_ABX:
270			`begin`
271			`A_instr = "CMP_ABX";`
272			`end`
273
274			`CMP_ABY:
275			`begin`
276			`A_instr = "CMP_ABY";`
277			`end`
278
279			`CMP_IDX:
280			`begin`
281			`A_instr = "CMP_IDX";`
282			`end`
283
284			`CMP_IDY:
285			`begin`
286			`A_instr = "CMP_IDY";`
287			`end`
288
289			`CPX_IMM:
290			`begin`
291			`A_instr = "CPX_IMM";`
292			`end`
293
294			`CPX_ZPG:
295			`begin`
296			`A_instr = "CPX_ZPG";`
297			`end`
298
299			`CPX_ABS:
300			`begin`
301			`A_instr = "CPX_ABS";`
302			`end`
303
304			`CPY_IMM:
305			`begin`
306			`A_instr = "CPY_IMM";`
307			`end`
308
309			`CPY_ZPG:
310			`begin`
311			`A_instr = "CPY_ZPG";`
312			`end`
313
314			`CPY_ABS:
315			`begin`
316			`A_instr = "CPY_ABS";`
317			`end`
318
319			`DEC_ZPG:
320			`begin`
321			`A_instr = "DEC_ZPG";`
322			`end`
323
324
325			`DEC_ZPX:
326			`begin`
327			`A_instr = "DEC_ZPX";`
328			`end`
329
330			`DEC_ABS:
331			`begin`
332			`A_instr = "DEC_ABS";`
333			`end`
334
335			`DEC_ABX:
336			`begin`
337			`A_instr = "DEC_ABX";`
338			`end`
339
340			`DEX_IMP:
341			`begin`
342			`A_instr = "DEX_IMP";`
343			`end`
344
345			`DEY_IMP:
346			`begin`
347			`A_instr = "DEY_IMP";`
348			`end`
349
350			`EOR_IMM:
351			`begin`
352			`A_instr = "EOR_IMM";`
353			`end`
354
355			`EOR_ZPG:
356			`begin`
357			`A_instr = "EOR_ZPG";`
358			`end`
359
360			`EOR_ZPX:
361			`begin`
362			`A_instr = "EOR_ZPX";`
363			`end`
364
365			`EOR_ABS:
366			`begin`
367			`A_instr = "EOR_ABS";`
368			`end`
369
370			`EOR_ABX:
371			`begin`
372			`A_instr = "EOR_ABX";`
373			`end`
374
375			`EOR_ABY:
376			`begin`
377			`A_instr = "EOR_ABY";`
378			`end`
379
380			`EOR_IDX:
381			`begin`
382			`A_instr = "EOR_IDX";`
383			`end`
384
385			`EOR_IDY:
386			`begin`
387			`A_instr = "EOR_IDY";`
388			`end`
389
390			`INC_ZPG:
391			`begin`
392			`A_instr = "INC_ZPG";`
393			`end`
394
395			`INC_ZPX:
396			`begin`
397			`A_instr = "INC_ZPX";`
398			`end`
399
400			`INC_ABS:
401			`begin`
402			`A_instr = "INC_ABS";`
403			`end`
404
405			`INC_ABX:
406			`begin`
407			`A_instr = "INC_ABX";`
408			`end`
409
410			`INX_IMP:
411			`begin`
412			`A_instr = "INX_IMP";`
413			`end`
414
415			`INY_IMP:
416			`begin`
417			`A_instr = "INY_IMP";`
418			`end`
419
420			`JMP_ABS:
421			`begin`
422			`A_instr = "JMP_ABS";`
423			`end`
424
425			`JMP_IND:
426			`begin`
427			`A_instr = "JMP_IND";`
428			`end`
429
430			`JSR_ABS:
431			`begin`
432			`A_instr = "JSR_ABS";`
433			`end`
434
435			`LDA_IMM:
436			`begin`
437			`A_instr = "LDA_IMM";`
438			`end`
439
440			`LDA_ZPG:
441			`begin`
442			`A_instr = "LDA_ZPG";`
443			`end`
444
445			`LDA_ZPX:
446			`begin`
447			`A_instr = "LDA_ZPX";`
448			`end`
449
450			`LDA_ABS:
451			`begin`
452			`A_instr = "LDA_ABS";`
453			`end`
454
455			`LDA_ABX:
456			`begin`
457			`A_instr = "LDA_ABX";`
458			`end`
459
460			`LDA_ABY:
461			`begin`
462			`A_instr = "LDA_ABY";`
463			`end`
464
465			`LDA_IDX:
466			`begin`
467			`A_instr = "LDA_IDX";`
468			`end`
469
470			`LDA_IDY:
471			`begin`
472			`A_instr = "LDA_IDY";`
473			`end`
474
475			`LDX_IMM:
476			`begin`
477			`A_instr = "LDX_IMM";`
478			`end`
479
480			`LDX_ZPG:
481			`begin`
482			`A_instr = "LDX_ZPG";`
483			`end`
484
485			`LDX_ZPY:
486			`begin`
487			`A_instr = "LDX_ZPY";`
488			`end`
489
490			`LDX_ABS:
491			`begin`
492			`A_instr = "LDX_ABS";`
493			`end`
494
495			`LDX_ABY:
496			`begin`
497			`A_instr = "LDX_ABY";`
498			`end`
499
500			`LDY_IMM:
501			`begin`
502			`A_instr = "LDY_IMM";`
503			`end`
504
505			`LDY_ZPG:
506			`begin`
507			`A_instr = "LDY_ZPG";`
508			`end`
509
510			`LDY_ZPX:
511			`begin`
512			`A_instr = "LDY_ZPX";`
513			`end`
514
515			`LDY_ABS:
516			`begin`
517			`A_instr = "LDY_ABS";`
518			`end`
519
520			`LDY_ABX:
521			`begin`
522			`A_instr = "LDY_ABX";`
523			`end`
524
525			`LSR_ACC:
526			`begin`
527			`A_instr = "LSR_ACC";`
528			`end`
529
530			`LSR_ZPG:
531			`begin`
532			`A_instr = "LSR_ZPG";`
533			`end`
534
535			`LSR_ZPX:
536			`begin`
537			`A_instr = "LSR_ZPX";`
538			`end`
539
540			`LSR_ABS:
541			`begin`
542			`A_instr = "LSR_ABS";`
543			`end`
544
545			`LSR_ABX:
546			`begin`
547			`A_instr = "LSR_ABX";`
548			`end`
549
550			`NOP_IMP:
551			`begin`
552			`A_instr = "NOP_IMP";`
553			`end`
554
555			`ORA_IMM:
556			`begin`
557			`A_instr = "ORA_IMM";`
558			`end`
559
560			`ORA_ZPG:
561			`begin`
562			`A_instr = "ORA_ZPG";`
563			`end`
564
565			`ORA_ZPX:
566			`begin`
567			`A_instr = "ORA_ZPX";`
568			`end`
569
570			`ORA_ABS:
571			`begin`
572			`A_instr = "ORA_ABS";`
573			`end`
574
575			`ORA_ABX:
576			`begin`
577			`A_instr = "ORA_ABX";`
578			`end`
579
580			`ORA_ABY:
581			`begin`
582			`A_instr = "ORA_ABY";`
583			`end`
584
585			`ORA_IDX:
586			`begin`
587			`A_instr = "ORA_IDX";`
588			`end`
589
590			`ORA_IDY:
591			`begin`
592			`A_instr = "ORA_IDY";`
593			`end`
594
595			`PHA_IMP:
596			`begin`
597			`A_instr = "PHA_IMP";`
598			`end`
599
600			`PHP_IMP:
601			`begin`
602			`A_instr = "PHP_IMP";`
603			`end`
604
605			`PLA_IMP:
606			`begin`
607			`A_instr = "PLA_IMP";`
608			`end`
609
610			`PLP_IMP:
611			`begin`
612			`A_instr = "PLP_IMP";`
613			`end`
614
615			`ROL_ACC:
616			`begin`
617			`A_instr = "ROL_ACC";`
618			`end`
619
620			`ROL_ZPG:
621			`begin`
622			`A_instr = "ROL_ZPG";`
623			`end`
624
625			`ROL_ZPX:
626			`begin`
627			`A_instr = "ROL_ZPX";`
628			`end`
629
630			`ROL_ABS:
631			`begin`
632			`A_instr = "ROL_ABS";`
633			`end`
634
635			`ROL_ABX:
636			`begin`
637			`A_instr = "ROL_ABX";`
638			`end`
639
640			`ROR_ACC:
641			`begin`
642			`A_instr = "ROR_ACC";`
643			`end`
644
645			`ROR_ZPG:
646			`begin`
647			`A_instr = "ROR_ZPG";`
648			`end`
649
650			`ROR_ZPX:
651			`begin`
652			`A_instr = "ROR_ZPX";`
653			`end`
654
655			`ROR_ABS:
656			`begin`
657			`A_instr = "ROR_ABS";`
658			`end`
659
660			`ROR_ABX:
661			`begin`
662			`A_instr = "ROR_ABX";`
663			`end`
664
665			`RTI_IMP:
666			`begin`
667			`A_instr = "RTI_IMP";`
668			`end`
669
670			`RTS_IMP:
671			`begin`
672			`A_instr = "RTS_IMP";`
673			`end`
674
675			`SBC_IMM:
676			`begin`
677			`A_instr = "SBC_IMM";`
678			`end`
679
680			`SBC_ZPG:
681			`begin`
682			`A_instr = "SBC_ZPG";`
683			`end`
684
685			`SBC_ZPX:
686			`begin`
687			`A_instr = "SBC_ZPX";`
688			`end`
689
690			`SBC_ABS:
691			`begin`
692			`A_instr = "SBC_ABS";`
693			`end`
694
695			`SBC_ABX:
696			`begin`
697			`A_instr = "SBC_ABX";`
698			`end`
699
700			`SBC_ABY:
701			`begin`
702			`A_instr = "SBC_ABY";`
703			`end`
704
705			`SBC_IDX:
706			`begin`
707			`A_instr = "SBC_IDX";`
708			`end`
709
710			`SBC_IDY:
711			`begin`
712			`A_instr = "SBC_IDY";`
713			`end`
714
715			`SEC_IMP:
716			`begin`
717			`A_instr = "SEC_IMP";`
718			`end`
719
720			`SED_IMP:
721			`begin`
722			`A_instr = "SED_IMP";`
723			`end`
724
725			`SEI_IMP:
726			`begin`
727			`A_instr = "SEI_IMP";`
728			`end`
729
730			`STA_ZPG:
731			`begin`
732			`A_instr = "STA_ZPG";`
733			`end`
734
735			`STA_ZPX:
736			`begin`
737			`A_instr = "STA_ZPX";`
738			`end`
739
740			`STA_ABS:
741			`begin`
742			`A_instr = "STA_ABS";`
743			`end`
744
745			`STA_ABX:
746			`begin`
747			`A_instr = "STA_ABX";`
748			`end`
749
750			`STA_ABY:
751			`begin`
752			`A_instr = "STA_ABY";`
753			`end`
754
755			`STA_IDX:
756			`begin`
757			`A_instr = "STA_IDX";`
758			`end`
759
760			`STA_IDY:
761			`begin`
762			`A_instr = "STA_IDY";`
763			`end`
764
765			`STX_ZPG:
766			`begin`
767			`A_instr = "STX_ZPG";`
768			`end`
769
770			`STX_ZPY:
771			`begin`
772			`A_instr = "STX_ZPY";`
773			`end`
774
775			`STX_ABS:
776			`begin`
777			`A_instr = "STX_ABS";`
778			`end`
779
780			`STY_ZPG:
781			`begin`
782			`A_instr = "STY_ZPG";`
783			`end`
784
785			`STY_ZPX:
786			`begin`
787			`A_instr = "STY_ZPX";`
788			`end`
789
790			`STY_ABS:
791			`begin`
792			`A_instr = "STY_ABS";`
793			`end`
794
795			`TAX_IMP:
796			`begin`
797			`A_instr = "TAX_IMP";`
798			`end`
799
800			`TAY_IMP:
801			`begin`
802			`A_instr = "TAY_IMP";`
803			`end`
804
805			`TXA_IMP:
806			`begin`
807			`A_instr = "TXA_IMP";`
808			`end`
809
810			`TYA_IMP:
811			`begin`
812			`A_instr = "TYA_IMP";`
813			`end`
814
815			`default: A_instr = "XXX_XXX";`
816			`endcase`
817
818			`end`
819
820
821
822
823
824
825
826
827			`always @(*) begin`
828			`case (alu_mode)`
829			`alu_mode_add: begin
830			`A_alu_mode = "ADD";`
831			`end`
832			`alu_mode_and: begin
833			`A_alu_mode = "AND";`
834			`end`
835			`alu_mode_orr: begin
836			`A_alu_mode = "OR ";`
837			`end`
838			`alu_mode_eor: begin
839			`A_alu_mode = "EOR";`
840			`end`
841			`alu_mode_sfl: begin
842			`A_alu_mode = "SFL";`
843			`end`
844			`alu_mode_sfr: begin
845			`A_alu_mode = "SFR";`
846			`end`
847			`default: begin`
848			`A_alu_mode = "XXX";`
849			`end`
850			`endcase`
851
852			`end`
853
854
855
856
857
858
859
860
861
862
863
864			`// alu_op_a_sel`
865
866
867
868			`always @(*) begin`
869			`case (alu_op_a_sel)`
870			`alu_op_a_00: begin
871			`A_alu_op_a_sel = "00 ";`
872			`end`
873			`alu_op_a_acc: begin
874			`A_alu_op_a_sel = "ACC";`
875			`end`
876			`alu_op_a_x : begin
877			`A_alu_op_a_sel = " X ";`
878			`end`
879			`alu_op_a_y : begin
880			`A_alu_op_a_sel = " Y ";`
881			`end`
882			`alu_op_a_ff : begin
883			`A_alu_op_a_sel = " FF ";`
884			`end`
885			`alu_op_a_psr: begin
886			`A_alu_op_a_sel = "PSR";`
887			`end`
888
889			`default: begin`
890			`A_alu_op_a_sel = "XXX";`
891			`end`
892			`endcase`
893
894			`end`
895
896
897
898
899
900
901
902
903
904
905			`// alu_op_b_sel`
906
907
908			`always @(*) begin`
909			`case (alu_op_b_sel)`
910			`alu_op_b_00: begin
911			`A_alu_op_b_sel = " 0 ";`
912			`end`
913			`alu_op_b_opnd: begin
914			`A_alu_op_b_sel = "OPR";`
915			`end`
916			`alu_op_b_stk: begin
917			`A_alu_op_b_sel = "STK";`
918			`end`
919			`alu_op_b_imm: begin
920			`A_alu_op_b_sel = "IMM";`
921			`end`
922			`default: begin`
923			`A_alu_op_b_sel = "XXX";`
924			`end`
925			`endcase`
926
927			`end`
928
929
930
931
932			`// alu_op_b_inv`
933
934
935			`always @(*) begin`
936			`case (alu_op_b_inv)`
937			`1'b1: begin`
938			`A_alu_op_b_inv = "INV";`
939			`end`
940			`1'b0: begin`
941			`A_alu_op_b_inv = " ";`
942			`end`
943
944			`default: begin`
945			`A_alu_op_b_inv = "XXX";`
946			`end`
947			`endcase`
948
949			`end`
950
951
952
953
954			`// alu_op_c_sel`
955
956
957			`always @(*) begin`
958			`case (alu_op_c_sel)`
959			`alu_op_c_00: A_alu_op_c_sel = " 0 ";
960			`alu_op_c_01: A_alu_op_c_sel = " 1 ";
961			`alu_op_c_cin: A_alu_op_c_sel = "CIN";
962			`default: A_alu_op_c_sel = "XXX";`
963
964			`endcase`
965
966			`end`
967
968
969
970			`// alu_status_update`
971
972
973
974			`always @(*) begin`
975			`case (alu_status_update)`
976			`alu_status_update_none:begin
977			`A_alu_status_update = " ";`
978			`end`
979			`alu_status_update_nz: begin
980			`A_alu_status_update = "N Z ";`
981			`end`
982			`alu_status_update_nzc: begin
983			`A_alu_status_update = "N ZC";`
984			`end`
985			`alu_status_update_nzcv:begin
986			`A_alu_status_update = "NVZC";`
987			`end`
988			`alu_status_update_wr: begin
989			`A_alu_status_update = " WR ";`
990			`end`
991			`alu_status_update_z67: begin
992			`A_alu_status_update = "76Z ";`
993			`end`
994			`alu_status_update_res: begin
995			`A_alu_status_update = "RES ";`
996			`end`
997			`default: begin`
998			`A_alu_status_update = "XXXX";`
999			`end`
1000			`endcase`
1001
1002			`end`
1003
1004
1005
1006
1007
1008
1009
1010			`// dest`
1011
1012
1013			`always @(*) begin`
1014			`case (dest)`
1015			`dest_none: A_dest = " ";
1016			`dest_alu_a: A_dest = " A ";
1017			`dest_alu_x: A_dest = " X ";
1018			`dest_alu_y: A_dest = " Y ";
1019			`dest_mem: A_dest = "MEM";
1020			`default: A_dest = "XXX";`
1021
1022			`endcase`
1023
1024			`end`
1025
1026
1027
1028
1029			`// ctrl`
1030
1031
1032			`always @(*) begin`
1033			`case (ctrl)`
1034			`ctrl_none: A_ctrl = " ";
1035			`ctrl_jsr: A_ctrl = "JMP_SUB";
1036			`ctrl_jmp: A_ctrl = " JUMP ";
1037			`ctrl_jmp_ind: A_ctrl = "JMP_IND";
1038			`ctrl_brk: A_ctrl = " BREAK ";
1039			`ctrl_rti: A_ctrl = "RET INT";
1040			`ctrl_rts: A_ctrl = "RET SUB";
1041			`ctrl_branch: A_ctrl = "BRANCH ";
1042			`default: A_ctrl = " -XXX- ";`
1043			`endcase`
1044
1045			`end`
1046
1047
1048
1049
1050			`// cmd`
1051
1052
1053			`always @(*) begin`
1054			`case (cmd)`
1055			`cmd_none: A_cmd = " ";
1056			`cmd_run: A_cmd = " RUN ";
1057			`cmd_load_add: A_cmd = "LOAD ADD";
1058			`cmd_load_vec: A_cmd = "LOAD VEC";
1059			`default: A_cmd = " -XXX- ";`
1060			`endcase`
1061
1062			`end`
1063
1064
1065
1066
1067
1068			`// ins_type`
1069
1070
1071			`always @(*) begin`
1072			`case (ins_type)`
1073			`ins_type_none: A_ins_type = " ";
1074			`ins_type_read: A_ins_type = "READ ";
1075			`ins_type_write: A_ins_type = "WRITE";
1076			`ins_type_rmw: A_ins_type = " RMW ";
1077			`default: A_ins_type = "-XXX-";`
1078			`endcase`
1079
1080			`end`
1081
1082
1083			`// idx_sel`
1084
1085
1086			`always @(*) begin`
1087			`case (idx_sel)`
1088			`idx_sel_00: A_idx_sel = " 0 ";
1089			`idx_sel_x: A_idx_sel = " X ";
1090			`idx_sel_y: A_idx_sel = " Y ";
1091			`default: A_idx_sel = "---";`
1092			`endcase`
1093
1094			`end`
1095
1096
1097
1098
1099
1100
1101
1102
1103