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[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [Mos6502/] [ip/] [cpu/] [sim/] [testbenches/] [xml/] [cpu_def_lint.xml] - Blame information for rev 135

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xmlns:ipxact="http://www.accellera.org/XMLSchema/IPXACT/1685-2014"
xmlns:socgen="http://opencores.org"
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
xsi:schemaLocation="http://www.accellera.org/XMLSchema/IPXACT/1685-2014
http://www.accellera.org/XMLSchema/IPXACT/1685-2014/index.xsd">
 
opencores.org
Mos6502
cpu
def_lint
 
 
 
 
 
 
 

 
 
 
       
 
              
              Dut
              
              
                                   ipxact:library="Mos6502"
                                   ipxact:name="cpu"
                                   ipxact:version="def_dut.params"/>
              
              
 
 
              
              lint
              :*Lint:*
              Verilog
              fs-lint
              
 
              
              rtl_check
              
              
                                   ipxact:library="Testbench"
                                   ipxact:name="toolflow"
                                   ipxact:version="rtl_check"/>
              
              
 
      
 
 
 
 
 

 
 
 
 
 
 
 
 
 
  
 
 
 
 
 
    
      fs-lint
 
      
        
        ../verilog/lint/cpu_def_lint
        verilogSource
        module
      
 
 
    
 
 
 
 
 
 
  
 
 
 
 
 
 
 
 
 


Line No.	Rev	Author	Line
1	131	jt_eaton
2
30	135	jt_eaton
31			`xmlns:ipxact="http://www.accellera.org/XMLSchema/IPXACT/1685-2014"`
32	131	jt_eaton	`xmlns:socgen="http://opencores.org"`
33			`xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"`
34	135	jt_eaton	`xsi:schemaLocation="http://www.accellera.org/XMLSchema/IPXACT/1685-2014`
35			`http://www.accellera.org/XMLSchema/IPXACT/1685-2014/index.xsd">`
36	131	jt_eaton
37	135	jt_eaton	`opencores.org`
38			`Mos6502`
39			`cpu`
40			`def_lint`
41	131	jt_eaton
42
43
44
45
46	133	jt_eaton
47	131	jt_eaton
48	135	jt_eaton
49	131	jt_eaton
50
51
52	135	jt_eaton
53	131	jt_eaton
54	135	jt_eaton
55			`Dut`
56
57
58			`ipxact:library="Mos6502"`
59			`ipxact:name="cpu"`
60			`ipxact:version="def_dut.params"/>`
61
62
63	131	jt_eaton
64
65	135	jt_eaton
66			`lint`
67			`:Lint:`
68			`Verilog`
69			`fs-lint`
70
71	131	jt_eaton
72	135	jt_eaton
73			`rtl_check`
74
75
76			`ipxact:library="Testbench"`
77			`ipxact:name="toolflow"`
78			`ipxact:version="rtl_check"/>`
79
80
81	131	jt_eaton
82	135	jt_eaton
83	131	jt_eaton
84
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88	135	jt_eaton
89	131	jt_eaton
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98	135	jt_eaton
99	131	jt_eaton
100
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104	135	jt_eaton
105			`fs-lint`
106	131	jt_eaton
107	135	jt_eaton
108
109			`../verilog/lint/cpu_def_lint`
110			`verilogSource`
111			`module`
112
113	131	jt_eaton
114
115	135	jt_eaton
116	131	jt_eaton
117
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122	135	jt_eaton
123	131	jt_eaton
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132	135	jt_eaton

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[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [Mos6502/] [ip/] [cpu/] [sim/] [testbenches/] [xml/] [cpu_def_lint.xml] - Blame information for rev 135