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[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [Mos6502/] [sw/] [tim_1/] [tim_1.asm] - Blame information for rev 131

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         include ../io_module/io_module.asm
 
 
 
address       = $00
str_1         = $ff00
 
 
             * = $c000  ; assemble start
               code
 
.vec               jmp  .nmi_vec
                   jmp  .irq_vec
                   jmp  .start
 
 
.put_c          pha
.put_cl         lda io_base+io_pic_int
                   and #$08
                   beq .put_cl
                   pla
                   sta io_base+io_uart_xmt
                   rts
 
.prtbyt            pha
                   lsr a
                   lsr a
                   lsr a
                   lsr a
                   jsr  .hexta
                   pla
 
.hexta             and #$0f
                   cmp #$0a
                   clc
                   bmi .hexta1
                   adc #$07
.hexta1            adc #$30
                   jmp .put_c
 
 
.delay             lda #$ff
                   clc
                   adc #$01
                   bne .delay
                   rts
 
 
.send_ps           sta io_base+io_ps2_data
                   lda #$64
                   sta io_base+io_utim_cnt
                   lda #$02
                   sta io_base+io_ps2_cntrl
.lp_100            lda io_base+io_utim_cnt
                   bne .lp_100
                   lda #$00
                   sta io_base+io_ps2_cntrl
 
.rcv_ps            lda io_base+io_ps2_stat
                   and #$40
                   beq .rcv_ps
                   lda io_base+io_ps2_data
                   nop
                   rts
 
 
.start             lda #$ff
                   jsr .send_ps
                   jsr .rcv_ps
                   jsr .rcv_ps
 
                   jsr .delay
                   jsr .delay
                   jsr .delay
                   jsr .delay
 
                   lda #$f3
                   jsr .send_ps
                   jsr .delay
 
                   lda #$c8
                   jsr .send_ps
                   jsr .delay
 
                   lda #$f3
                   jsr .send_ps
                   jsr .delay
 
                   lda #$64
                   jsr .send_ps
                   jsr .delay
 
                   lda #$f3
                   jsr .send_ps
                   jsr .delay
 
                   lda #$50
                   jsr .send_ps
                   jsr .delay
 
 
                   lda #$f2
                   jsr .send_ps
                   jsr .delay
 
                   jsr .rcv_ps
                   jsr .delay
 
                   lda #$e8
                   jsr .send_ps
                   jsr .delay
 
                   lda #$03
                   jsr .send_ps
                   jsr .delay
 
                   lda #$f3
                   jsr .send_ps
                   jsr .delay
 
                   lda #$28
                   jsr .send_ps
                   jsr .delay
 
                   lda #$f4
                   jsr .send_ps
 
 
                   nop
                   nop
                   nop
                   nop
                   nop
                   nop
                   nop
                   nop
                   nop
                   nop
                   nop
                   nop
                   nop
                   lda #$01
                   sta io_base+io_ps2_cntrl
 
 
 
                   lda #$c0
                   sta io_base+io_uart_cnt
                   ldx #$00
                   ldy #$00
                   lda #$fa
                   sta address
                   lda #$ff
                   sta address+1
 
.prn_add           ldy #$00
                   lda address+1
                   jsr .prtbyt
                   lda address
                   jsr .prtbyt
                   lda #$20
                   jsr .put_c
 
 
                   ldy  #$00
                   lda (address),y
                   jsr .prtbyt
                   lda #$20
                   jsr .put_c
 
                   ldx #$00
 
.lab_01            lda  str_1,X ;
                   beq .lab_80
                   jsr .put_c
                   inx
                   bne .lab_01  ;
.lab_80            lda #$0d
                   jsr .put_c
                   lda #$0a
                   jsr .put_c
 
.lab_81            lda io_base+io_ps2_xpos
                   sta io_base+io_gpio_0
                   lda io_base+io_ps2_ypos
                   sta io_base+io_gpio_1
 
                   lda io_base+io_pic_int
 
                   and #$04
                   beq .lab_81
                   lda io_base+io_uart_rcv
                   sta io_base+io_vga_ascii
                   inc address
                   bne .prn_add
                   inc address+1
                   jmp .prn_add
 
 
 
 
.irq_vec           pha
                   txa
                   tax
                   pla
                   rti
 
.nmi_vec           pha
                   pla
                   rti
 
 
             * = $c3fa  ; vectors
 
 
     dw .nmi_vec               ;
     dw .start                 ;
     dw .irq_vec               ;
 
 code
 
 
 
 
 
 

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[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [Mos6502/] [sw/] [tim_1/] [tim_1.asm] - Blame information for rev 131

Line No.	Rev	Author	Line
1	131	jt_eaton
2			`include ../io_module/io_module.asm`
3
4
5
6			`address = $00`
7			`str_1 = $ff00`
8
9
10			`* = $c000 ; assemble start`
11			`code`
12
13			`.vec jmp .nmi_vec`
14			`jmp .irq_vec`
15			`jmp .start`
16
17
18			`.put_c pha`
19			`.put_cl lda io_base+io_pic_int`
20			`and #$08`
21			`beq .put_cl`
22			`pla`
23			`sta io_base+io_uart_xmt`
24			`rts`
25
26			`.prtbyt pha`
27			`lsr a`
28			`lsr a`
29			`lsr a`
30			`lsr a`
31			`jsr .hexta`
32			`pla`
33
34			`.hexta and #$0f`
35			`cmp #$0a`
36			`clc`
37			`bmi .hexta1`
38			`adc #$07`
39			`.hexta1 adc #$30`
40			`jmp .put_c`
41
42
43			`.delay lda #$ff`
44			`clc`
45			`adc #$01`
46			`bne .delay`
47			`rts`
48
49
50			`.send_ps sta io_base+io_ps2_data`
51			`lda #$64`
52			`sta io_base+io_utim_cnt`
53			`lda #$02`
54			`sta io_base+io_ps2_cntrl`
55			`.lp_100 lda io_base+io_utim_cnt`
56			`bne .lp_100`
57			`lda #$00`
58			`sta io_base+io_ps2_cntrl`
59
60			`.rcv_ps lda io_base+io_ps2_stat`
61			`and #$40`
62			`beq .rcv_ps`
63			`lda io_base+io_ps2_data`
64			`nop`
65			`rts`
66
67
68			`.start lda #$ff`
69			`jsr .send_ps`
70			`jsr .rcv_ps`
71			`jsr .rcv_ps`
72
73			`jsr .delay`
74			`jsr .delay`
75			`jsr .delay`
76			`jsr .delay`
77
78			`lda #$f3`
79			`jsr .send_ps`
80			`jsr .delay`
81
82			`lda #$c8`
83			`jsr .send_ps`
84			`jsr .delay`
85
86			`lda #$f3`
87			`jsr .send_ps`
88			`jsr .delay`
89
90			`lda #$64`
91			`jsr .send_ps`
92			`jsr .delay`
93
94			`lda #$f3`
95			`jsr .send_ps`
96			`jsr .delay`
97
98			`lda #$50`
99			`jsr .send_ps`
100			`jsr .delay`
101
102
103			`lda #$f2`
104			`jsr .send_ps`
105			`jsr .delay`
106
107			`jsr .rcv_ps`
108			`jsr .delay`
109
110			`lda #$e8`
111			`jsr .send_ps`
112			`jsr .delay`
113
114			`lda #$03`
115			`jsr .send_ps`
116			`jsr .delay`
117
118			`lda #$f3`
119			`jsr .send_ps`
120			`jsr .delay`
121
122			`lda #$28`
123			`jsr .send_ps`
124			`jsr .delay`
125
126			`lda #$f4`
127			`jsr .send_ps`
128
129
130			`nop`
131			`nop`
132			`nop`
133			`nop`
134			`nop`
135			`nop`
136			`nop`
137			`nop`
138			`nop`
139			`nop`
140			`nop`
141			`nop`
142			`nop`
143			`lda #$01`
144			`sta io_base+io_ps2_cntrl`
145
146
147
148			`lda #$c0`
149			`sta io_base+io_uart_cnt`
150			`ldx #$00`
151			`ldy #$00`
152			`lda #$fa`
153			`sta address`
154			`lda #$ff`
155			`sta address+1`
156
157			`.prn_add ldy #$00`
158			`lda address+1`
159			`jsr .prtbyt`
160			`lda address`
161			`jsr .prtbyt`
162			`lda #$20`
163			`jsr .put_c`
164
165
166			`ldy #$00`
167			`lda (address),y`
168			`jsr .prtbyt`
169			`lda #$20`
170			`jsr .put_c`
171
172			`ldx #$00`
173
174			`.lab_01 lda str_1,X ;`
175			`beq .lab_80`
176			`jsr .put_c`
177			`inx`
178			`bne .lab_01 ;`
179			`.lab_80 lda #$0d`
180			`jsr .put_c`
181			`lda #$0a`
182			`jsr .put_c`
183
184			`.lab_81 lda io_base+io_ps2_xpos`
185			`sta io_base+io_gpio_0`
186			`lda io_base+io_ps2_ypos`
187			`sta io_base+io_gpio_1`
188
189			`lda io_base+io_pic_int`
190
191			`and #$04`
192			`beq .lab_81`
193			`lda io_base+io_uart_rcv`
194			`sta io_base+io_vga_ascii`
195			`inc address`
196			`bne .prn_add`
197			`inc address+1`
198			`jmp .prn_add`
199
200
201
202
203			`.irq_vec pha`
204			`txa`
205			`tax`
206			`pla`
207			`rti`
208
209			`.nmi_vec pha`
210			`pla`
211			`rti`
212
213
214			`* = $c3fa ; vectors`
215
216
217			`dw .nmi_vec ;`
218			`dw .start ;`
219			`dw .irq_vec ;`
220
221			`code`
222
223
224
225
226
227