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//////////////////////////////////////////////////////////////////////
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//// ////
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//// adbg_or1k_defines.v ////
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//// ////
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//// ////
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//// This file is part of the SoC Advanced Debug Interface. ////
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//// ////
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//// Author(s): ////
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//// Nathan Yawn (nathan.yawn@opencores.org) ////
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//// ////
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//// ////
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//// ////
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//////////////////////////////////////////////////////////////////////
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//// ////
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//// Copyright (C) 2008 - 2010 Authors ////
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//// ////
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//// This source file may be used and distributed without ////
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//// restriction provided that this copyright statement is not ////
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//// removed from the file and that any derivative work contains ////
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//// the original copyright notice and the associated disclaimer. ////
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//// ////
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//// This source file is free software; you can redistribute it ////
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//// and/or modify it under the terms of the GNU Lesser General ////
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//// Public License as published by the Free Software Foundation; ////
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//// either version 2.1 of the License, or (at your option) any ////
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//// later version. ////
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//// ////
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//// This source is distributed in the hope that it will be ////
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//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
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//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
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//// PURPOSE. See the GNU Lesser General Public License for more ////
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//// details. ////
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//// ////
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//// You should have received a copy of the GNU Lesser General ////
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//// Public License along with this source; if not, download it ////
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//// from http://www.opencores.org/lgpl.shtml ////
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//// ////
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//////////////////////////////////////////////////////////////////////
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//
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// CVS Revision History
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//
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// $Log: adbg_or1k_defines.v,v $
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// Revision 1.3 2010-01-10 22:54:10 Nathan
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// Update copyright dates
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//
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// Revision 1.2 2009/05/17 20:54:56 Nathan
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// Changed email address to opencores.org
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//
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// Revision 1.1 2008/07/22 20:28:31 Nathan
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// Changed names of all files and modules (prefixed an a, for advanced). Cleanup, indenting. No functional changes.
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//
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// Revision 1.3 2008/07/06 20:02:54 Nathan
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// Fixes for synthesis with Xilinx ISE (also synthesizable with
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// Quartus II 7.0). Ran through dos2unix.
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//
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// Revision 1.2 2008/06/26 20:52:31 Nathan
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// OR1K module tested and working. Added copyright / license info
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// to _define files. Other cleanup.
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//
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// These relate to the number of internal registers, and how
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// many bits are required in the Reg. Select register
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`define DBG_OR1K_REGSELECT_SIZE 1
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`define DBG_OR1K_NUM_INTREG 1
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// Register index definitions for module-internal registers
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// Index 0 is the Status register, used for stall and reset
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`define DBG_OR1K_INTREG_STATUS 1'b0
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`define DBG_OR1K_STATUS_LEN 2
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// Valid commands/opcodes for the or1k debug module
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// 0000 NOP
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// 0001 - 0010 Reserved
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// 0011 Write burst, 32-bit access
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// 0100 - 0110 Reserved
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// 0111 Read burst, 32-bit access
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// 1000 Reserved
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// 1001 Internal register select/write
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// 1010 - 1100 Reserved
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// 1101 Internal register select
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// 1110 - 1111 Reserved
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`define DBG_OR1K_CMD_BWRITE32 4'h3
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`define DBG_OR1K_CMD_BREAD32 4'h7
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`define DBG_OR1K_CMD_IREG_WR 4'h9
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`define DBG_OR1K_CMD_IREG_SEL 4'hd
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