| 1 |
135 |
jt_eaton |
./testbenches/verilog/tb.cpu0:assign debug_select_i = select_o[0];
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| 2 |
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./testbenches/verilog/tb.jfifo:assign debug_select_i = select_o[0];
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| 3 |
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./testbenches/verilog/tb.wb:assign debug_select_i = select_o[0];
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| 4 |
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./testbenches/verilog/tb.jfifo_sync:assign debug_select_i = syn_select[0];
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| 5 |
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./testbenches/verilog/tb.cpu1:assign debug_select_i = select_o[0];
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| 6 |
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./testbenches/verilog/tb.jsp:assign debug_select_i = select_o[0];
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| 7 |
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./testbenches/xml/adv_dbg_if_wb_cpu0_jsp_dut.params.xml:adv_debug_sys
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| 8 |
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./testbenches/xml/adv_dbg_if_wb_cpu0_jsp_dut.params.xml: spirit:library="adv_debug_sys"
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| 9 |
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./testbenches/xml/adv_dbg_if_cpu1_tb.xml:adv_debug_sys
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| 10 |
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./testbenches/xml/adv_dbg_if_cpu1_tb.xml: spirit:library="adv_debug_sys"
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| 11 |
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./testbenches/xml/adv_dbg_if_cpu1_tb.xml: spirit:library="adv_debug_sys"
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| 12 |
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./testbenches/xml/adv_dbg_if_bfm.design.xml:adv_debug_sys
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| 13 |
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./testbenches/xml/adv_dbg_if_jfifo_tb.xml:adv_debug_sys
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| 14 |
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./testbenches/xml/adv_dbg_if_jfifo_tb.xml: spirit:library="adv_debug_sys"
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| 15 |
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./testbenches/xml/adv_dbg_if_jfifo_tb.xml: spirit:library="adv_debug_sys"
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| 16 |
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./testbenches/xml/adv_dbg_if_jfifo_tb.xml: spirit:library="adv_debug_sys"
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| 17 |
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./testbenches/xml/adv_dbg_if_wb_cpu2_jsp_dut.params.xml:adv_debug_sys
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| 18 |
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./testbenches/xml/adv_dbg_if_wb_cpu2_jsp_dut.params.xml: spirit:library="adv_debug_sys"
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| 19 |
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./testbenches/xml/adv_dbg_if_wb_cpu0_lint.xml:adv_debug_sys
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| 20 |
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./testbenches/xml/adv_dbg_if_wb_cpu0_lint.xml: spirit:library="adv_debug_sys"
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| 21 |
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./testbenches/xml/adv_dbg_if_jsp_bfm.design.xml:adv_debug_sys
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| 22 |
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./testbenches/xml/adv_dbg_if_cpu1_dut.params.xml:adv_debug_sys
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| 23 |
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./testbenches/xml/adv_dbg_if_cpu1_dut.params.xml: spirit:library="adv_debug_sys"
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| 24 |
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|
./testbenches/xml/adv_dbg_if_wb_cpu0_jfifo_dut.params.xml:adv_debug_sys
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| 25 |
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./testbenches/xml/adv_dbg_if_wb_cpu0_jfifo_dut.params.xml: spirit:library="adv_debug_sys"
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| 26 |
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./testbenches/xml/adv_dbg_if_jsp_duth.design.xml:// ./tools/verilog/gen_tb -vendor opencores.org -library adv_debug_sys -component adv_dbg_if -version jsp //
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| 27 |
|
|
./testbenches/xml/adv_dbg_if_jsp_duth.design.xml:adv_debug_sys
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| 28 |
|
|
./testbenches/xml/adv_dbg_if_jsp_duth.design.xml:debug_select_i
|
| 29 |
|
|
./testbenches/xml/adv_dbg_if_jsp_duth.design.xml:
|
| 30 |
|
|
./testbenches/xml/adv_dbg_if_jsp_duth.design.xml:
|
| 31 |
|
|
./testbenches/xml/adv_dbg_if_jsp_duth.design.xml:
|
| 32 |
|
|
./testbenches/xml/adv_dbg_if_jsp_dut.params.xml:adv_debug_sys
|
| 33 |
|
|
./testbenches/xml/adv_dbg_if_jsp_dut.params.xml: spirit:library="adv_debug_sys"
|
| 34 |
|
|
./testbenches/xml/adv_dbg_if_jfifo_dut.params.xml:adv_debug_sys
|
| 35 |
|
|
./testbenches/xml/adv_dbg_if_jfifo_dut.params.xml: spirit:library="adv_debug_sys"
|
| 36 |
|
|
./testbenches/xml/adv_dbg_if_wb_bfm.design.xml:adv_debug_sys
|
| 37 |
|
|
./testbenches/xml/adv_dbg_if_wb_cpu0_dut.params.xml:adv_debug_sys
|
| 38 |
|
|
./testbenches/xml/adv_dbg_if_wb_cpu0_dut.params.xml: spirit:library="adv_debug_sys"
|
| 39 |
|
|
./testbenches/xml/adv_dbg_if_jfifo_sync_tb.xml:adv_debug_sys
|
| 40 |
|
|
./testbenches/xml/adv_dbg_if_jfifo_sync_tb.xml: spirit:library="adv_debug_sys"
|
| 41 |
|
|
./testbenches/xml/adv_dbg_if_jfifo_sync_tb.xml: spirit:library="adv_debug_sys"
|
| 42 |
|
|
./testbenches/xml/adv_dbg_if_jfifo_sync_tb.xml: spirit:library="adv_debug_sys"
|
| 43 |
|
|
./testbenches/xml/adv_dbg_if_wb_duth.design.xml:// ./tools/verilog/gen_tb -vendor opencores.org -library adv_debug_sys -component adv_dbg_if -version wb //
|
| 44 |
|
|
./testbenches/xml/adv_dbg_if_wb_duth.design.xml:adv_debug_sys
|
| 45 |
|
|
./testbenches/xml/adv_dbg_if_wb_duth.design.xml:debug_select_i
|
| 46 |
|
|
./testbenches/xml/adv_dbg_if_wb_duth.design.xml:
|
| 47 |
|
|
./testbenches/xml/adv_dbg_if_wb_duth.design.xml:
|
| 48 |
|
|
./testbenches/xml/adv_dbg_if_wb_duth.design.xml:
|
| 49 |
|
|
./testbenches/xml/adv_dbg_if_wb_cpu0_jfifo_duth.design.xml:// ./tools/verilog/gen_tb -vendor opencores.org -library adv_debug_sys -component adv_dbg_if -version wb_cpu0_jfifo //
|
| 50 |
|
|
./testbenches/xml/adv_dbg_if_wb_cpu0_jfifo_duth.design.xml:adv_debug_sys
|
| 51 |
|
|
./testbenches/xml/adv_dbg_if_wb_cpu0_jfifo_duth.design.xml:
|
| 52 |
|
|
./testbenches/xml/adv_dbg_if_jfifo_duth.design.xml:// ./tools/verilog/gen_tb -vendor opencores.org -library adv_debug_sys -component adv_dbg_if -version jfifo //
|
| 53 |
|
|
./testbenches/xml/adv_dbg_if_jfifo_duth.design.xml:adv_debug_sys
|
| 54 |
|
|
./testbenches/xml/adv_dbg_if_jfifo_duth.design.xml:debug_select_i
|
| 55 |
|
|
./testbenches/xml/adv_dbg_if_jfifo_duth.design.xml:
|
| 56 |
|
|
./testbenches/xml/adv_dbg_if_jfifo_duth.design.xml:
|
| 57 |
|
|
./testbenches/xml/adv_dbg_if_jfifo_duth.design.xml:
|
| 58 |
|
|
./testbenches/xml/adv_dbg_if_wb_cpu0_jsp_duth.design.xml:// ./tools/verilog/gen_tb -vendor opencores.org -library adv_debug_sys -component adv_dbg_if -version wb_cpu0_jsp //
|
| 59 |
|
|
./testbenches/xml/adv_dbg_if_wb_cpu0_jsp_duth.design.xml:adv_debug_sys
|
| 60 |
|
|
./testbenches/xml/adv_dbg_if_wb_cpu0_jsp_duth.design.xml:
|
| 61 |
|
|
./testbenches/xml/adv_dbg_if_wb_tb.xml:adv_debug_sys
|
| 62 |
|
|
./testbenches/xml/adv_dbg_if_wb_tb.xml: spirit:library="adv_debug_sys"
|
| 63 |
|
|
./testbenches/xml/adv_dbg_if_wb_tb.xml: spirit:library="adv_debug_sys"
|
| 64 |
|
|
./testbenches/xml/adv_dbg_if_wb_tb.xml: spirit:library="adv_debug_sys"
|
| 65 |
|
|
./testbenches/xml/adv_dbg_if_wb_cpu0_duth.design.xml:// ./tools/verilog/gen_tb -vendor opencores.org -library adv_debug_sys -component adv_dbg_if -version wb_cpu0 //
|
| 66 |
|
|
./testbenches/xml/adv_dbg_if_wb_cpu0_duth.design.xml:adv_debug_sys
|
| 67 |
|
|
./testbenches/xml/adv_dbg_if_wb_cpu0_duth.design.xml:debug_select_i
|
| 68 |
|
|
./testbenches/xml/adv_dbg_if_wb_cpu0_duth.design.xml:
|
| 69 |
|
|
./testbenches/xml/adv_dbg_if_wb_cpu0_duth.design.xml:
|
| 70 |
|
|
./testbenches/xml/adv_dbg_if_wb_cpu0_duth.design.xml:
|
| 71 |
|
|
./testbenches/xml/adv_dbg_if_cpu1_duth.design.xml:// ./tools/verilog/gen_tb -vendor opencores.org -library adv_debug_sys -component adv_dbg_if -version cpu1 //
|
| 72 |
|
|
./testbenches/xml/adv_dbg_if_cpu1_duth.design.xml:adv_debug_sys
|
| 73 |
|
|
./testbenches/xml/adv_dbg_if_cpu1_duth.design.xml:debug_select_i
|
| 74 |
|
|
./testbenches/xml/adv_dbg_if_cpu1_duth.design.xml:
|
| 75 |
|
|
./testbenches/xml/adv_dbg_if_cpu1_duth.design.xml:
|
| 76 |
|
|
./testbenches/xml/adv_dbg_if_cpu1_duth.design.xml:
|
| 77 |
|
|
./testbenches/xml/adv_dbg_if_jfifo_lint.xml:adv_debug_sys
|
| 78 |
|
|
./testbenches/xml/adv_dbg_if_jfifo_lint.xml: spirit:library="adv_debug_sys"
|
| 79 |
|
|
./testbenches/xml/adv_dbg_if_wb_lint.xml:adv_debug_sys
|
| 80 |
|
|
./testbenches/xml/adv_dbg_if_wb_lint.xml: spirit:library="adv_debug_sys"
|
| 81 |
|
|
./testbenches/xml/adv_dbg_if_jsp_tb.xml:adv_debug_sys
|
| 82 |
|
|
./testbenches/xml/adv_dbg_if_jsp_tb.xml: spirit:library="adv_debug_sys"
|
| 83 |
|
|
./testbenches/xml/adv_dbg_if_jsp_tb.xml: spirit:library="adv_debug_sys"
|
| 84 |
|
|
./testbenches/xml/adv_dbg_if_jsp_tb.xml: spirit:library="adv_debug_sys"
|
| 85 |
|
|
./testbenches/xml/adv_dbg_if_cpu0_tb.xml:adv_debug_sys
|
| 86 |
|
|
./testbenches/xml/adv_dbg_if_cpu0_tb.xml: spirit:library="adv_debug_sys"
|
| 87 |
|
|
./testbenches/xml/adv_dbg_if_cpu0_tb.xml: spirit:library="adv_debug_sys"
|
| 88 |
|
|
./testbenches/xml/adv_dbg_if_wb_dut.params.xml:adv_debug_sys
|
| 89 |
|
|
./testbenches/xml/adv_dbg_if_wb_dut.params.xml: spirit:library="adv_debug_sys"
|
| 90 |
|
|
./testbenches/xml/adv_dbg_if_wb_cpu2_jsp_lint.xml:adv_debug_sys
|
| 91 |
|
|
./testbenches/xml/adv_dbg_if_wb_cpu2_jsp_lint.xml: spirit:library="adv_debug_sys"
|
| 92 |
|
|
./testbenches/xml/adv_dbg_if_cpu0_duth.design.xml:// ./tools/verilog/gen_tb -vendor opencores.org -library adv_debug_sys -component adv_dbg_if -version cpu0 //
|
| 93 |
|
|
./testbenches/xml/adv_dbg_if_cpu0_duth.design.xml:adv_debug_sys
|
| 94 |
|
|
./testbenches/xml/adv_dbg_if_cpu0_duth.design.xml:debug_select_i
|
| 95 |
|
|
./testbenches/xml/adv_dbg_if_cpu0_duth.design.xml:
|
| 96 |
|
|
./testbenches/xml/adv_dbg_if_cpu0_duth.design.xml:
|
| 97 |
|
|
./testbenches/xml/adv_dbg_if_cpu0_duth.design.xml:
|
| 98 |
|
|
./testbenches/xml/adv_dbg_if_wb_cpu2_jsp_duth.design.xml:// ./tools/verilog/gen_tb -vendor opencores.org -library adv_debug_sys -component adv_dbg_if -version wb_cpu2_jsp //
|
| 99 |
|
|
./testbenches/xml/adv_dbg_if_wb_cpu2_jsp_duth.design.xml:adv_debug_sys
|
| 100 |
|
|
./testbenches/xml/adv_dbg_if_wb_cpu2_jsp_duth.design.xml:debug_select_i
|
| 101 |
|
|
./testbenches/xml/adv_dbg_if_wb_cpu2_jsp_duth.design.xml:
|
| 102 |
|
|
./testbenches/xml/adv_dbg_if_wb_cpu2_jsp_duth.design.xml:
|
| 103 |
|
|
./testbenches/xml/adv_dbg_if_wb_cpu2_jsp_duth.design.xml:
|
| 104 |
|
|
./testbenches/xml/adv_dbg_if_jsp_lint.xml:adv_debug_sys
|
| 105 |
|
|
./testbenches/xml/adv_dbg_if_jsp_lint.xml: spirit:library="adv_debug_sys"
|
| 106 |
|
|
./testbenches/xml/adv_dbg_if_jfifo_bfm.design.xml:adv_debug_sys
|
| 107 |
|
|
./testbenches/xml/adv_dbg_if_cpu1_lint.xml:adv_debug_sys
|
| 108 |
|
|
./testbenches/xml/adv_dbg_if_cpu1_lint.xml: spirit:library="adv_debug_sys"
|
| 109 |
|
|
./testbenches/xml/adv_dbg_if_cpu0_lint.xml:adv_debug_sys
|
| 110 |
|
|
./testbenches/xml/adv_dbg_if_cpu0_lint.xml: spirit:library="adv_debug_sys"
|
| 111 |
|
|
./testbenches/xml/adv_dbg_if_cpu0_dut.params.xml:adv_debug_sys
|
| 112 |
|
|
./testbenches/xml/adv_dbg_if_cpu0_dut.params.xml: spirit:library="adv_debug_sys"
|
| 113 |
|
|
./icarus/jfifo/wave.sav:[dumpfile] "/home/johne/Desktop/socgen/work/opencores.org__adv_debug_sys/Hardware/adv_dbg_if/sim/icarus/jfifo_sync/TestBench.vcd"
|
| 114 |
|
|
./icarus/jfifo/wave.sav:[savefile] "/home/johne/Desktop/socgen/projects/opencores.org/adv_debug_sys/Hardware/adv_dbg_if/sim/icarus/jfifo_sync/wave.sav"
|
| 115 |
|
|
./icarus/jfifo/wave.sav:TB.test.dut.debug_select_i
|
| 116 |
|
|
./icarus/cpu1/wave.sav:[dumpfile] "/home/johne/Desktop/socgen/work/opencores.org__adv_debug_sys/Hardware/adv_dbg_if/sim/icarus/default/TestBench.vcd"
|
| 117 |
|
|
./icarus/cpu1/wave.sav:[savefile] "/home/johne/Desktop/socgen/projects/opencores.org/adv_debug_sys/Hardware/adv_dbg_if/sim/icarus/default/wave.sav"
|
| 118 |
|
|
./icarus/cpu1/wave.sav:TB.test.debug_select_i
|
| 119 |
|
|
./icarus/cpu0/wave.sav:[dumpfile] "/home/johne/Desktop/socgen/work/opencores.org__adv_debug_sys/Hardware/adv_dbg_if/sim/icarus/default/TestBench.vcd"
|
| 120 |
|
|
./icarus/cpu0/wave.sav:[savefile] "/home/johne/Desktop/socgen/projects/opencores.org/adv_debug_sys/Hardware/adv_dbg_if/sim/icarus/default/wave.sav"
|
| 121 |
|
|
./icarus/cpu0/wave.sav:TB.test.debug_select_i
|
| 122 |
|
|
./icarus/jfifo_sync1/wave.sav:[dumpfile] "/home/johne/Desktop/socgen/work/opencores.org__adv_debug_sys/Hardware/adv_dbg_if/sim/icarus/jfifo_sync/TestBench.vcd"
|
| 123 |
|
|
./icarus/jfifo_sync1/wave.sav:[savefile] "/home/johne/Desktop/socgen/projects/opencores.org/adv_debug_sys/Hardware/adv_dbg_if/sim/icarus/jfifo_sync/wave.sav"
|
| 124 |
|
|
./icarus/jfifo_sync1/wave.sav:TB.test.dut.debug_select_i
|
| 125 |
|
|
./icarus/wb/wave.sav:[dumpfile] "/home/johne/Desktop/socgen/work/opencores.org__adv_debug_sys/Hardware/adv_dbg_if/sim/icarus/wb/TestBench.vcd"
|
| 126 |
|
|
./icarus/wb/wave.sav:[savefile] "/home/johne/Desktop/socgen/projects/opencores.org/adv_debug_sys/Hardware/adv_dbg_if/sim/icarus/wb/wave.sav"
|
| 127 |
|
|
./icarus/wb/wave.sav:TB.test.debug_select_i
|
| 128 |
|
|
./icarus/jfifo_sync/wave.sav:[dumpfile] "/home/johne/Desktop/socgen/work/opencores.org__adv_debug_sys/Hardware/adv_dbg_if/sim/icarus/jfifo_sync/TestBench.vcd"
|
| 129 |
|
|
./icarus/jfifo_sync/wave.sav:[savefile] "/home/johne/Desktop/socgen/projects/opencores.org/adv_debug_sys/Hardware/adv_dbg_if/sim/icarus/jfifo_sync/wave.sav"
|
| 130 |
|
|
./icarus/jfifo_sync/wave.sav:TB.test.dut.debug_select_i
|
| 131 |
|
|
./icarus/jsp/wave.sav:[dumpfile] "/home/johne/Desktop/socgen/work/opencores.org__adv_debug_sys/Hardware/adv_dbg_if/sim/icarus/jsp/TestBench.vcd"
|
| 132 |
|
|
./icarus/jsp/wave.sav:[savefile] "/home/johne/Desktop/socgen/projects/opencores.org/adv_debug_sys/Hardware/adv_dbg_if/sim/icarus/jsp/wave.sav"
|
| 133 |
|
|
./icarus/jsp/wave.sav:TB.test.debug_select_i
|
