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Subversion Repositories socgen

[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [fpgas/] [ip/] [Nexys2_T6502/] [syn/] [chips/] [xml/] [Nexys2_T6502_chip.xml] - Blame information for rev 134

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xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"
xmlns:socgen="http://opencores.org"
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009
http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009/index.xsd">
opencores.org
fpgas
Nexys2_T6502
chip
 
 
 
  
 
    
      fs-syn
 
      
        
        ../verilog/copyright.v
        verilogSource
        include
      
 
      
        
        ../verilog/sram.load
        verilogSource
        fragment
      
 
    
 
  
 

 
 
  
 
    
    syn:*Synthesis:*
    Verilog
    
    
 
 
 
 
 
 
 

 
 
 

 
 
 
 
 
 

Line No.	Rev	Author	Line
1	131	jt_eaton
2
30
31			`xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"`
32			`xmlns:socgen="http://opencores.org"`
33			`xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"`
34			`xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009`
35			`http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009/index.xsd">`
36			`opencores.org`
37			`fpgas`
38			`Nexys2_T6502`
39			`chip`
40
41
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43	134	jt_eaton
44	131	jt_eaton
45	134	jt_eaton
46			`fs-syn`
47	131	jt_eaton
48	134	jt_eaton
49
50			`../verilog/copyright.v`
51			`verilogSource`
52			`include`
53
54	131	jt_eaton
55	134	jt_eaton
56
57			`../verilog/sram.load`
58			`verilogSource`
59			`fragment`
60
61	131	jt_eaton
62	134	jt_eaton
63	131	jt_eaton
64	134	jt_eaton
65	131	jt_eaton
66
67
68
69
70
71
72			`syn:Synthesis:`
73			`Verilog`
74
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Subversion Repositories socgen

[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [fpgas/] [ip/] [Nexys2_T6502/] [syn/] [chips/] [xml/] [Nexys2_T6502_chip.xml] - Blame information for rev 134