URL https://opencores.org/ocsvn/socgen/socgen/trunk

Subversion Repositories socgen

[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [fpgas/] [ip/] [Nexys2_T6502/] [syn/] [ise/] [Nexys2_T6502_kim_2/] [xml/] [Nexys2_T6502_kim_2.xml] - Blame information for rev 134

Go to most recent revision | Details | Compare with Previous | View Log





xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"
xmlns:socgen="http://opencores.org"
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009
http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009/index.xsd">
opencores.org
fpgas
Nexys2_T6502
kim_2
 
 

 
 
 

  gen_verilog_syn
  104.0
  none
  :*Synthesis:*
  ./tools/verilog/gen_verilog
    
   
      local_parameters
    
    
      destination
      top.T6502_kim_2.syn
    
  

 
 
 

 
 
 
 
  
 
 
 
    
      fs-syn
 
      
        
        ../verilog/syn/top.T6502_kim_2.syn
        verilogSourcemodule
      
 
    
 
 
 
 
  
 
 
 
 

 
 
  
 
    
    Hierarchical
 
    
                         spirit:library="fpgas"
                         spirit:name="Nexys2_T6502"
                         spirit:version="fpga.design"/>
    
 
   
     Pad_Ring
 
     
     
                          spirit:library="Nexys2"
                          spirit:name="fpga"
                          spirit:version="padring"/>
     
 
 
    
 
 
    
     Chip
     
     
                          spirit:library="fpgas"
                          spirit:name="Nexys2_T6502"
                          spirit:version="chip"/>
     
    
 
     
     ise
     
     
                          spirit:library="Testbench"
                          spirit:name="toolflow"
                          spirit:version="ise"/>
     
     
 
    
    syn:*Synthesis:*
 
    Verilog
    
    fs-syn
    
 
 
 
 

 
 

 
 
 
 
 
 
 
 
 
 
 

Line No.	Rev	Author	Line
1	131	jt_eaton
2
30
31			`xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"`
32			`xmlns:socgen="http://opencores.org"`
33			`xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"`
34			`xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009`
35			`http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009/index.xsd">`
36			`opencores.org`
37			`fpgas`
38			`Nexys2_T6502`
39			`kim_2`
40
41
42
43
44
45
46
47			`gen_verilog_syn`
48			`104.0`
49			`none`
50			`:Synthesis:`
51			`./tools/verilog/gen_verilog`
52
53
54			`local_parameters`
55
56
57			`destination`
58			`top.T6502_kim_2.syn`
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75			`fs-syn`
76
77
78
79			`../verilog/syn/top.T6502_kim_2.syn`
80			`verilogSourcemodule`
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99			`Hierarchical`
100
101
102			`spirit:library="fpgas"`
103			`spirit:name="Nexys2_T6502"`
104			`spirit:version="fpga.design"/>`
105
106
107
108			`Pad_Ring`
109
110
111
112			`spirit:library="Nexys2"`
113			`spirit:name="fpga"`
114			`spirit:version="padring"/>`
115
116
117
118
119
120
121
122			`Chip`
123
124
125			`spirit:library="fpgas"`
126			`spirit:name="Nexys2_T6502"`
127			`spirit:version="chip"/>`
128
129
130
131
132			`ise`
133
134
135			`spirit:library="Testbench"`
136			`spirit:name="toolflow"`
137			`spirit:version="ise"/>`
138
139
140
141
142			`syn:Synthesis:`
143
144			`Verilog`
145
146			`fs-syn`
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166

Browse

Tools

Subversion Repositories socgen

[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [fpgas/] [ip/] [Nexys2_T6502/] [syn/] [ise/] [Nexys2_T6502_kim_2/] [xml/] [Nexys2_T6502_kim_2.xml] - Blame information for rev 134