OpenCores
URL https://opencores.org/ocsvn/socgen/socgen/trunk

Subversion Repositories socgen

[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [io/] [ip/] [io_gpio/] [sim/] [icarus/] [default/] [wave.sav] - Blame information for rev 131

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 131 jt_eaton 
[timestart] 1774
2 
[size] 1613 999
3 
[pos] -24 50
4 
*-9.000000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
5 
[treeopen] TB.
6 
[treeopen] TB.test.
7 
[treeopen] TB.test.dut.
8 
@28
9 
TB.test.clk
10 
TB.test.enable
11 
TB.test.reset
12 
@22
13 
TB.test.addr[15:0]
14 
TB.test.mb_addr[3:0]
15 
@28
16 
TB.test.mb_cs
17 
TB.test.mb_rd
18 
@29
19 
TB.test.mb_wr
20 
@22
21 
TB.test.mb_rdata[7:0]
22 
TB.test.mb_wdata[7:0]
23 
TB.test.gpio_0_in[7:0]
24 
TB.test.gpio_0_oe[7:0]
25 
TB.test.gpio_0_out[7:0]
26 
TB.test.gpio_1_in[7:0]
27 
TB.test.gpio_1_oe[7:0]
28 
TB.test.gpio_1_out[7:0]
29 
TB.test.dut.addr[3:0]
30 
@28
31 
TB.test.dut.cs
32 
TB.test.dut.rd
33 
@22
34 
TB.test.dut.gpio_0_out[7:0]
35 
@28
36 
TB.test.dut.wr
37 
TB.test.dut.enable
38 
[pattern_trace] 1
39 
[pattern_trace] 0

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.