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[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [io/] [ip/] [io_module/] [rtl/] [xml/] [io_module_gpio.xml] - Blame information for rev 134

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xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"
xmlns:socgen="http://opencores.org"
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009
http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009/index.xsd">
 
opencores.org
io
io_module
gpio  default
 

 
 slave_clk
  
  
  
    
      
        clk
        clk
      
    
 
 
 
 slave_reset
  
  
  
    
      
        reset
        reset
      
    
 
 

 

 
 
 
 
 
 
 

  gen_registers
  102.1
  common
  none
  ./tools/regtool/gen_registers
    
    
      bus_intf
      mb
    
    
      dest_dir
      ../verilog
    
  

 
 
 

  gen_verilog
  104.0
  none
  common
  ./tools/verilog/gen_verilog
  
    
      destination
      io_module_gpio
    
  

 
 
 

 
 

 
   
      fs-common
 
 
      
        
        ../verilog/top.gpio.rtl
        verilogSourcefragment
      
 
   
 
 
   
      fs-sim
 
      
        
        ../verilog/copyright
        verilogSourceinclude
      
 
      
        
        ../verilog/common/io_module_gpio
        verilogSourcemodule
      
 
 
      
        dest_dir
        ../views/sim/
        verilogSourcelibraryDir
      
 
 
   
 
 
   
      fs-syn
 
 
      
        
        ../verilog/copyright
        verilogSourceinclude
      
 
      
        
        ../verilog/common/io_module_gpio
        verilogSourcemodule
      
 
 
      
        dest_dir
        ../views/syn/
        verilogSourcelibraryDir
      
 
 
 
    
 
 
 
 
 

 
 
 
 
 

       
 
              
              Hierarchical
 
              
                                   spirit:library="io"
                                   spirit:name="io_module"
                                   spirit:version="gpio.design"/>
              
 
              
              verilog
              
              
                                   spirit:library="Testbench"
                                   spirit:name="toolflow"
                                   spirit:version="verilog"/>
              
              
 
 
 
 
 
              
              commoncommon
              Verilog
              
                     
                            fs-common
                     
              
 
              
              sim:*Simulation:*
              Verilog
              
                     
                            fs-sim
                     
              
 
 
              
              syn:*Synthesis:*
              Verilog
              
                     
                            fs-syn
                     
              
 
 
 
              
              doc
              
              
                                   spirit:library="Testbench"
                                   spirit:name="toolflow"
                                   spirit:version="documentation"/>
              
              :*Documentation:*
              Verilog
              
 
 
 
      
 
 
 
 
 
 
 

 
 
 
enable
wire
in

 
 
 
 
wait_n
wire
out

 
 
gpio_0_out
wire
out
70

 
gpio_0_oe
wire
out
70

 
 
gpio_0_in
wire
in
70

 
gpio_1_out
wire
out
70

 
gpio_1_oe
wire
out
70

 
 
 
gpio_1_in
wire
in
70

 
timer_irq
wire
out
10

 
pic_irq
wire
out

 
pic_nmi
wire
out

 
pic_irq_in
wire
in
70

 
 
cts_pad_in
wire
in

 
rts_pad_out
wire
out

 
rx_irq
wire
out

 
tx_irq
wire
out

 

 
 

 
 


 
8
 mb

 mb
 0x00
 
  
  gpio
  0x10
  8
 
 
 
   0_out
   0x2
   8
   read-write
  
 
 
   0_oe
   0x1
   8
   read-write
  
 
 
   0_in
   0x0
   8
   read-only
  
 
 
 
   1_out
   0x6
   8
   read-write
  
 
 
   1_oe
   0x5
   8
   read-write
  
 
 
   1_in
   0x4
   8
   read-only
  
 
 
  
 
 

 

 
 
 
 
 

 
 
 
 
 

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Subversion Repositories socgen

[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [io/] [ip/] [io_module/] [rtl/] [xml/] [io_module_gpio.xml] - Blame information for rev 134

Line No.	Rev	Author	Line
1	131	jt_eaton
2
30
31			`xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"`
32			`xmlns:socgen="http://opencores.org"`
33			`xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"`
34			`xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009`
35			`http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009/index.xsd">`
36
37			`opencores.org`
38			`io`
39			`io_module`
40			`gpio default`
41
42
43
44			`slave_clk`
45
46
47
48
49
50			`clk`
51			`clk`
52
53
54
55
56
57			`slave_reset`
58
59
60
61
62
63			`reset`
64			`reset`
65
66
67
68
69
70
71
72
73
74
75
76
77
78	133	jt_eaton
79	131	jt_eaton
80			`gen_registers`
81	133	jt_eaton	`102.1`
82	131	jt_eaton	`common`
83			`none`
84			`./tools/regtool/gen_registers`
85
86
87			`bus_intf`
88			`mb`
89
90
91			`dest_dir`
92			`../verilog`
93
94
95
96
97
98
99
100			`gen_verilog`
101			`104.0`
102			`none`
103			`common`
104			`./tools/verilog/gen_verilog`
105
106
107			`destination`
108	134	jt_eaton	`io_module_gpio`
109	131	jt_eaton
110
111
112
113
114
115
116
117
118
119
120
121			`fs-common`
122
123
124
125
126			`../verilog/top.gpio.rtl`
127			`verilogSourcefragment`
128
129
130
131
132
133
134			`fs-sim`
135
136
137
138	134	jt_eaton	`../verilog/copyright`
139	131	jt_eaton	`verilogSourceinclude`
140
141
142
143
144	134	jt_eaton	`../verilog/common/io_module_gpio`
145	131	jt_eaton	`verilogSourcemodule`
146
147
148
149	134	jt_eaton
150			`dest_dir`
151			`../views/sim/`
152			`verilogSourcelibraryDir`
153
154
155
156	131	jt_eaton
157
158
159
160			`fs-syn`
161
162
163
164
165	134	jt_eaton	`../verilog/copyright`
166	131	jt_eaton	`verilogSourceinclude`
167
168
169
170
171	134	jt_eaton	`../verilog/common/io_module_gpio`
172	131	jt_eaton	`verilogSourcemodule`
173
174
175
176	134	jt_eaton
177			`dest_dir`
178			`../views/syn/`
179			`verilogSourcelibraryDir`
180
181	131	jt_eaton
182	134	jt_eaton
183
184	131	jt_eaton
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200			`Hierarchical`
201
202
203			`spirit:library="io"`
204			`spirit:name="io_module"`
205			`spirit:version="gpio.design"/>`
206
207
208
209			`verilog`
210
211
212			`spirit:library="Testbench"`
213			`spirit:name="toolflow"`
214			`spirit:version="verilog"/>`
215
216
217
218
219
220
221
222
223			`commoncommon`
224			`Verilog`
225
226
227			`fs-common`
228
229
230
231
232			`sim:Simulation:`
233			`Verilog`
234
235
236			`fs-sim`
237
238
239
240
241
242			`syn:Synthesis:`
243			`Verilog`
244
245
246			`fs-syn`
247
248
249
250
251
252
253			`doc`
254
255
256			`spirit:library="Testbench"`
257			`spirit:name="toolflow"`
258			`spirit:version="documentation"/>`
259
260			`:Documentation:`
261			`Verilog`
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278			`enable`
279			`wire`
280			`in`
281
282
283
284
285
286			`wait_n`
287			`wire`
288			`out`
289
290
291
292			`gpio_0_out`
293			`wire`
294			`out`
295			`70`
296
297
298			`gpio_0_oe`
299			`wire`
300			`out`
301			`70`
302
303
304
305			`gpio_0_in`
306			`wire`
307			`in`
308			`70`
309
310
311			`gpio_1_out`
312			`wire`
313			`out`
314			`70`
315
316
317			`gpio_1_oe`
318			`wire`
319			`out`
320			`70`
321
322
323
324
325			`gpio_1_in`
326			`wire`
327			`in`
328			`70`
329
330
331			`timer_irq`
332			`wire`
333			`out`
334			`10`
335
336
337			`pic_irq`
338			`wire`
339			`out`
340
341
342			`pic_nmi`
343			`wire`
344			`out`
345
346
347			`pic_irq_in`
348			`wire`
349			`in`
350			`70`
351
352
353
354			`cts_pad_in`
355			`wire`
356			`in`
357
358
359			`rts_pad_out`
360			`wire`
361			`out`
362
363
364			`rx_irq`
365			`wire`
366			`out`
367
368
369			`tx_irq`
370			`wire`
371			`out`
372
373
374
375
376
377
378
379
380
381
382
383			`8`
384			`mb`
385
386			`mb`
387			`0x00`
388
389
390			`gpio`
391			`0x10`
392			`8`
393
394
395
396			`0_out`
397			`0x2`
398			`8`
399			`read-write`
400
401
402
403			`0_oe`
404			`0x1`
405			`8`
406			`read-write`
407
408
409
410			`0_in`
411			`0x0`
412			`8`
413			`read-only`
414
415
416
417
418			`1_out`
419			`0x6`
420			`8`
421			`read-write`
422
423
424
425			`1_oe`
426			`0x5`
427			`8`
428			`read-write`
429
430
431
432			`1_in`
433			`0x4`
434			`8`
435			`read-only`
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455