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[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [io/] [ip/] [io_ps2/] [rtl/] [xml/] [io_ps2_mouse.xml] - Blame information for rev 134

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xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"
xmlns:socgen="http://opencores.org"
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009
http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009/index.xsd">
 
opencores.org
io
io_ps2
mouse  default
 
 

 
 slave_clk
  
  
  
    
      
        clk
        clk
      
    
 
 
 
 slave_reset
  
  
  
    
      
        reset
        reset
      
    
 
 
 
mb
   
   
   little
   8
     
     
        
         rdata
         
         rdata
           wire
           70
         
       
 
        
         addr
         
         addr
           30
         
       
 
 
        
         wdata
         
         wdata
           70
         
       
 
 
        
         rd
         
         rd
         
       
 
        
         wr
         
         wr
         
       
 
        
         cs
         
         cs
         
       
 
      
  
 
 

 
 
 

 
 
 
 

  gen_registers
  102.1
  none
  common
  ./tools/regtool/gen_registers
    
    
      bus_intf
      mb
    
    
      dest_dir
      ../verilog
    
  

 
 
 

  verilog_maker
  104.0
  none
  common
  ./tools/verilog/gen_verilog
    
    
      destination
      io_ps2_mouse
    
  

 
 

 
 
 
  
 
    
      fs-common
 
      
        
        ../verilog/top.body.mouse
        verilogSourcefragment
      
 
    
 
 
    
      fs-sim
 
 
      
        
        ../verilog/copyright.v
        verilogSourceinclude
      
 
      
        
        ../verilog/common/io_ps2_mouse
        verilogSourcemodule
      
 
      
        micro_reg
        ../verilog/io_ps2_mouse_micro_reg
        verilogSourcemodule
      
 
 
 
 
    
 
 
 
 
    
      fs-syn
 
 
 
      
        
        ../verilog/copyright.v
        verilogSourceinclude
      
 
      
        
        ../verilog/common/io_ps2_mouse
        verilogSourcemodule
      
 
      
        micro_reg
        ../verilog/io_ps2_mouse_micro_reg
        verilogSourcemodule
      
 
 
 
 
    
 
 
 
  
 
 
 
 
 

       
 
              
              Hierarchical
 
              
                                   spirit:library="io"
                                   spirit:name="io_ps2"
                                   spirit:version="mouse.design"/>
              
 
              
              verilog
              
              
                                   spirit:library="Testbench"
                                   spirit:name="toolflow"
                                   spirit:version="verilog"/>
              
              
 
 
 
 
 
              
              commoncommon
              Verilog
              
                     
                            fs-common
                     
              
 
              
              sim:*Simulation:*
              Verilog
              
                     
                            fs-sim
                     
              
 
 
              
              syn:*Synthesis:*
              Verilog
              
                     
                            fs-syn
                     
              
 
 
              
              doc
              
              
                                   spirit:library="Testbench"
                                   spirit:name="toolflow"
                                   spirit:version="documentation"/>
              
              :*Documentation:*
              Verilog
              
 
 
 
      
 
 
 
 
 

 
 
enable
wire
in

 
 
 
rcv_data_avail
wire
out

 
y_pos
reg
out
90

 
x_pos
reg
out
90

 
new_packet
reg
out

 
ms_mid
reg
out

 
ms_right
reg
out

 
ms_left
reg
out

 

 

 
 
 


 mb
8

 micro_reg
 0x00
 
  
  mb_microbus
  0x10
  8
 
 
 
   ps2_data
   0x0
   8
   read-only
  
 
 
 
   wdata_buf
   0x0
   8
   write-only
  
 
 
 
   status
   0x2
   8
   read-only
  
 
 
   cntrl
   0x4
   8
   read-write
  
 
 
 
   x_pos
   0x6
   8
   read-only
  
 
 
   y_pos
   0x8
   8
   read-only
  
 
 
  
 
 

 

 
 
 


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[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [io/] [ip/] [io_ps2/] [rtl/] [xml/] [io_ps2_mouse.xml] - Blame information for rev 134

Line No.	Rev	Author	Line
1	131	jt_eaton
2
30
31			`xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"`
32			`xmlns:socgen="http://opencores.org"`
33			`xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"`
34			`xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009`
35			`http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009/index.xsd">`
36
37			`opencores.org`
38			`io`
39			`io_ps2`
40			`mouse default`
41
42
43
44
45			`slave_clk`
46
47
48
49
50
51			`clk`
52			`clk`
53
54
55
56
57
58			`slave_reset`
59
60
61
62
63
64			`reset`
65			`reset`
66
67
68
69
70
71			`mb`
72
73
74			`little`
75			`8`
76
77
78
79			`rdata`
80
81			`rdata`
82			`wire`
83			`70`
84
85
86
87
88			`addr`
89
90			`addr`
91			`30`
92
93
94
95
96
97			`wdata`
98
99			`wdata`
100			`70`
101
102
103
104
105
106			`rd`
107
108			`rd`
109
110
111
112
113			`wr`
114
115			`wr`
116
117
118
119
120			`cs`
121
122			`cs`
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139	133	jt_eaton
140	131	jt_eaton	`gen_registers`
141	133	jt_eaton	`102.1`
142	131	jt_eaton	`none`
143			`common`
144			`./tools/regtool/gen_registers`
145
146
147			`bus_intf`
148			`mb`
149
150
151			`dest_dir`
152			`../verilog`
153
154
155
156
157
158
159
160			`verilog_maker`
161			`104.0`
162			`none`
163			`common`
164			`./tools/verilog/gen_verilog`
165
166
167			`destination`
168	134	jt_eaton	`io_ps2_mouse`
169	131	jt_eaton
170
171
172
173
174
175
176
177
178
179
180
181			`fs-common`
182
183
184
185			`../verilog/top.body.mouse`
186			`verilogSourcefragment`
187
188
189
190
191
192
193			`fs-sim`
194
195
196
197
198			`../verilog/copyright.v`
199			`verilogSourceinclude`
200
201
202
203
204	134	jt_eaton	`../verilog/common/io_ps2_mouse`
205	131	jt_eaton	`verilogSourcemodule`
206
207
208
209			`micro_reg`
210			`../verilog/io_ps2_mouse_micro_reg`
211			`verilogSourcemodule`
212
213
214
215
216
217
218
219
220
221
222
223			`fs-syn`
224
225
226
227
228
229			`../verilog/copyright.v`
230			`verilogSourceinclude`
231
232
233
234
235	134	jt_eaton	`../verilog/common/io_ps2_mouse`
236	131	jt_eaton	`verilogSourcemodule`
237
238
239
240			`micro_reg`
241			`../verilog/io_ps2_mouse_micro_reg`
242			`verilogSourcemodule`
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262			`Hierarchical`
263
264
265			`spirit:library="io"`
266			`spirit:name="io_ps2"`
267			`spirit:version="mouse.design"/>`
268
269
270
271			`verilog`
272
273
274			`spirit:library="Testbench"`
275			`spirit:name="toolflow"`
276			`spirit:version="verilog"/>`
277
278
279
280
281
282
283
284
285			`commoncommon`
286			`Verilog`
287
288
289			`fs-common`
290
291
292
293
294			`sim:Simulation:`
295			`Verilog`
296
297
298			`fs-sim`
299
300
301
302
303
304			`syn:Synthesis:`
305			`Verilog`
306
307
308			`fs-syn`
309
310
311
312
313
314			`doc`
315
316
317			`spirit:library="Testbench"`
318			`spirit:name="toolflow"`
319			`spirit:version="documentation"/>`
320
321			`:Documentation:`
322			`Verilog`
323
324
325
326
327
328
329
330
331
332
333
334
335
336			`enable`
337			`wire`
338			`in`
339
340
341
342
343			`rcv_data_avail`
344			`wire`
345			`out`
346
347
348			`y_pos`
349			`reg`
350			`out`
351			`90`
352
353
354			`x_pos`
355			`reg`
356			`out`
357			`90`
358
359
360			`new_packet`
361			`reg`
362			`out`
363
364
365			`ms_mid`
366			`reg`
367			`out`
368
369
370			`ms_right`
371			`reg`
372			`out`
373
374
375			`ms_left`
376			`reg`
377			`out`
378
379
380
381
382
383
384
385
386
387
388			`mb`
389			`8`
390
391			`micro_reg`
392			`0x00`
393
394
395			`mb_microbus`
396			`0x10`
397			`8`
398
399
400
401			`ps2_data`
402			`0x0`
403			`8`
404			`read-only`
405
406
407
408
409			`wdata_buf`
410			`0x0`
411			`8`
412			`write-only`
413
414
415
416
417			`status`
418			`0x2`
419			`8`
420			`read-only`
421
422
423
424			`cntrl`
425			`0x4`
426			`8`
427			`read-write`
428
429
430
431
432			`x_pos`
433			`0x6`
434			`8`
435			`read-only`
436
437
438
439			`y_pos`
440			`0x8`
441			`8`
442			`read-only`
443
444
445
446
447
448
449
450
451
452
453
454
455