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[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [io/] [ip/] [io_ps2/] [sim/] [testbenches/] [xml/] [io_ps2_mouse_tb.xml] - Blame information for rev 131

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xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"
xmlns:socgen="http://opencores.org"
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009
http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009/index.xsd">
 
opencores.org
io
io_ps2
mouse_tb
 
 
 
 
 
 

 

  elab_verilog
  103.0
  none
  :*Simulation:*
  ./tools/verilog/elab_verilog

 
 

  trace_bus
  103.0
  none
  :*Simulation:*
  ./tools/verilog/trace_bus
    
    
      path
      root.dut
    
    
      bus_name
      mb
    
  
 

 
 

  gen_verilog
  104.0
  none
  common
  ./tools/verilog/gen_verilog
    
    
      destination
      top.tb
    
    
      dest_dir
      ../verilog
    
    
      top
    
  

 
 
 

 
 
 
 
 
 

 

    BUS_ADDR_WIDTH4
    PS2_MODEL_CLKCNT8'h7f
    PS2_MODEL_SIZE8

 
 
       
 
 
              
              Params
              
              
                                   spirit:library="io"
                                   spirit:name="io_ps2"
                                   spirit:version="mouse_dut.params"/>
               
              
 
 
              
              Bfm
              
                                   spirit:library="io"
                                   spirit:name="io_ps2"
                                   spirit:version="bfm.design"/>
              
 
              
              Ps2_bfm
              
              
                                   spirit:library="Testbench"
                                   spirit:name="ps2_model"
                                   spirit:version="bfm"/>
               
              
 
 
              
              icarus
              
              
                                   spirit:library="Testbench"
                                   spirit:name="toolflow"
                                   spirit:version="icarus"/>
              
              
 
 
 
 
              
              headersheaders
              Verilog
              
              
 
              
              commoncommon
              Verilog
              
                     
                            fs-common
                     
              
 
              
              sim:*Simulation:*
              Verilog
              
                     
                            fs-sim
                     
              
 
 
              
              lint:*Lint:*
              Verilog
              
                     
                            fs-lint
                     
              
 
      
 
 
 

 
 
 
  
 
    
      fs-common
 
      
        
        ../verilog/tb.ext
        verilogSourcefragment
      
 
    
 
 
    
      fs-sim
 
      
        
        ../verilog/common/top.tb
        verilogSourcemodule
      
 
 
 
 
    
 
 
    
      fs-lint
 
      
        
        ../verilog/common/top.tb
        verilogSourcemodule
      
 
 
 
 
    
 
 
 
 
 
 
  
 
 
 
 


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Subversion Repositories socgen

[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [io/] [ip/] [io_ps2/] [sim/] [testbenches/] [xml/] [io_ps2_mouse_tb.xml] - Blame information for rev 131

Line No.	Rev	Author	Line
1	131	jt_eaton
2
30
31			`xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"`
32			`xmlns:socgen="http://opencores.org"`
33			`xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"`
34			`xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009`
35			`http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009/index.xsd">`
36
37			`opencores.org`
38			`io`
39			`io_ps2`
40			`mouse_tb`
41
42
43
44
45
46
47
48
49
50			`elab_verilog`
51			`103.0`
52			`none`
53			`:Simulation:`
54			`./tools/verilog/elab_verilog`
55
56
57
58
59			`trace_bus`
60			`103.0`
61			`none`
62			`:Simulation:`
63			`./tools/verilog/trace_bus`
64
65
66			`path`
67			`root.dut`
68
69
70			`bus_name`
71			`mb`
72
73
74
75
76
77
78
79			`gen_verilog`
80			`104.0`
81			`none`
82			`common`
83			`./tools/verilog/gen_verilog`
84
85
86			`destination`
87			`top.tb`
88
89
90			`dest_dir`
91			`../verilog`
92
93
94			`top`
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111			`BUS_ADDR_WIDTH4`
112			`PS2_MODEL_CLKCNT8'h7f`
113			`PS2_MODEL_SIZE8`
114
115
116
117
118
119
120
121			`Params`
122
123
124			`spirit:library="io"`
125			`spirit:name="io_ps2"`
126			`spirit:version="mouse_dut.params"/>`
127
128
129
130
131
132			`Bfm`
133
134			`spirit:library="io"`
135			`spirit:name="io_ps2"`
136			`spirit:version="bfm.design"/>`
137
138
139
140			`Ps2_bfm`
141
142
143			`spirit:library="Testbench"`
144			`spirit:name="ps2_model"`
145			`spirit:version="bfm"/>`
146
147
148
149
150
151			`icarus`
152
153
154			`spirit:library="Testbench"`
155			`spirit:name="toolflow"`
156			`spirit:version="icarus"/>`
157
158
159
160
161
162
163
164			`headersheaders`
165			`Verilog`
166
167
168
169
170			`commoncommon`
171			`Verilog`
172
173
174			`fs-common`
175
176
177
178
179			`sim:Simulation:`
180			`Verilog`
181
182
183			`fs-sim`
184
185
186
187
188
189			`lint:Lint:`
190			`Verilog`
191
192
193			`fs-lint`
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208			`fs-common`
209
210
211
212			`../verilog/tb.ext`
213			`verilogSourcefragment`
214
215
216
217
218
219
220			`fs-sim`
221
222
223
224			`../verilog/common/top.tb`
225			`verilogSourcemodule`
226
227
228
229
230
231
232
233
234
235			`fs-lint`
236
237
238
239			`../verilog/common/top.tb`
240			`verilogSourcemodule`
241
242
243
244
245
246
247
248
249
250
251
252
253
254
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258