OpenCores
URL https://opencores.org/ocsvn/socgen/socgen/trunk

Subversion Repositories socgen

[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [io/] [ip/] [io_uart/] [sim/] [testbenches/] [xml/] [io_uart_rx_lint.xml] - Blame information for rev 131

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 131 jt_eaton
2
30
31
xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"
32
xmlns:socgen="http://opencores.org"
33
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
34
xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009
35
http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009/index.xsd">
36
 
37
opencores.org
38
io
39
io_uart
40
rx_lint
41
 
42
 
43
 
44
 
45
 
46
 
47
 
48
49
       
50
 
51
 
52
              
53
              Dut
54
              
55
              
56
                                   spirit:library="io"
57
                                   spirit:name="io_uart"
58
                                   spirit:version="rx_dut.params"/>
59
              
60
              
61
 
62
              
63
              lint
64
              :*Lint:*
65
              Verilog
66
              fs-lint
67
              
68
 
69
 
70
              
71
              rtl_check
72
              
73
              
74
                                   spirit:library="Testbench"
75
                                   spirit:name="toolflow"
76
                                   spirit:version="rtl_check"/>
77
              
78
              
79
 
80
 
81
      
82
 
83
 
84
 
85
86
 
87
 
88
 
89
 
90
  
91
 
92
 
93
 
94
    
95
      fs-lint
96
 
97
 
98
      
99
        
100
        ../verilog/lint/io_uart_rx_lint
101
        verilogSource
102
        module
103
      
104
 
105
 
106
    
107
 
108
 
109
 
110
 
111
  
112
 
113
 
114
 
115

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.