URL https://opencores.org/ocsvn/socgen/socgen/trunk

Subversion Repositories socgen

[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [io/] [ip/] [io_uart/] [sim/] [testbenches/] [xml/] [io_uart_tx_lint.xml] - Blame information for rev 131

Go to most recent revision | Details | Compare with Previous | View Log





xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"
xmlns:socgen="http://opencores.org"
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009
http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009/index.xsd">
 
opencores.org
io
io_uart
tx_lint
 
 
 
 
 
 
 


    BUS_ADDR_WIDTH4
    PS2_MODEL_CLKCNT8'h7f
    UART_MODEL_CLKCNT4'b1100
    UART_MODEL_SIZE4

 
       
 
 
 
              
              Dut
              
              
                                   spirit:library="io"
                                   spirit:name="io_uart"
                                   spirit:version="tx_dut.params"/>
              
              
 
 
              
              lint
              :*Lint:*
              Verilog
              fs-lint
              
 
 
              
              rtl_check
              
              
                                   spirit:library="Testbench"
                                   spirit:name="toolflow"
                                   spirit:version="rtl_check"/>
              
              
 
      
 
 

 
 
 
 
  
 
 
 
 
    
      fs-lint
 
      
        
        ../verilog/lint/io_uart_tx_lint
        verilogSource
        module
      
 
 
 
 
 
    
 
 
 
  
 
 
 


Line No.	Rev	Author	Line
1	131	jt_eaton
2
30
31			`xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"`
32			`xmlns:socgen="http://opencores.org"`
33			`xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"`
34			`xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009`
35			`http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009/index.xsd">`
36
37			`opencores.org`
38			`io`
39			`io_uart`
40			`tx_lint`
41
42
43
44
45
46
47
48
49
50			`BUS_ADDR_WIDTH4`
51			`PS2_MODEL_CLKCNT8'h7f`
52			`UART_MODEL_CLKCNT4'b1100`
53			`UART_MODEL_SIZE4`
54
55
56
57
58
59
60
61			`Dut`
62
63
64			`spirit:library="io"`
65			`spirit:name="io_uart"`
66			`spirit:version="tx_dut.params"/>`
67
68
69
70
71
72			`lint`
73			`:Lint:`
74			`Verilog`
75			`fs-lint`
76
77
78
79
80			`rtl_check`
81
82
83			`spirit:library="Testbench"`
84			`spirit:name="toolflow"`
85			`spirit:version="rtl_check"/>`
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103			`fs-lint`
104
105
106
107			`../verilog/lint/io_uart_tx_lint`
108			`verilogSource`
109			`module`
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124

Browse

Tools

Subversion Repositories socgen

[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [io/] [ip/] [io_uart/] [sim/] [testbenches/] [xml/] [io_uart_tx_lint.xml] - Blame information for rev 131