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[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [logic/] [ip/] [flash_memcontrl/] [componentCfg.xml] - Blame information for rev 135

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xmlns:ipxact="http://www.accellera.org/XMLSchema/IPXACT/1685-2014"
xmlns:socgen="http://opencores.org"
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
 
opencores.org
logic
flash_memcontrl
 
 
2
_
_
_
VARIANT
 

  
   TestBenches
   sim
   testbenches
   testbench
   version
  
  
   Fpgas
   syn
   ise
   chip
   variant
  

 
 
 

 
/doc
 

 
 
 
 
         
            default
            def
            def_tb
            def_lint
            
            ADDR_BITS24
           
          
 
 
 
 
      
 
 

 
flash_memcontrl/sim
 
 
 
 
 

 
 

flash_memcontrl_def_tb
def_tb

    PERIOD40
    TIMEOUT100000


  
  flash_memcontrl_defTB.test.dut
  


  icaruscoverage


 
 

flash_memcontrl_def_lint
def_lint

  rtl_check


 
 
 
 

 
 
 
 
 
 
 

 

default
flash_memcontrl_def_lint

 

 
 
 
 
 
 

 

default
flash_memcontrl_def_tb

 

 

 


Line No.	Rev	Author	Line
1	131	jt_eaton
2
5
6	135	jt_eaton	`xmlns:ipxact="http://www.accellera.org/XMLSchema/IPXACT/1685-2014"`
7	131	jt_eaton	`xmlns:socgen="http://opencores.org"`
8			`xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">`
9
10			`opencores.org`
11			`logic`
12			`flash_memcontrl`
13
14
15			`2`
16			`_`
17			`_`
18			`_`
19			`VARIANT`
20
21	135	jt_eaton
22
23			`TestBenches`
24			`sim`
25			`testbenches`
26			`testbench`
27			`version`
28
29
30			`Fpgas`
31			`syn`
32			`ise`
33			`chip`
34			`variant`
35
36
37	131	jt_eaton
38	135	jt_eaton
39
40	131	jt_eaton
41
42			`/doc`
43
44
45
46
47	134	jt_eaton
48	131	jt_eaton
49	134	jt_eaton
50			`default`
51			`def`
52			`def_tb`
53			`def_lint`
54
55			`ADDR_BITS24`
56
57
58	131	jt_eaton
59	134	jt_eaton
60
61
62
63
64
65	131	jt_eaton
66
67			`flash_memcontrl/sim`
68
69
70
71
72
73
74
75
76
77			`flash_memcontrl_def_tb`
78			`def_tb`
79
80			`PERIOD40`
81			`TIMEOUT100000`
82
83
84
85			`flash_memcontrl_defTB.test.dut`
86
87
88
89			`icaruscoverage`
90
91
92
93
94
95			`flash_memcontrl_def_lint`
96			`def_lint`
97
98			`rtl_check`
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116			`default`
117			`flash_memcontrl_def_lint`
118
119
120
121
122
123
124
125
126
127
128
129
130			`default`
131			`flash_memcontrl_def_tb`
132
133
134
135
136
137
138

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[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [logic/] [ip/] [flash_memcontrl/] [componentCfg.xml] - Blame information for rev 135