Subversion Repositories socgen

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[*] GTKWave Analyzer v3.3.62 (w)1999-2014 BSI

[*] Wed Apr 22 16:46:48 2015

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[dumpfile] "/home/johne/Desktop/socgen/work/opencores.org__logic/ip/flash_memcontrl/sim/icarus/default/TestBench.vcd"

[dumpfile_mtime] "Wed Apr 22 16:21:05 2015"

[dumpfile_size] 31324

[savefile] "/home/johne/Desktop/socgen/Projects/opencores.org/logic/ip/flash_memcontrl/sim/icarus/default/wave.sav"

[timestart] 0

[size] 1613 999

[pos] 75 339

*-13.000000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

[treeopen] TB.

[treeopen] TB.test.

[treeopen] TB.test.BUS16.

[sst_width] 223

[signals_width] 158

[sst_expanded] 1

[sst_vpaned_height] 300

@22

TB.test.memadr_out[23:1]

TB.test.memdb_in[15:0]

TB.test.memdb_io[15:0]

@28

TB.test.memdb_oe

@22

TB.test.memdb_out[15:0]

@28

TB.test.memoe_n_out

TB.test.memwr_n_out

TB.test.ramadv_n_out

TB.test.ramclk_out

TB.test.ramcre_out

TB.test.ramcs_n_out

TB.test.ramlb_n_out

TB.test.ramub_n_out

TB.test.ramwait_in

TB.test.ramwait_n

TB.test.rd

@22

TB.test.rdata[15:0]

@28

TB.test.reset

TB.test.stb

TB.test.ub

TB.test.wait_out

@22

TB.test.wdata[15:0]

@28

TB.test.wr

@22

TB.test.psram.addr[22:0]

@28

TB.test.psram.o_wait

TB.test.psram.adv_n

TB.test.psram.ce_n

TB.test.psram.clk

@29

TB.test.psram.cre

[pattern_trace] 1

[pattern_trace] 0