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[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [logic/] [ip/] [ps2_interface/] [rtl/] [xml/] [ps2_interface_def.design.xml] - Blame information for rev 135

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xmlns:ipxact="http://www.accellera.org/XMLSchema/IPXACT/1685-2014"
xmlns:socgen="http://opencores.org"
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
xsi:schemaLocation="http://www.accellera.org/XMLSchema/IPXACT/1685-2014
http://www.accellera.org/XMLSchema/IPXACT/1685-2014/index.xsd">
 
opencores.org
logic
ps2_interface
def.design
 
 

 
usec_prescale_count
reg

70

 
 
usec_delay_count
reg

60

 
 
 
usec_delay_done
reg
 

 
 
usec_tick
reg
 

 
force_startbit
reg
 

 
sending
reg
 

 
 
 
 
frame
reg

100

 
bit_count
reg

30

 
 
enable_usec_delay
wire
 

 
 
start_xmit
wire
 

 
 
ps2_clk_s
wire
 

 
 
ps2_clk_rise
wire
 

 
 
ps2_clk_fall
wire
 

 
 
 
ps2_data_s
wire
 

 
 
 
shift_frame
wire
 

 
 
 
load_tx_data
wire
 

 
 
 
x_shift_buffer
wire

70

 
 
x_stop_cnt
wire
 

 
 
x_last_cnt
wire
 

 
 
x_parity_calc
wire
 

 
 
x_parity_samp
wire
 

 
 
x_frame_err
wire
 

 
 
cde_serial_xmit_edge_enable
wire
 

 
 
cde_serial_xmit_load
wire
 

 
cde_serial_rcvr_reset
wire
 

 
 
 

 
 

 
 
      clk
      
      
      
      
      
    
 
 
 
      reset
      
      
      
      
    
 
 
 
      ps2_clk_pad_in
      
      
    
 
 
      ps2_data_pad_in
      
      
    
 
 
 
      ps2_clk_s
      
    
 
 
      ps2_clk_rise
      
    
 
 
      ps2_clk_fall
      
    
 
 
 
      ps2_data_s
      
    
 
 
      
      
      
    
 
 
 
      cde_serial_xmit_edge_enable
      
    
 
 
 
      cde_serial_xmit_load
      
    
 
 
 
      
      
    
 
 
 
      
      
      
    
 
 
 
 
      ~tx_data
      
    
 
 
 
      tx_buffer_empty
      
    
 
 
      ps2_data_pad_oe
      
      
    
 
 
 
      cde_serial_rcvr_reset
      
    
 
 
      ps2_clk_fall
      
    
 
 
 
      
      
    
 
 
 
      
    
 
 
 
      ps2_data_s
      
    
 
 
      x_shift_buffer
      
    
 
 
 
      x_stop_cnt
      
    
 
 
 
      x_last_cnt
      
    
 
 
 
      x_parity_calc
      
    
 
 
 
      x_parity_samp
      
    
 
 
 
      x_frame_err
      
    
 
 

 
 
 

 
 

clk_filter 

 DEBOUNCE_DELAY


 

data_filter 

 DEBOUNCE_DELAY


 
 

cde_serial_xmit 

 
 

cde_serial_rcvr 

 
 

 
 
 
 
 
 
 


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[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [logic/] [ip/] [ps2_interface/] [rtl/] [xml/] [ps2_interface_def.design.xml] - Blame information for rev 135

Line No.	Rev	Author	Line
1	131	jt_eaton
2
30	135	jt_eaton
31			`xmlns:ipxact="http://www.accellera.org/XMLSchema/IPXACT/1685-2014"`
32	131	jt_eaton	`xmlns:socgen="http://opencores.org"`
33			`xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"`
34	135	jt_eaton	`xsi:schemaLocation="http://www.accellera.org/XMLSchema/IPXACT/1685-2014`
35			`http://www.accellera.org/XMLSchema/IPXACT/1685-2014/index.xsd">`
36	131	jt_eaton
37	135	jt_eaton	`opencores.org`
38			`logic`
39			`ps2_interface`
40			`def.design`
41	131	jt_eaton
42
43	135	jt_eaton
44	131	jt_eaton
45	135	jt_eaton	`usec_prescale_count`
46			`reg`
47
48			`70`
49	131	jt_eaton
50
51
52	135	jt_eaton	`usec_delay_count`
53			`reg`
54
55			`60`
56	131	jt_eaton
57
58
59
60	135	jt_eaton	`usec_delay_done`
61			`reg`
62	131	jt_eaton
63
64
65
66	135	jt_eaton	`usec_tick`
67			`reg`
68	131	jt_eaton
69
70
71	135	jt_eaton	`force_startbit`
72			`reg`
73	131	jt_eaton
74
75
76	135	jt_eaton	`sending`
77			`reg`
78	131	jt_eaton
79
80
81
82
83
84	135	jt_eaton	`frame`
85			`reg`
86
87			`100`
88	131	jt_eaton
89
90	135	jt_eaton	`bit_count`
91			`reg`
92
93			`30`
94	131	jt_eaton
95
96
97	135	jt_eaton	`enable_usec_delay`
98			`wire`
99	131	jt_eaton
100
101
102
103	135	jt_eaton	`start_xmit`
104			`wire`
105	131	jt_eaton
106
107
108
109	135	jt_eaton	`ps2_clk_s`
110			`wire`
111	131	jt_eaton
112
113
114
115	135	jt_eaton	`ps2_clk_rise`
116			`wire`
117	131	jt_eaton
118
119
120
121	135	jt_eaton	`ps2_clk_fall`
122			`wire`
123	131	jt_eaton
124
125
126
127
128	135	jt_eaton	`ps2_data_s`
129			`wire`
130	131	jt_eaton
131
132
133
134
135	135	jt_eaton	`shift_frame`
136			`wire`
137	131	jt_eaton
138
139
140
141
142	135	jt_eaton	`load_tx_data`
143			`wire`
144	131	jt_eaton
145
146
147
148
149	135	jt_eaton	`x_shift_buffer`
150			`wire`
151
152			`70`
153	131	jt_eaton
154
155
156	135	jt_eaton	`x_stop_cnt`
157			`wire`
158	131	jt_eaton
159
160
161
162	135	jt_eaton	`x_last_cnt`
163			`wire`
164	131	jt_eaton
165
166
167
168	135	jt_eaton	`x_parity_calc`
169			`wire`
170	131	jt_eaton
171
172
173
174	135	jt_eaton	`x_parity_samp`
175			`wire`
176	131	jt_eaton
177
178
179
180	135	jt_eaton	`x_frame_err`
181			`wire`
182	131	jt_eaton
183
184
185
186	135	jt_eaton	`cde_serial_xmit_edge_enable`
187			`wire`
188	131	jt_eaton
189
190
191
192	135	jt_eaton	`cde_serial_xmit_load`
193			`wire`
194	131	jt_eaton
195
196
197	135	jt_eaton	`cde_serial_rcvr_reset`
198			`wire`
199	131	jt_eaton
200
201
202
203
204	135	jt_eaton
205	131	jt_eaton
206
207	135	jt_eaton
208	131	jt_eaton
209	135	jt_eaton
210			`clk`
211
212
213
214
215
216
217	131	jt_eaton
218
219	135	jt_eaton
220			`reset`
221
222
223
224
225
226	131	jt_eaton
227
228	135	jt_eaton
229			`ps2_clk_pad_in`
230
231
232
233	131	jt_eaton
234	135	jt_eaton
235			`ps2_data_pad_in`
236
237
238
239	131	jt_eaton
240
241	135	jt_eaton
242			`ps2_clk_s`
243
244
245	131	jt_eaton
246	135	jt_eaton
247			`ps2_clk_rise`
248
249
250	131	jt_eaton
251	135	jt_eaton
252			`ps2_clk_fall`
253
254
255	131	jt_eaton
256
257	135	jt_eaton
258			`ps2_data_s`
259
260
261	131	jt_eaton
262	135	jt_eaton
263
264
265
266
267	131	jt_eaton
268
269	135	jt_eaton
270			`cde_serial_xmit_edge_enable`
271
272
273	131	jt_eaton
274
275	135	jt_eaton
276			`cde_serial_xmit_load`
277
278
279	131	jt_eaton
280
281	135	jt_eaton
282
283
284
285	131	jt_eaton
286
287	135	jt_eaton
288
289
290
291
292	131	jt_eaton
293
294
295	135	jt_eaton
296			`~tx_data`
297
298
299	131	jt_eaton
300
301	135	jt_eaton
302			`tx_buffer_empty`
303
304
305	131	jt_eaton
306	135	jt_eaton
307			`ps2_data_pad_oe`
308
309
310
311	131	jt_eaton
312
313	135	jt_eaton
314			`cde_serial_rcvr_reset`
315
316
317	131	jt_eaton
318	135	jt_eaton
319			`ps2_clk_fall`
320
321
322	131	jt_eaton
323
324	135	jt_eaton
325
326
327
328	131	jt_eaton
329
330	135	jt_eaton
331
332
333	131	jt_eaton
334
335	135	jt_eaton
336			`ps2_data_s`
337
338
339	131	jt_eaton
340	135	jt_eaton
341			`x_shift_buffer`
342
343
344	131	jt_eaton
345
346	135	jt_eaton
347			`x_stop_cnt`
348
349
350	131	jt_eaton
351
352	135	jt_eaton
353			`x_last_cnt`
354
355
356	131	jt_eaton
357
358	135	jt_eaton
359			`x_parity_calc`
360
361
362	131	jt_eaton
363
364	135	jt_eaton
365			`x_parity_samp`
366
367
368	131	jt_eaton
369
370	135	jt_eaton
371			`x_frame_err`
372
373
374	131	jt_eaton
375
376	135	jt_eaton
377	131	jt_eaton
378
379
380	135	jt_eaton
381	131	jt_eaton
382
383	135	jt_eaton
384			`clk_filter`
385
386			`DEBOUNCE_DELAY`
387
388
389	131	jt_eaton
390	135	jt_eaton
391			`data_filter`
392
393			`DEBOUNCE_DELAY`
394
395
396	131	jt_eaton
397
398	135	jt_eaton
399			`cde_serial_xmit`
400
401	131	jt_eaton
402
403	135	jt_eaton
404			`cde_serial_rcvr`
405
406	131	jt_eaton
407
408	135	jt_eaton
409	131	jt_eaton
410
411
412
413
414
415
416	135	jt_eaton