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[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [logic/] [ip/] [serial_rcvr/] [doc/] [index.html] - Blame information for rev 131

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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<html>
<head>
  <meta http-equiv="CONTENT-TYPE" content="text/html; charset=utf-8">
  <title>start</title>
  <meta name="GENERATOR" content="OpenOffice.org 3.0  (Linux)">
  <meta name="CREATED" content="0;0">
  <meta name="CHANGED" content="20090513;8521600">
  <meta name="KEYWORDS" content="start">
  <meta name="Info 3" content="">
  <meta name="Info 4" content="">
  <meta name="date" content="2008-01-08T12:01:41-0500">
  <meta name="robots" content="index,follow">
</head>
<body dir="ltr" lang="en-US">
<div id="toc__header" dir="ltr">
<p><br>
</p>
<h1><a name="socgen ip"></a>SOCGEN IP: SERIAL_RCVR<br>
</h1>
<p><br>
</p>
<p>Table of Contents</p>
</div>
<div id="toc__inside" dir="ltr">
<ul>
  <li>
    <p style="margin-bottom: 0in;"><a href="#geda_project_wiki">SOCGEN
IP: SERIAL_RCVR<br>
    </a></p>
    <ul>
      <li>
        <p style="margin-bottom: 0in;"><a href="#description">Description<br>
        </a></p>
      </li>
      <li>
        <p style="margin-bottom: 0in;"><a href="#interface">Interface<br>
        </a></p>
      </li>
      <li>
        <p><a
 href="../../../../../../socgen_cmp/projects/logic/ip/serial_rcvr/rtl/gen/syn/serial_rcvr.v">Source
Code</a></p>
      </li>
    </ul>
  </li>
</ul>
</div>
<h1><img style="width: 640px; height: 480px;" alt="" src="png/serial_xmit.png"><br>
</h1>
<br>
<br>
<h2><a name="#description"></a><!-- SECTION "" [2-34] -->Description<br>
</h2>
<p>The Uart is a 8 bit serial port interface transmit engine. Data
Rate is set by a parameter that scales the clk down to a 16 X clock
enable.&nbsp; Parity is also selected with a parameter and if enabled
may be even,odd, always 1 or always 0. <br>
</p>
<p><br>
</p>
<p><br>
</p>
<h2><a name="#interface"></a><!-- SECTION "Why do another 6502?" [35-1160] -->Interface<br>
</h2>
<p>The<br>
</p>
<ul>
  <li>
    <p style="margin-bottom: 0in;">clk<br>
    </p>
  </li>
  <li>reset</li>
  <li>txd_parity</li>
  <li>txd_force_parity</li>
  <li>txd_data_in[7:0]</li>
  <li>txd_load</li>
  <li>txd_buffer_empty</li>
  <li>txd_pad_out</li>
</ul>
<br>
<br>
<br>
<br>
<br>
<br>
<br>
<br>
<br>
<br>
<p style="margin-bottom: 0in;"></p>
</body>
</html>

Line No.	Rev	Author	Line
1	131	jt_eaton	`<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">`
2			`<html>`
3			`<head>`
4			`<meta http-equiv="CONTENT-TYPE" content="text/html; charset=utf-8">`
5			`<title>start</title>`
6			`<meta name="GENERATOR" content="OpenOffice.org 3.0 (Linux)">`
7			`<meta name="CREATED" content="0;0">`
8			`<meta name="CHANGED" content="20090513;8521600">`
9			`<meta name="KEYWORDS" content="start">`
10			`<meta name="Info 3" content="">`
11			`<meta name="Info 4" content="">`
12			`<meta name="date" content="2008-01-08T12:01:41-0500">`
13			`<meta name="robots" content="index,follow">`
14			`</head>`
15			`<body dir="ltr" lang="en-US">`
16			`<div id="toc__header" dir="ltr">`
17			`<p><br>`
18			`</p>`
19			`<h1><a name="socgen ip"></a>SOCGEN IP: SERIAL_RCVR<br>`
20			`</h1>`
21			`<p><br>`
22			`</p>`
23			`<p>Table of Contents</p>`
24			`</div>`
25			`<div id="toc__inside" dir="ltr">`
26			`<ul>`
27			`<li>`
28			`<p style="margin-bottom: 0in;"><a href="#geda_project_wiki">SOCGEN`
29			`IP: SERIAL_RCVR<br>`
30			`</a></p>`
31			`<ul>`
32			`<li>`
33			`<p style="margin-bottom: 0in;"><a href="#description">Description<br>`
34			`</a></p>`
35			`</li>`
36			`<li>`
37			`<p style="margin-bottom: 0in;"><a href="#interface">Interface<br>`
38			`</a></p>`
39			`</li>`
40			`<li>`
41			`<p><a`
42			`href="../../../../../../socgen_cmp/projects/logic/ip/serial_rcvr/rtl/gen/syn/serial_rcvr.v">Source`
43			`Code</a></p>`
44			`</li>`
45			`</ul>`
46			`</li>`
47			`</ul>`
48			`</div>`
49			`<h1><img style="width: 640px; height: 480px;" alt="" src="png/serial_xmit.png"><br>`
50			`</h1>`
51			`<br>`
52			`<br>`
53			`<h2><a name="#description"></a><!-- SECTION "" [2-34] -->Description<br>`
54			`</h2>`
55			`<p>The Uart is a 8 bit serial port interface transmit engine. Data`
56			`Rate is set by a parameter that scales the clk down to a 16 X clock`
57			`enable.  Parity is also selected with a parameter and if enabled`
58			`may be even,odd, always 1 or always 0. <br>`
59			`</p>`
60			`<p><br>`
61			`</p>`
62			`<p><br>`
63			`</p>`
64			`<h2><a name="#interface"></a><!-- SECTION "Why do another 6502?" [35-1160] -->Interface<br>`
65			`</h2>`
66			`<p>The<br>`
67			`</p>`
68			`<ul>`
69			`<li>`
70			`<p style="margin-bottom: 0in;">clk<br>`
71			`</p>`
72			`</li>`
73			`<li>reset</li>`
74			`<li>txd_parity</li>`
75			`<li>txd_force_parity</li>`
76			`<li>txd_data_in[7:0]</li>`
77			`<li>txd_load</li>`
78			`<li>txd_buffer_empty</li>`
79			`<li>txd_pad_out</li>`
80			`</ul>`
81			`<br>`
82			`<br>`
83			`<br>`
84			`<br>`
85			`<br>`
86			`<br>`
87			`<br>`
88			`<br>`
89			`<br>`
90			`<br>`
91			`<p style="margin-bottom: 0in;"></p>`
92			`</body>`
93			`</html>`

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[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [logic/] [ip/] [serial_rcvr/] [doc/] [index.html] - Blame information for rev 131