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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<html>
<head>
  <meta http-equiv="CONTENT-TYPE" content="text/html; charset=utf-8">
  <title>start</title>
  <meta name="GENERATOR" content="OpenOffice.org 3.0  (Linux)">
  <meta name="CREATED" content="0;0">
  <meta name="CHANGED" content="20090513;8521600">
  <meta name="KEYWORDS" content="start">
  <meta name="Info 3" content="">
  <meta name="Info 4" content="">
  <meta name="date" content="2008-01-08T12:01:41-0500">
  <meta name="robots" content="index,follow">
</head>
<body dir="ltr" lang="en-US">
<div id="toc__header" dir="ltr">
<p><br>
</p>
<h1><a name="socgen ip"></a>SOCGEN IP: UART</h1>
<p><br>
</p>
<p>Table of Contents</p>
</div>
<div id="toc__inside" dir="ltr">
<ul>
  <li>
    <p style="margin-bottom: 0in;"><a href="#geda_project_wiki">SOCGEN
IP: UART<br>
    </a></p>
    <ul>
      <li>
        <p style="margin-bottom: 0in;"><a href="#what_is_F6502">Description<br>
        </a></p>
      </li>
      <li>
        <p style="margin-bottom: 0in;"><a href="#why_do_another_6502">Interface<br>
        </a></p>
      </li>
      <li>
        <p><a
 href="../../../../../../socgen_cmp/projects/logic/ip/uart/rtl/gen/syn/uart.v">Source
Code</a></p>
      </li>
    </ul>
  </li>
</ul>
</div>
<h1><img style="width: 640px; height: 480px;" alt="" src="png/uart.png"><br>
</h1>
<br>
<br>
<h2><a name="what_is_uart"></a><!-- SECTION "" [2-34] -->Description<br>
</h2>
<p>The Uart is a 8 bit full duplex serial port interface engine. Data
Rate is set by a parameter that scales the clk down to a 16 X clock
enable.&nbsp; Parity is also selected with a parameter and if enabled
may be even,odd, always 1 or always 0. <br>
</p>
<p><br>
</p>
<p><br>
</p>
<h2><a name="official_project_documentation"></a><!-- SECTION "Why do another 6502?" [35-1160] -->Interface<br>
</h2>
<p>The<br>
</p>
<ul>
  <li>
    <p style="margin-bottom: 0in;">clk<br>
    </p>
  </li>
  <li>reset</li>
  <li>rxd_parity</li>
  <li>rxd_force_parity</li>
  <li>rxd_pad_in</li>
  <li>rxd_buffer_full</li>
  <li>rxd_data_out[7:0]</li>
  <li>rxd_parity_error</li>
  <li>rxd_stop_error</li>
  <li>txd_parity</li>
  <li>txd_force_parity</li>
  <li>txd_data_in[7:0]</li>
  <li>txd_load</li>
  <li>txd_buffer_empty</li>
  <li>txd_pad_out</li>
  <li>cts_pad_in</li>
  <li>cts_out</li>
  <li>rts_in</li>
  <li>rts_pad_out<br>
  </li>
</ul>
<br>
<br>
<br>
<br>
<br>
<br>
<br>
<br>
<br>
<br>
<p style="margin-bottom: 0in;"></p>
</body>
</html>

Line No.	Rev	Author	Line
1	131	jt_eaton	`<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">`
2			`<html>`
3			`<head>`
4			`<meta http-equiv="CONTENT-TYPE" content="text/html; charset=utf-8">`
5			`<title>start</title>`
6			`<meta name="GENERATOR" content="OpenOffice.org 3.0 (Linux)">`
7			`<meta name="CREATED" content="0;0">`
8			`<meta name="CHANGED" content="20090513;8521600">`
9			`<meta name="KEYWORDS" content="start">`
10			`<meta name="Info 3" content="">`
11			`<meta name="Info 4" content="">`
12			`<meta name="date" content="2008-01-08T12:01:41-0500">`
13			`<meta name="robots" content="index,follow">`
14			`</head>`
15			`<body dir="ltr" lang="en-US">`
16			`<div id="toc__header" dir="ltr">`
17			`<p><br>`
18			`</p>`
19			`<h1><a name="socgen ip"></a>SOCGEN IP: UART</h1>`
20			`<p><br>`
21			`</p>`
22			`<p>Table of Contents</p>`
23			`</div>`
24			`<div id="toc__inside" dir="ltr">`
25			`<ul>`
26			`<li>`
27			`<p style="margin-bottom: 0in;"><a href="#geda_project_wiki">SOCGEN`
28			`IP: UART<br>`
29			`</a></p>`
30			`<ul>`
31			`<li>`
32			`<p style="margin-bottom: 0in;"><a href="#what_is_F6502">Description<br>`
33			`</a></p>`
34			`</li>`
35			`<li>`
36			`<p style="margin-bottom: 0in;"><a href="#why_do_another_6502">Interface<br>`
37			`</a></p>`
38			`</li>`
39			`<li>`
40			`<p><a`
41			`href="../../../../../../socgen_cmp/projects/logic/ip/uart/rtl/gen/syn/uart.v">Source`
42			`Code</a></p>`
43			`</li>`
44			`</ul>`
45			`</li>`
46			`</ul>`
47			`</div>`
48			`<h1><img style="width: 640px; height: 480px;" alt="" src="png/uart.png"><br>`
49			`</h1>`
50			`<br>`
51			`<br>`
52			`<h2><a name="what_is_uart"></a><!-- SECTION "" [2-34] -->Description<br>`
53			`</h2>`
54			`<p>The Uart is a 8 bit full duplex serial port interface engine. Data`
55			`Rate is set by a parameter that scales the clk down to a 16 X clock`
56			`enable.  Parity is also selected with a parameter and if enabled`
57			`may be even,odd, always 1 or always 0. <br>`
58			`</p>`
59			`<p><br>`
60			`</p>`
61			`<p><br>`
62			`</p>`
63			`<h2><a name="official_project_documentation"></a><!-- SECTION "Why do another 6502?" [35-1160] -->Interface<br>`
64			`</h2>`
65			`<p>The<br>`
66			`</p>`
67			`<ul>`
68			`<li>`
69			`<p style="margin-bottom: 0in;">clk<br>`
70			`</p>`
71			`</li>`
72			`<li>reset</li>`
73			`<li>rxd_parity</li>`
74			`<li>rxd_force_parity</li>`
75			`<li>rxd_pad_in</li>`
76			`<li>rxd_buffer_full</li>`
77			`<li>rxd_data_out[7:0]</li>`
78			`<li>rxd_parity_error</li>`
79			`<li>rxd_stop_error</li>`
80			`<li>txd_parity</li>`
81			`<li>txd_force_parity</li>`
82			`<li>txd_data_in[7:0]</li>`
83			`<li>txd_load</li>`
84			`<li>txd_buffer_empty</li>`
85			`<li>txd_pad_out</li>`
86			`<li>cts_pad_in</li>`
87			`<li>cts_out</li>`
88			`<li>rts_in</li>`
89			`<li>rts_pad_out<br>`
90			`</li>`
91			`</ul>`
92			`<br>`
93			`<br>`
94			`<br>`
95			`<br>`
96			`<br>`
97			`<br>`
98			`<br>`
99			`<br>`
100			`<br>`
101			`<br>`
102			`<p style="margin-bottom: 0in;"></p>`
103			`</body>`
104			`</html>`

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[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [logic/] [ip/] [uart/] [doc/] [index.html] - Blame information for rev 131