URL https://opencores.org/ocsvn/socgen/socgen/trunk

Subversion Repositories socgen

[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [logic/] [ip/] [vga_char_ctrl/] [sim/] [icarus/] [default_600x432/] [wave.sav] - Blame information for rev 131

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[timestart] 0
[size] 1613 999
[pos] 28 -108
*-25.000000 11000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
[treeopen] TB.
[treeopen] TB.dut.
@28
TB.clk
TB.reset
TB.vga_red_pad_out[2:0]
TB.vga_green_pad_out[2:0]
TB.vga_blue_pad_out[1:0]
TB.vsync_n_pad_out
@29
TB.hsync_n_pad_out
[pattern_trace] 1
[pattern_trace] 0

Line No.	Rev	Author	Line
1	131	jt_eaton	`[timestart] 0`
2			`[size] 1613 999`
3			`[pos] 28 -108`
4			`*-25.000000 11000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1`
5			`[treeopen] TB.`
6			`[treeopen] TB.dut.`
7			`@28`
8			`TB.clk`
9			`TB.reset`
10			`TB.vga_red_pad_out[2:0]`
11			`TB.vga_green_pad_out[2:0]`
12			`TB.vga_blue_pad_out[1:0]`
13			`TB.vsync_n_pad_out`
14			`@29`
15			`TB.hsync_n_pad_out`
16			`[pattern_trace] 1`
17			`[pattern_trace] 0`

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Subversion Repositories socgen

[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [logic/] [ip/] [vga_char_ctrl/] [sim/] [icarus/] [default_600x432/] [wave.sav] - Blame information for rev 131