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reg           task_reset;

reg           task_FAIL;

reg           task_FINISH;

always@(posedge clk or negedge START)

  if(!START)  FINISH <= 0;

  else        FINISH <= (|STOP) || FINISH || task_FINISH;

always@(posedge clk or negedge START)

  if(!START)  FAIL <= 0;

  else        FAIL <= task_FAIL || (|BAD);

always@(posedge clk or negedge START)

  if(!START)  reset <= 1'b1;

  else        reset <= task_reset;

task automatic next;

  input [31:0] num;

  repeat (num)       @ (posedge clk);

endtask // next

initial

  begin

     task_FINISH <= 0;

     task_FAIL   <= 0;

     task_reset  <= 0;

  end

task reset_on;

  task_reset = 1;

endtask // reset_on

task reset_off;

  begin

  task_reset = 0;

  end

endtask // reset_off

task automatic fail;

  input [799:0] message;

  begin

  task_FAIL   <= 1;

  $display("%t  Simulation FAILURE:  %s ",$realtime,message  );

  @(posedge clk);

  task_FAIL   <= 0;

  end

endtask

task exit;

   begin

      @(posedge clk);

      task_FINISH <= 1;

      @(posedge clk);

      @(posedge clk);

      @(posedge clk);

      @(posedge clk);

     end

endtask