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[/] [socgen/] [trunk/] [common/] [opencores.org/] [cde/] [ip/] [clock/] [rtl/] [xml/] [cde_clock_sys.design.xml] - Blame information for rev 135

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xmlns:ipxact="http://www.accellera.org/XMLSchema/IPXACT/1685-2014"
xmlns:socgen="http://opencores.org"
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
xsi:schemaLocation="http://www.accellera.org/XMLSchema/IPXACT/1685-2014
http://www.accellera.org/XMLSchema/IPXACT/1685-2014/index.xsd">
 
opencores.org
cde
clock
sys.design
 
 
 

 
 
 
 
ref_reset
reg

 
 
pwron_reset_n
reg

 
 
 
 

 

 
 
  
 
 
    
      ckIn
      
      
    
 
    
      pwron_reset
      
      
    
 
 
    
      pwron_reset_n
      
      
      
    
 
 
    
      ref_reset
      
      
      
    
 
    
      reset
      
       
    
 
    
      dll_reset
      
       
    
 
    
      dll_clk
      
      
      
    
 
 
    
      div_clk_out
      
      
      
    
 
 
 
 
 
  
 
 
 

 

dll


PLL_MULT
PLL_DIV
PLL_SIZE


 
 

ref_rsync


1
2
1'b1


 
 

dll_rsync


1
2
1'b1


 
 
 
 

 
 
 
 


Line No.	Rev	Author	Line
1	131	jt_eaton
2
5	135	jt_eaton
6			`xmlns:ipxact="http://www.accellera.org/XMLSchema/IPXACT/1685-2014"`
7	131	jt_eaton	`xmlns:socgen="http://opencores.org"`
8			`xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"`
9	135	jt_eaton	`xsi:schemaLocation="http://www.accellera.org/XMLSchema/IPXACT/1685-2014`
10			`http://www.accellera.org/XMLSchema/IPXACT/1685-2014/index.xsd">`
11	131	jt_eaton
12	135	jt_eaton	`opencores.org`
13			`cde`
14			`clock`
15			`sys.design`
16	131	jt_eaton
17
18
19	135	jt_eaton
20	131	jt_eaton
21
22
23
24	135	jt_eaton	`ref_reset`
25			`reg`
26	134	jt_eaton
27	131	jt_eaton
28
29	135	jt_eaton	`pwron_reset_n`
30			`reg`
31	134	jt_eaton
32
33
34
35
36
37
38	135	jt_eaton
39	134	jt_eaton
40
41	135	jt_eaton
42	134	jt_eaton
43
44	135	jt_eaton
45			`ckIn`
46
47
48
49	134	jt_eaton
50	135	jt_eaton
51			`pwron_reset`
52
53
54
55	134	jt_eaton
56
57	135	jt_eaton
58			`pwron_reset_n`
59
60
61
62
63	134	jt_eaton
64
65	135	jt_eaton
66			`ref_reset`
67
68
69
70
71	134	jt_eaton
72	135	jt_eaton
73			`reset`
74
75
76
77	134	jt_eaton
78	135	jt_eaton
79			`dll_reset`
80
81
82
83	134	jt_eaton
84	135	jt_eaton
85			`dll_clk`
86
87
88
89
90	134	jt_eaton
91
92	135	jt_eaton
93			`div_clk_out`
94
95
96
97
98	134	jt_eaton
99
100
101
102
103	135	jt_eaton
104	134	jt_eaton
105
106
107	135	jt_eaton
108	131	jt_eaton
109	135	jt_eaton
110			`dll`
111
112
113			`PLL_MULT`
114			`PLL_DIV`
115			`PLL_SIZE`
116
117
118	134	jt_eaton
119
120	135	jt_eaton
121			`ref_rsync`
122
123
124			`1`
125			`2`
126			`1'b1`
127
128
129	131	jt_eaton
130
131	135	jt_eaton
132			`dll_rsync`
133
134
135			`1`
136			`2`
137			`1'b1`
138
139
140	131	jt_eaton
141	134	jt_eaton
142
143
144	135	jt_eaton
145	131	jt_eaton
146
147
148
149	135	jt_eaton

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[/] [socgen/] [trunk/] [common/] [opencores.org/] [cde/] [ip/] [clock/] [rtl/] [xml/] [cde_clock_sys.design.xml] - Blame information for rev 135