OpenCores
URL https://opencores.org/ocsvn/socgen/socgen/trunk

Subversion Repositories socgen

[/] [socgen/] [trunk/] [common/] [opencores.org/] [cde/] [ip/] [mult/] [sim/] [icarus/] [ord_r4/] [wave.sav] - Blame information for rev 131

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 131 jt_eaton 
[timestart] 0
2 
[size] 1920 1176
3 
[pos] 0 41
4 
*-9.000000 610 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
5 
[treeopen] TB.
6 
[treeopen] TB.test.
7 
[treeopen] TB.test.dut.
8 
@28
9 
TB.test.clk
10 
TB.test.reset
11 
@22
12 
TB.test.a_in[31:0]
13 
TB.test.b_in[31:0]
14 
@28
15 
TB.test.alu_op_mul
16 
TB.test.dut.mul_stall
17 
TB.test.dut.ex_freeze
18 
TB.test.dut.ex_freeze_r
19 
TB.test.dut.alu_op_mul
20 
@22
21 
TB.test.dut.mul_prod_r[63:0]
22 
@28
23 
TB.test.dut.clk
24 
TB.test.dut.reset
25 
TB.test.dut.ex_freeze
26 
TB.test.dut.ex_freeze_r
27 
TB.test.dut.mul_stall
28 
@22
29 
TB.test.dut.m1.bit_cnt[4:0]
30 
@28
31 
TB.test.dut.m1.clk
32 
TB.test.dut.m1.ready
33 
@22
34 
TB.test.dut.m1.bit_cnt[4:0]
35 
TB.test.dut.m1.multiplier[31:0]
36 
TB.test.dut.m1.multiplicand[31:0]
37 
TB.test.dut.m1.prod[63:0]
38 
@29
39 
TB.test.dut.m1.ready
40 
[pattern_trace] 1
41 
[pattern_trace] 0

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.