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[/] [socgen/] [trunk/] [common/] [opencores.org/] [cde/] [ip/] [reg/] [doc/] [sym/] [cde_reg_rst.sym] - Blame information for rev 135

Line No.	Rev	Author	Line
1	135	jt_eaton	`v 20031231 1`
2			`L 300 600 375 700 3 10 0 0 -1 -1`
3			`L 375 700 300 800 3 10 0 0 -1 -1`
4			`B 300 400 1000 1600 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1`
5			`L 800 0 800 300 4 0 0 0 -1 -1`
6			`V 800 350 50 6 0 0 0 -1 -1 0 0 -1 -1 -1 -1`
7			`L 0 0 800 0 4 10 0 0 -1 -1`
8			`P 0 0 0 0 4 0 0`
9			`{`
10			`T 800 0 5 10 0 1 0 1 1`
11			`PINNAME=reset_n`
12			`T 800 0 0 8 0 1 0 6 1`
13			`DIR=in`
14			`}`
15			`L 0 700 300 700 4 10 0 0 -1 -1`
16			`P 0 700 0 700 4 0 0`
17			`{`
18			`T 300 700 5 10 0 1 0 1 1`
19			`PINNAME=clk`
20			`T 300 700 0 8 0 1 0 6 1`
21			`DIR=in`
22			`}`
23			`T 1200 2200 5 10 1 1 0 2 1`
24			`refdes=U?`
25			`T 400 0 5 10 0 1 0 2 1`
26			`module_name=cde_reg_rst`
27			`T 0 -200 0 10 0 0 0 0 1`
28			`vendor=opencores.org`
29			`T 0 -300 0 10 0 0 0 0 1`
30			`library=cde`
31			`T 0 -400 0 10 0 0 0 0 1`
32			`component=reg`
33			`T 0 -500 0 10 0 0 0 0 1`
34			`version=rst`
35			`L 0 1700 300 1700 4 10 0 0 -1 -1`
36			`P 0 1700 0 1700 4 0 0`
37			`{`
38			`T 300 1700 5 10 1 1 0 1 1`
39			`PINNAME=D`
40			`T 300 1700 0 8 0 1 0 6 1`
41			`DIR=in`
42			`}`
43			`L 1300 1700 1600 1700 4 10 0 0 -1 -1`
44			`P 1600 1700 1600 1700 4 0 1`
45			`{`
46			`T 1300 1700 5 10 1 1 0 7 1`
47			`PINNAME=Q`
48			`T 1300 1700 0 8 0 1 0 0 1`
49			`DIR=out`
50			`}`