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[/] [socgen/] [trunk/] [common/] [opencores.org/] [cde/] [ip/] [serial/] [sim/] [testbenches/] [xml/] [cde_serial_rcvr_lint.xml] - Blame information for rev 135

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xmlns:ipxact="http://www.accellera.org/XMLSchema/IPXACT/1685-2014"
xmlns:socgen="http://opencores.org"
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
xsi:schemaLocation="http://www.accellera.org/XMLSchema/IPXACT/1685-2014
http://www.accellera.org/XMLSchema/IPXACT/1685-2014/index.xsd">
 
opencores.org
cde
serial
rcvr_lint
 

 
 
 

 
 
 
 
 
 
 

 
       
 
 
              
              Dut
              
              
                                   ipxact:library="cde"
                                   ipxact:name="serial"
                                   ipxact:version="rcvr_dut.params"/>
              
              
 
              
              lint
              :*Lint:*
              Verilog
              fs-lint
              
 
 
 
              
              rtl_check
              
              
                                   ipxact:library="Testbench"
                                   ipxact:name="toolflow"
                                   ipxact:version="rtl_check"/>
              
              
 
      
 
 
 
 

 
 
 
 
 
 
 

 
 
 
   
      fs-lint
      
        
        ../verilog/lint/serial_rcvr_lint
        verilogSource
        module
      
 
 
 
   
 
 
 
 

 
 
 
 
 
 
 


Line No.	Rev	Author	Line
1	131	jt_eaton
2
5	135	jt_eaton
6			`xmlns:ipxact="http://www.accellera.org/XMLSchema/IPXACT/1685-2014"`
7	131	jt_eaton	`xmlns:socgen="http://opencores.org"`
8			`xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"`
9	135	jt_eaton	`xsi:schemaLocation="http://www.accellera.org/XMLSchema/IPXACT/1685-2014`
10			`http://www.accellera.org/XMLSchema/IPXACT/1685-2014/index.xsd">`
11	131	jt_eaton
12	135	jt_eaton	`opencores.org`
13			`cde`
14			`serial`
15			`rcvr_lint`
16	131	jt_eaton
17	135	jt_eaton
18	131	jt_eaton
19
20
21	135	jt_eaton
22	131	jt_eaton
23
24
25	133	jt_eaton
26
27
28
29	135	jt_eaton
30	131	jt_eaton
31	135	jt_eaton
32	131	jt_eaton
33
34	135	jt_eaton
35			`Dut`
36
37
38			`ipxact:library="cde"`
39			`ipxact:name="serial"`
40			`ipxact:version="rcvr_dut.params"/>`
41
42
43	131	jt_eaton
44	135	jt_eaton
45			`lint`
46			`:Lint:`
47			`Verilog`
48			`fs-lint`
49
50	131	jt_eaton
51
52
53	135	jt_eaton
54			`rtl_check`
55
56
57			`ipxact:library="Testbench"`
58			`ipxact:name="toolflow"`
59			`ipxact:version="rtl_check"/>`
60
61
62	131	jt_eaton
63	135	jt_eaton
64	131	jt_eaton
65
66
67
68	135	jt_eaton
69	131	jt_eaton
70
71
72
73
74
75
76	135	jt_eaton
77	131	jt_eaton
78
79
80	135	jt_eaton
81			`fs-lint`
82
83
84			`../verilog/lint/serial_rcvr_lint`
85			`verilogSource`
86			`module`
87
88	131	jt_eaton
89
90
91	135	jt_eaton
92	131	jt_eaton
93
94
95
96	135	jt_eaton
97	131	jt_eaton
98
99
100
101
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104	135	jt_eaton

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[/] [socgen/] [trunk/] [common/] [opencores.org/] [cde/] [ip/] [serial/] [sim/] [testbenches/] [xml/] [cde_serial_rcvr_lint.xml] - Blame information for rev 135