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[/] [socgen/] [trunk/] [doc/] [src/] [drawing/] [sch/] [fund_reset_fig4.sch] - Blame information for rev 120

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Line No. Rev Author Line
1 120 jt_eaton
v 20110115 2
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B 53200 41500 11500 8400 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1
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C 54300 42300 1 0 0 reg_rst.sym
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{
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T 56100 44100 5 10 0 0 0 0 1
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device=REGISTER_RST
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T 55600 44300 5 10 1 1 0 6 1
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refdes=U?
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}
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T 54400 44700 9 10 1 0 0 0 3
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ACTIVE LOW
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RESET TO
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COMPONENT
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N 55900 43900 56300 43900 4
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T 53900 45400 9 25 1 0 0 0 1
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Soft Reset
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C 57800 46000 1 0 0 reg_rst.sym
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{
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T 59600 47800 5 10 0 0 0 0 1
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device=REGISTER_RST
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T 59100 48000 5 10 1 1 0 6 1
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refdes=U?
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}
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N 55100 42300 55100 41900 4
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N 53700 41900 58600 41900 4
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N 58600 46000 58600 41900 4
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T 61100 43200 9 25 1 0 0 0 2
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Reset Style #3
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Both
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C 56300 47300 1 0 0 and2-1.sym
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{
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T 56700 47200 5 10 1 1 0 2 1
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refdes=U?
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T 56700 47400 5 8 0 0 0 0 1
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device=and
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}
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N 57800 47600 57600 47600 4
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N 56300 47400 56300 43900 4

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