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<head>
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  <title>Design Database Management</title>
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<h1><a name="socgen_project"></a><font size="+3">SOCGEN Project</font></h1>
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<h2><br>
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</h2>
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The mission of the SOCGEN project is to provide a blueprint showing
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digital designers how to create a System_on_chip (SOC) by
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assembling&nbsp; components from a variety of sources. It will
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show how to create a component that can be reused and provides&nbsp; a
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free opensourced tool set&nbsp; that can be used to assemble and verify
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a design. It employs modern design for reuse techniques to reduce the
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waste and inefficiencies that is inherent in handcrafting a design. <br>
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<br>
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<br>
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<br>
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<br>
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<br>
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<br>
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<h2><a name="manifesto"></a><font size="+2">Principles for Creating
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Reusable Design</font>s<br>
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</h2>
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<p><br>
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</p>
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<br>
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<h2><font size="+1">Plan ahead<br>
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</font></h2>
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You may start a design with the intent that it is only going to be used
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for one specific purpose only to find out later that other designers
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want to use it. Create all designs with the intent that they will be
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reused in ways that you haven't imagined and you won't have to scramble
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later.&nbsp; <br>
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<br>
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<br>
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<h2><font size="+1">Maintain the design<br>
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</font></h2>
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Releasing a chip to production is not the end of the job. You must
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still continue to maintain the design. You cannot archive a chip data
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base into offline storage and simply put it on the shelf. Do you really
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think that you can pull it down 20 years later and recreate the chip?
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Bit Rot is real. Even if you can read the bits off the magtape that you
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used to use then you will find that you can no longer get the same
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version of the tools that you used &nbsp; to build the chip. The
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original IC process will be long gone and the current ones have added
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new requirements that your code doesn't meet.<br>
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<br>
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When you finish a chip you archive an exact copy of all the data and
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freeze that forever. Your design then continues to live on.&nbsp; When
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you get a new version of a tool you rebuild and test&nbsp; everything
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and fix problems. As new processes come online you retarget the design
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to use them. As component ip is reved you upgrade and run the test
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suite.<br>
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<br>
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Then when your original product is winding down and someone wants a
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follow up product then you have a head start.<br>
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<br>
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<br>
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<h2><font><font size="+1">Design for the lowest common denominator</font></font></h2>
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Everybody loves to use some quirky little feature of the design target
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to squeeze a little extra performance out of the system. But if you do
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then you are locked into that target and cannot easily reuse the design
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on a different target. Why do you think they put those features in the
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first place? Instead you should survey the field and only use the
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features that all target technologies can match<br>
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<br>
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<br>
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<h2><font><font><font><font size="+1">Design in a completely generic
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technology<br>
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</font></font></font></font></h2>
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Design is a two step process. First the design is created and verified
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in a completely generic behavioral RTL format and then converted into
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the target technology. It is tempting to try to save time be designing
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in the target technology but this will make it harder to reuse.<br>
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<br>
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<br>
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<h2><font><font><font><font><font><font><font><font size="+1">Automate
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Everything</font></font></font></font></font></font></font></font><br>
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</h2>
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<p>
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Handcrafting a design file is a time consuming and error prone
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operation. Tasks that are preformed on every design should be done by a
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tool.&nbsp; The designers job is to create the configuration files
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needed by the tools and let automation do all the work.<br>
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</p>
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<p><br>
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</p>
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<h2><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font
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 size="+1">Do not keep duplicate copies of a file in the database</font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></h2>
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Doing so makes it difficult to ensure that bug fixes and enhancements
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created by one user can be made available to all users. Every file
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should have one and only one location in the database<br>
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<br>
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<br>
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<h2><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font
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 size="+1">Do not build&nbsp; the design inside of an RCS database.</font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></h2>
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It is really hard to keep track of all the new files that you have
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added that you need to check into the Revision Control System&nbsp; if
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they are buried by
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gigabytes of generated files from the build process. Use symbolic links
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to create a work area where generated files are kept outside the
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database.Never check a generated file in an RCS repository. They should
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only
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contain the minimal seed data needed to rebuild the entire design. It
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should never contain any files that were generated by the build
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process. <br>
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<br>
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<br>
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<p>
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</p>
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<p></p>
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<h2><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font
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 size="+1">Store files based on their source and not their use.</font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></h2>
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Are you creating a chip using IP from Joe's IP Emporium? Why not create
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a spot inside your chip database for Joes files? Because that is not
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planning ahead. Later if your lab starts another chip that also uses
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Joes IP then they will also need access to those files. Create a spot
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for files where everybody can simply access them by linking the desired
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files into there database<font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font
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 size="+1">.<br>
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<br>
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<br>
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</font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font>
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<p></p>
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<h2><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font
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 size="+1">Do not mix unlike objects in the same file.</font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></h2>
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"Unlike" is a deliberately nebulous term. It can mean anything and
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everything. If you have a instance of a hard macro that is
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unsynthesizable then do not put it in a file along with synthesisable
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rtl code. If you have code belonging to one designer then do not mix it
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with code belonging to another. If you do then you have to worry about
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file locking. Fragment the design so that each object is in it's own
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file and then use a tool to put them back together.<br>
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<br>
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<br>
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<h2></h2>
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<h2><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font
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 size="+1">Layer the design.</font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></h2>
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<font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font>
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<p>A full design will consist of several different databases that are
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layered. Upper ones may override any content from a lower layer.&nbsp;
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Requirements created by the Component Designers are only minimums, The
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Architects and Si-Makers are free to override and tighten any
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requirement from any lower level.&nbsp; Parameters should be used to
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give the downstream&nbsp; designers the ability to tune the design for
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the target process.<br>
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</p>
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<p><br>
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<br>
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</p>
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<br>
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<br>
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<br>
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<br>
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<br>
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<h2><a name="manifesto"></a>Database Guidelines</h2>
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<p></p>
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<p></p>
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<br>
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<p><img style="width: 800px; height: 600px;" alt=""
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 src="../png/data_fig1.png"><br>
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<br>
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</p>
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<p><br>
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<br>
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</p>
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<p><br>
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</p>
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<br>
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<p><br>
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</p>
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<h2>DOC<br>
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</h2>
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The documentation&nbsp; directory.
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<br>
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<br>
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<p><br>
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</p>
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<h2>TOOLS<br>
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</h2>
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<p>The tools directory contains all of the socgen tools needed to build
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, simulate and synthesize all of the systems and components in the
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database. Scripts and installation instructions are provided for any
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other opensource tools that may be required. There are also
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instructions for any proprietary tools that are used.<br>
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</p>
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<br>
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<br>
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<h2>LIB</h2>
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<p>A library is a collection of building blocks&nbsp; that may not be
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synthesizable in
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all target technologies and may require customizations. The use of lib
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parts in the rtl code will
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facilitate porting a component into different technologies.</p>
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<br>
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<h2>BENCH<br>
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</h2>
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<p>A testbench is used for all simulations and test suites. Any system
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or component may be simulated. Components can only do generic rtl sims
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while systems may do either generic rtl ,specific rtl or gate sims.
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Generic rtl models are included in the socgen library, specific ones
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must be obtained from the IC vendor.<br>
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</p>
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<p><br>
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</p>
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<br>
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<h2>TARGETS</h2>
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<p>A target is a specific physical design that can implement a
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component. Targets can be asic or fpga and include a Printed circuit
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board(PCB) that may include other electronic components. The goal for
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all components is to assign them to at least one target and prove that
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the work in silicon<br>
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</p>
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<p>
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</p>
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<p><br>
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</p>
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<h2>PROJECTS</h2>
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<p>A project is a collection of components. A database must define at
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least one project to create an area where components may be stored.
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Other projects may be created as needed to group similar components
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together and reducing clutter. <br>
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</p>
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<p><br>
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<br>
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</p>
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<p><br>
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<img style="width: 800px; height: 600px;" alt=""
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 src="../png/data_fig2.png"><br>
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</p>
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<p></p>
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<br>
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<br>
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<p><br>
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<br>
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</p>
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<p><br>
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<br>
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</p>
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<h2>WORK<br>
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</h2>
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<p>The work directory is a composite image of the projects directory
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plus any additional links needed for simulation and synthesis. All
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design processes are run in this directory and it contains all the
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generated files that are produced.<br>
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</p>
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<p><br>
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</p>
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<p><br>
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<br>
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</p>
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