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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
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<html>
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<head>
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  <meta http-equiv="CONTENT-TYPE" content="text/html; charset=UTF-8">
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  <title>Verification Guidelines</title>
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  <meta name="CHANGED" content="20100309;9312200">
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  <meta name="Info 3" content="">
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  <meta name="date" content="2008-01-08T12:01:41-0500">
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  <meta name="robots" content="index,follow">
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</head>
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<body dir="ltr" lang="en-US">
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<h1><a name="socgen_project"></a><big>SOCGEN Project</big></h1>
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<h2><br>
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</h2>
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<h2><a name="manifesto"></a>Verification Guidelines</h2>
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<p><br>
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<br>
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</p>
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<p>Verification is the process of stimulating&nbsp; a component&nbsp;
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module and checking that it produces the correct outputs. Stimulations
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are designed to
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ensure that all of the components functions are exercised and any
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deviation from the expected behaviour&nbsp; is reported as an error.
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Every
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component must have at least one test case but may have as many as
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needed to fully verify the design. All components will have at least
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one interface and a bus functional model (bfm) must be created for each
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and every interface.<br>
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</p>
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<p>A complete test suite is required for every component module.&nbsp;
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Each test_case is simulated and the log file will indicate whether the
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test passed or failed. Other output files such as dump files may also
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be produced duging the simulation.<br>
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</p>
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<p><br>
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</p>
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<p></p>
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<br>
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<p><img style="width: 800px; height: 600px;" alt=""
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 src="../png/ver_fig1.png"><br>
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</p>
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<p><br>
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</p>
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<p>A test suite is needed for every piece of IP in the design and
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creating this suite can be a very labor intensive operation. It usually
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takes four hours to create the test_cases for each hour that was spent
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creating the rtl code.&nbsp; A full test must be run on every leaf cell
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component and some of these are repeated as the components are used as
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children of other components.&nbsp; It is essential that all test_cases
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are written so that they may be reused when testing the component when
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it it part of a parent component.<br>
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</p>
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<p><br>
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</p>
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<p><br>
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</p>
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<p><br>
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</p>
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<p><br>
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</p>
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<p><br>
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</p>
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<p><img style="width: 800px; height: 600px;" alt=""
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 src="../png/ver_fig2.png"><br>
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</p>
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<p>In this case a new component is created by combining&nbsp; two leaf
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cell components and its test_case is created by combining blocks from
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those two components test_cases.<br>
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</p>
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<p><br>
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</p>
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<p><br>
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</p>
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<p><br>
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<br>
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</p>
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<p><br>
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</p>
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<p><img style="width: 800px; height: 600px;" alt=""
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 src="../png/ver_fig3.png"><br>
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</p>
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<p><br>
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</p>
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<p>Every interface on the component is connected to it's own bfm model
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that contains all the tasks needed to test the interface. The calling
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sequences needed to preform a particular test are all loaded from a
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sperate test_define file. It is important that each interface has its
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task calls in
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a seperate code block in the test_define file. The goal is to develop
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these models and task
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calls on&nbsp; the component simulation and then reuse them as the
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component is used in larger designs.&nbsp; Interleaving task calls for
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different models makes that difficult.<br>
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</p>
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<p><br>
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</p>
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<p><br>
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</p>
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<h2><a name="manifesto"></a>Protocol checkers and monitors<br>
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</h2>
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<br>
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&nbsp;
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Protocol checkers and monitors are similar to a bus functional
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models&nbsp; except that they are for obsevation only and cannot
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control any signals. They watch every transaction that occurs on the
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interface and reports a failure when anything violates that interfaces
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defined protocols. <span style="font-family: serif;"> They are created
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in a seperate module and may be instantiated in the testbench&nbsp; and
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connected to an interface.<br>
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<br>
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The same protocol checker can also be included in the rtl code so it
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can monitor an interface that is buried deep inside a chip. Once
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inserted in the rtl source it will watch for&nbsp; and report errors
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that may occur during the regression suite. Since protocol checkers
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are&nbsp; not synthesizable they must be excluded from synthesis with a
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`ifndef SYNTHESYS statement.<br>
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<br>
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Monitors are similar to protocol checkers except that they are designed
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to be implemetent in actual logic.&nbsp; If they ever fire during
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product usage then these events should be latched and saved for later
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debugging.<br>
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&nbsp; <br>
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</span>
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<p><br>
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<br>
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</p>
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<p><br>
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</p>
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<h2><a name="manifesto"></a>guidelines for creating reusable test_cases<br>
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</h2>
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<br>
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&nbsp; All test_cases will have a master clock and reset signal.&nbsp;
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The DUT and all models will respond to the reset signal. Anything in
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test_define will only change state on the rising edge of clock.<br
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 style="font-family: serif;">
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<br style="font-family: serif;">
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<span style="font-family: serif;">&nbsp; All test_cases will be
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self-checking.&nbsp; Test suites are usually run by scripts and robots
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that need a simple method to determine wether a test_case finished and
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passed. </span><br style="font-family: serif;">
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<br style="font-family: serif;">
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<span style="font-family: serif;">&nbsp; All models, tasks and protocal
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checkers will use a common method to report&nbsp; if there is a failure.</span><br
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 style="font-family: serif;">
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<br style="font-family: serif;">
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<span style="font-family: serif;">&nbsp; All test sequences will use a
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common method to signal the successful completion of the test</span><br
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 style="font-family: serif;">
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<br style="font-family: serif;">
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<span style="font-family: serif;">&nbsp; All messages in the log file
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must use the following format:</span><br>
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<br style="font-family: serif;">
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<ul style="font-family: monospace;">
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  <li><big>Time stamp&nbsp; &nbsp;&nbsp;&nbsp;&nbsp;&nbsp; This is the
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$realtime&nbsp; formated by %t</big></li>
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  <li><big>Instance Name&nbsp;&nbsp;&nbsp;&nbsp; This is obtained with
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%m</big></li>
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  <li><big>Message Type&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; This is either
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ERROR&nbsp; or WARNING. No type indicates informational message</big></li>
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  <li><big>Message&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
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    </big><br>
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  </li>
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</ul>
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<br style="font-family: serif;">
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<br style="font-family: serif;">
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<p style="font-family: serif;">&nbsp;&nbsp; All test cases MUST have a
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finite run time.&nbsp; Use a TIMEOUT counter to stop the sim if it
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exceeds the expected number of clocks<br style="font-family: serif;">
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</p>
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<span style="font-family: serif;">&nbsp;&nbsp;
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<code><span style="font-family: serif;">All test_cases must be
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deterministic. If any pseudorandom delays are used they must be
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"seeded" and repeatable from run to run.</span></code></span><code
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 style="font-family: serif;"><br>
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<br>
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<br>
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&nbsp;<span style="font-family: serif;"> </span></code><span
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 style="font-family: serif;"><code><span style="font-family: serif;">Do
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not interweave threads in the test_define blocks. Each fork/join block
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should
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only access a single BFM.</span><br style="font-family: serif;">
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<br style="font-family: serif;">
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<br style="font-family: serif;">
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<span style="font-family: serif;">&nbsp; Plan on designs where you will
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need to test multiple instances of a component</span><br
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 style="font-family: serif;">
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<br style="font-family: serif;">
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<span style="font-family: serif;">&nbsp; Only test a single
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configuration or mode in any test_case. If you need to test 3 different
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modes then create 3 different test_cases. The exception to this is when
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there is a mission mode requirement to switch modes and you are testing
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that switch.&nbsp; </span><br style="font-family: serif;">
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</code></span>
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<p style="font-family: serif;"><br>
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</p>
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<p><br>
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</p>
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<p><br>
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</p>
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<h2><a name="manifesto"></a>Gate and Post Route Simulations<br>
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</h2>
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<br>
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&nbsp; All signals between the DUT and the bfms change only at the
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rising edge of clk. This is fine for RTL sims but will not work for
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real logic with setup and hold time requirements. For these the signals
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driving the dut must be delayed from clk and from each other to provide
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the required setup and hold times. Signals from the DUT will have
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delays and must only be tested during a prescribed time window.<br>
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This is accomplished with a set of modules that mimic the functions of
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a IC tester. These modules provide the interface between the BFM's and
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the DUT.<br>
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<br>
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<br>
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<img style="width: 800px; height: 600px;" alt=""
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 src="../png/ver_fig4.png"><br>
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<br style="font-family: serif;">
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<br style="font-family: serif;">
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&nbsp;<span style="font-family: serif;"></span><span
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 style="font-family: serif;"><br>
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</span>
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<p></p>
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<p><br>
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</p>
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<p><br>
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</p>
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<p><br>
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</p>
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<p><br>
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</p>
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<p><br>
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</p>
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<p><br>
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<br>
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</p>
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<p><br>
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</p>
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<h2><a name="manifesto"></a>simulation directory (sim)<br>
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</h2>
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<p><br>
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</p>
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<big><code>
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./sim<br>
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&nbsp; +/bin<br>
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&nbsp;&nbsp; &nbsp;&nbsp; Makefile<br>
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&nbsp; +/lib<br>
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&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; +lib_part1<br>
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&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; lib_part(s).v<br>
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&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; +lib_part2<br>
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&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; .<br>
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&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; .<br>
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&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; .<br>
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</code><code>&nbsp; +/run</code><br>
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<code>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; +/test_case1<br>
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&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; dmp_define<br>
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&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; test_define<br>
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&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; +/test_case2<br>
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&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; .<br>
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&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; .<br>
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&nbsp; +/xml<br>
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&nbsp;</code><code>&nbsp;&nbsp;&nbsp;&nbsp; test_case1.xml<br>
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&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; test_case2.xml<br>
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&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; .<br>
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&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; .<br>
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&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; .</code><br>
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</big>
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<code><ouabache design="" works=""><br>
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</ouabache></code>
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<p>Each component will have a ./sim directory for the test suite.
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Typing:<br>
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</p>
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<p><big><big><br>
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<small><span style="font-family: monospace;">
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&lt;&gt;:~$&gt;cd ./sim/bin</span><br style="font-family: monospace;">
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</small><span style="font-family: monospace;"><small>
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&lt;&gt;:~$&gt;make run_sims</small><br>
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</span></big></big></p>
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<p><big><big><span style="font-family: monospace;"><br>
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</span></big></big>
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</p>
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will run the entire test suite. After that has been done then
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individual test_cases may be rerun by changing into their test_case
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directory and typing:<br>
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<code><ouabache design="" works=""><br>
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<br>
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</ouabache></code>
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<p><big><big><span style="font-family: monospace;"><small>&lt;&gt;:~$&gt;make
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sim</small></span></big></big>
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</p>
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<p><br>
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</p>
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<p>Each test_case will produce a log file that may be parsed for the
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string "PASSED" to indicate that the sim finished. If so then the log
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file should be parsed for the strings "ERROR" and "WARNING" to see if
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there were and errors or warnings. <br>
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</p>
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<p>Simulating a test_case requires involking a verilog simulator and
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passing it command line arguments and a TestBench file. Icarus verilog
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is the default simulator for the socgen project. Socgen uses a minumal
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command line and instead puts most needed information in the TestBench
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file.&nbsp; The only command line option is to set the VCD flag if a
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value change dump file is needed.<br>
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</p>
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<p><br>
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</p>
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<p><br>
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<br>
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<br>
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<br>
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<br>
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</p>
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<h2><a name="manifesto"></a>TestBench file<br>
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</h2>
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<code>
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<ouabache design="" works="">--------------------------------------------------------------------------------------------------------------------------------------<br>
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<br>
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`include&nbsp; "./TB.defs"<br>
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<br>
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`ifndef&nbsp;&nbsp;&nbsp;&nbsp; TIMESCALE<br>
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`define&nbsp;&nbsp;&nbsp;&nbsp; TIMESCALE&nbsp;&nbsp; 1ns/1ns<br>
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`endif<br>
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<br>
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<br>
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`ifndef&nbsp;&nbsp;&nbsp;&nbsp; TIMEFORMAT<br>
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`define&nbsp;&nbsp;&nbsp;&nbsp; TIMEFORMAT&nbsp; $timeformat(-6, 2, "
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us", 14);<br>
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`endif<br>
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<br>
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<br>
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`ifndef&nbsp;&nbsp;&nbsp;&nbsp; PERIOD<br>
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`define&nbsp;&nbsp;&nbsp;&nbsp; PERIOD&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
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40.00000 <br>
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`endif<br>
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<br>
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`ifndef&nbsp;&nbsp;&nbsp;&nbsp; TIMEOUT<br>
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`define&nbsp;&nbsp;&nbsp;&nbsp; TIMEOUT&nbsp;&nbsp;&nbsp;&nbsp; 200000<br>
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`endif<br>
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<br>
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<br>
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`timescale `TIMESCALE<br>
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<br>
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<br>
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`include&nbsp; "./filelist"<br>
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`include&nbsp; "./liblist"<br>
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`include&nbsp; "./modellist"<br>
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<br>
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<br>
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<br>
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<br>
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module TB();<br>
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<br>
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wire clk;<br>
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wire reset;<br>
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<br>
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`include "./dut"<br>
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`include "./test_define"<br>
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<br>
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<br>
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`ifdef VCD<br>
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initial<br>
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begin<br>
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`include "./dmp_define"<br>
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end<br>
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`endif<br>
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<br>
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clock_gen<br>
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#(.PERIOD(`PERIOD),<br>
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&nbsp; .TIMEOUT(`TIMEOUT))<br>
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cg <br>
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( .clk&nbsp;&nbsp; ( clk&nbsp;&nbsp; ),<br>
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&nbsp;
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.reset ( reset )<br>
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);<br>
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<br>
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<br>
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<br>
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<br>
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endmodule<br>
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</ouabache></code><span style="font-family: monospace;"><br>
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--------------------------------------------------------------------------------------------------------------------------------------<br>
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</span>
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<p><span style="font-family: monospace;"><br>
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</span></p>
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<p><br>
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<span style="font-family: monospace;"></span></p>
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<p>A single&nbsp; TestBench file provides the infrastructure for all
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test cases. The actual testing is determined by the data contained in
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six files in the ./sim/run/test_case directory. The TestBench file
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creates a top level module named TB and instantiates a clock_reset
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generator module to provide each test_case with a clock and a reset
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signal. It also provides a vcd dump&nbsp; and timeout&nbsp; functions
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for each test_case.<span style="font-family: monospace;"><br>
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</span></p>
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<p><span style="font-family: monospace;"><br>
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</span></p>
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<p><span style="font-family: monospace;"><br>
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</span></p>
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<h2><a name="manifesto"></a>TB.defs <br>
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</h2>
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<p><span style="font-family: monospace;">--------------------------------------------------------------------------------------------------------------------------------------</span>
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</p>
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<code>
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`define&nbsp;&nbsp;&nbsp;&nbsp; TIMESCALE&nbsp;&nbsp; 1ns/1ns<br>
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`define&nbsp;&nbsp;&nbsp;&nbsp; TIMEFORMAT&nbsp; $timeformat(-6, 2, "
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us", 14);<br>
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`define&nbsp;&nbsp;&nbsp;&nbsp; PERIOD&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
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40.0000 <br>
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`define&nbsp;&nbsp;&nbsp;&nbsp; TIMEOUT&nbsp;&nbsp;&nbsp;&nbsp; 200000<br>
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</code>
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<p></p>
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<p><span style="font-family: monospace;">--------------------------------------------------------------------------------------------------------------------------------------<br>
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</span></p>
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<p><span style="font-family: monospace;"><br>
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</span></p>
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<p>The TB.defs file may be used to set up the timescale and master
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clock period for the simulation.&nbsp; Any model or lib part that needs
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to reset the timescale back to the system default must use:<br>
426 
</p>
427 
<p><code>`timescale `TIMESCALE<br>
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</code></p>
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<p><code><br>
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<span style="font-family: serif;">Do NOT use</span><br>
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</code></p>
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<p><code>`include "./timescale.v"<br>
433 
</code></p>
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<p><code><br>
435 
<span style="font-family: serif;">The socgen project does not contain
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any timescale.v file.&nbsp; All socgen rtl code is preprocessed before
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it is passed to simulation and the value of the timescale may change
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depending on the simulation. All ip components must only contain
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synthesisable code and should not have any need for timescale.<br>
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</span></code></p>
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<p><code><span style="font-family: serif;">TIMEFORMAT will set the
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format that is used when time is displayed using the %t format . All
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$display statements must start by displaying $realtime using the %t
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format so every line in the log has a time stamp. Any display statement
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from an instantiated module must also have %m to print out it's
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instance name. If the message is an error or a warning then the strings
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ERROR or WARNING must be used so that this information may be parsed
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from the log file.<br>
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<br style="font-family: serif;">
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</span></code></p>
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<p><span style="font-family: monospace;"><br>
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</span>The TB.defs file may also
453 
be used to pass the size and location&nbsp; of an embedded&nbsp; bit
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file to the device_under_test<span style="font-family: monospace;"> <br>
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</span></p>
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<p><span style="font-family: monospace;">--------------------------------------------------------------------------------------------------------------------------------------</span></p>
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<p><span style="font-family: monospace;">`define&nbsp; ROM_WORDS 2048 <br>
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`define&nbsp; ROM_ADDR&nbsp;&nbsp; 11&nbsp; <br>
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`define&nbsp; ROM_WIDTH&nbsp; 12&nbsp; <br>
460 
`define&nbsp; ROM_FILE "../../../../../sw/mouse/mouse.abs12"<br>
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</span><span style="font-family: monospace;">--------------------------------------------------------------------------------------------------------------------------------------</span><br>
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</p>
463 
<p>The path is the relative path from the test_case run directory.<span
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 style="font-family: monospace;"><br>
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</span></p>
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<p><span style="font-family: monospace;"><br>
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</span></p>
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<h2><a name="manifesto"></a>filelist </h2>
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<p style="font-family: monospace;">--------------------------------------------------------------------------------------------------------------------------------------<br>
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</p>
471 
<p style="font-family: monospace;">`include
472 
"../../../rtl/gen/sim/soc_mouse.v"<br>
473 
`include "../../../../pic16c5x/rtl/gen/sim/pic16c5x.v"<br>
474 
`include
475 
"../../../../../children/logic/ip/io_module/rtl/gen/sim/io_module_mouse.v"<br>
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`include
477 
"../../../../../children/logic/ip/ps2_interface/rtl/gen/sim/ps2_interface.v"<br>
478 
`include "../../../../../children/logic/ip/uart/rtl/gen/sim/uart.v"<br>
479 
</p>
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<code style="font-family: monospace;"></code>
481 94 jt_eaton 
<span style="font-family: monospace;">-------------------------------------------------------------------------------------------------------------------------------------</span>
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<p></p>
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<p><br>
484 
</p>
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<h2><a name="manifesto"></a>liblist</h2>
486 
<p><span style="font-family: monospace;">--------------------------------------------------------------------------------------------------------------------------------------</span>
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</p>
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<code>
489 
<br>
490 
`include "../../lib/cde_sram/cde_sram.v"<br>
491 
`include "../../lib/cde_lifo/cde_lifo.v"<br>
492 
`include "../../lib/cde_synchronizers/cde_sync_with_hysteresis.v"<br>
493 
<br>
494 
</code>
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<span style="font-family: monospace;">--------------------------------------------------------------------------------------------------------------------------------------</span><br>
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<p>The liblist uses `include statements to load all the generic lib
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models&nbsp; into
498 
the simulation.The paths are&nbsp; relative from the test_case run
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directory. Note that these libs may be replaced&nbsp; by vendor
500 
specific instances when the design is&nbsp; synthesised into gates.<br>
501 
</p>
502 
<p><br>
503 
</p>
504 
<p></p>
505 
<p><br>
506 
</p>
507 
<h2><a name="manifesto"></a>modellist</h2>
508 
<p><span style="font-family: monospace;">--------------------------------------------------------------------------------------------------------------------------------------</span>
509 
</p>
510 
<code><br>
511 
`include "../../bench/verilog/models/clock_gen.v"<br>
512 28 jt_eaton 
`include "../../bench/verilog/models/ps2_model.v"<br>
513 
</code><code>`include "../../bench/verilog/models/uart_model.v"</code><code>&nbsp;&nbsp;
514 
<br>
515 27 jt_eaton 
`include "../../bench/verilog/models/iobuftri.v"&nbsp;&nbsp;&nbsp; <br>
516 
</code><span style="font-family: monospace;"></span><code><br>
517 
</code>
518 
<span style="font-family: monospace;">--------------------------------------------------------------------------------------------------------------------------------------</span><br>
519 
<br>
520 
This list loads all of the simulation models used in the simulation.<br>
521 
<br>
522 
<p><br>
523 
<br>
524 
</p>
525 
<h2><a name="manifesto"></a>dut<br>
526 
</h2>
527 28 jt_eaton 
<p><span style="font-family: monospace;">--------------------------------------------------------------------------------------------------------------------------------------</span><code><br>
528 
wire&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; &nbsp; &nbsp; ps2_data_pad_oe;<br>
529 
wire&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; &nbsp;&nbsp; &nbsp; ps2_data_pad_in;<br>
530 
wire&nbsp;&nbsp;&nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; ps2_data;<br>
531 
wire&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; &nbsp;&nbsp; &nbsp; ps2_clk_pad_oe;<br>
532 
wire&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; &nbsp; &nbsp; ps2_clk_pad_in;<br>
533 
wire&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; &nbsp;&nbsp; &nbsp; ps2_clk;<br>
534 27 jt_eaton 
<br>
535 
wire [7:0]&nbsp;&nbsp;&nbsp;&nbsp; portaout;<br>
536 
wire [7:0]&nbsp;&nbsp;&nbsp;&nbsp; portbout;<br>
537 
wire [7:0]&nbsp;&nbsp;&nbsp;&nbsp; portcout;<br>
538 
<br>
539 
<br>
540 
wire [9:0]&nbsp;&nbsp;&nbsp;&nbsp; y_pos;<br>
541 
wire [9:0]&nbsp;&nbsp;&nbsp;&nbsp; x_pos;<br>
542 
wire&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
543 
new_packet;<br>
544 
wire&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
545 
ms_mid; <br>
546 
wire&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
547 
ms_right;&nbsp; <br>
548 
wire&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
549 
ms_left;&nbsp; <br>
550 
<br>
551 
<br>
552 
<br>
553 
wire&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
554 28 jt_eaton 
serial_txd;<br>
555 27 jt_eaton 
wire&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
556 28 jt_eaton 
serial_rxd;<br>
557 
wire&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; loop;<br>
558 
&nbsp; <br>
559 27 jt_eaton 
<br>
560 
soc_mouse<br>
561 
#(<br>
562 
.ROM_WORDS ( `ROM_WORDS ), <br>
563 
.ROM_ADDR&nbsp; ( `ROM_ADDR&nbsp; ),&nbsp; <br>
564 
.ROM_WIDTH ( `ROM_WIDTH ), <br>
565 
.ROM_FILE&nbsp; ( `ROM_FILE&nbsp; )<br>
566 
)<br>
567 
dut(<br>
568 28 jt_eaton 
&nbsp;&nbsp; .clk&nbsp;&nbsp;&nbsp; &nbsp; &nbsp; &nbsp;&nbsp; &nbsp; (
569 
clk&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; &nbsp;&nbsp; &nbsp; ),<br>
570 
&nbsp;&nbsp; .reset &nbsp;&nbsp; &nbsp; &nbsp; &nbsp;&nbsp; (
571 
reset&nbsp;&nbsp;&nbsp; &nbsp; &nbsp;&nbsp; &nbsp; ),<br>
572 27 jt_eaton 
<br>
573 
&nbsp;&nbsp; .ps2_data_pad_in ( ps2_data_pad_in ),<br>
574 
&nbsp;&nbsp; .ps2_clk_pad_in&nbsp; ( ps2_clk_pad_in&nbsp; ),<br>
575 
<br>
576 
&nbsp;&nbsp; .ps2_data_pad_oe ( ps2_data_pad_oe ),<br>
577 
&nbsp;&nbsp; .ps2_clk_pad_oe&nbsp; ( ps2_clk_pad_oe&nbsp; ),<br>
578 
<br>
579 28 jt_eaton 
&nbsp;&nbsp; .portaout&nbsp;&nbsp; &nbsp; &nbsp;&nbsp; (
580 
portaout&nbsp;&nbsp; &nbsp;&nbsp; &nbsp; ),<br>
581 
&nbsp;&nbsp; .portbout&nbsp; &nbsp; &nbsp; &nbsp; ( portbout&nbsp;
582 
&nbsp; &nbsp; &nbsp; ),<br>
583 
&nbsp;&nbsp; .portcout&nbsp; &nbsp; &nbsp; &nbsp; (
584 
portcout&nbsp;&nbsp; &nbsp;&nbsp; &nbsp; ),<br>
585 27 jt_eaton 
<br>
586 28 jt_eaton 
&nbsp;&nbsp; .y_pos&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; &nbsp;&nbsp; &nbsp; (
587 
y_pos&nbsp;&nbsp;&nbsp; &nbsp; &nbsp; &nbsp;&nbsp; ),<br>
588 
&nbsp;&nbsp; .x_pos&nbsp;&nbsp;&nbsp;&nbsp; &nbsp; &nbsp; &nbsp; (
589 
x_pos&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; &nbsp; &nbsp;&nbsp; ),<br>
590 
&nbsp;&nbsp; .new_packet &nbsp; &nbsp;&nbsp; ( new_packet &nbsp;
591 
&nbsp;&nbsp; ),<br>
592 
&nbsp;&nbsp; .ms_mid&nbsp;&nbsp;&nbsp;&nbsp; &nbsp;&nbsp; &nbsp; (
593 
ms_mid&nbsp;&nbsp;&nbsp;&nbsp; &nbsp; &nbsp;&nbsp; ), <br>
594 
&nbsp;&nbsp; .ms_right&nbsp; &nbsp; &nbsp; &nbsp; (
595 
ms_right&nbsp;&nbsp; &nbsp; &nbsp;&nbsp;
596 27 jt_eaton 
),&nbsp; <br>
597 28 jt_eaton 
&nbsp;&nbsp; .ms_left&nbsp;&nbsp; &nbsp; &nbsp; &nbsp; (
598 
ms_left&nbsp;&nbsp;&nbsp; &nbsp; &nbsp;&nbsp; ),&nbsp; <br>
599 27 jt_eaton 
<br>
600 28 jt_eaton 
&nbsp;&nbsp; .txd_pad_out&nbsp;&nbsp;&nbsp;&nbsp; (
601 
serial_txd&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; ),<br>
602 
&nbsp;&nbsp; .rxd_pad_in&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; (
603 
serial_rxd&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; ),<br>
604 
&nbsp;&nbsp; .cts_pad_in&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; (
605 
loop&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
606 
),<br>
607 
&nbsp;&nbsp; .rts_pad_out&nbsp;&nbsp;&nbsp;&nbsp; (
608 
loop&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
609 27 jt_eaton 
)&nbsp; <br>
610 
<br>
611 
&nbsp;&nbsp; );<br>
612 28 jt_eaton 
</code></p>
613 
<p><code>uart_model <br>
614 
#(.CLKCNT(4'hc))<br>
615 
uart_model<br>
616 
(<br>
617 
&nbsp;&nbsp;
618 
.clk&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
619 
(
620 
clk&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
621 
),<br>
622 
&nbsp;&nbsp;
623 
.reset&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
624 
(
625 
reset&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
626 
),
627 27 jt_eaton 
<br>
628 28 jt_eaton 
&nbsp;&nbsp;
629 
.txd_in &nbsp;&nbsp; &nbsp;
630 
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
631 
( serial_txd&nbsp; ),<br>
632 
&nbsp;&nbsp;
633 
.rxd_out &nbsp;&nbsp;
634 
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
635 
( serial_rxd&nbsp; )<br>
636 27 jt_eaton 
<br>
637 28 jt_eaton 
);</code><br>
638 
<code></code></p>
639 
<p><code><br>
640 
</code></p>
641 
<p><code><br>
642 27 jt_eaton 
iobuftri<br>
643 
data_tri_buf<br>
644 
&nbsp; (<br>
645 
&nbsp;&nbsp; .i&nbsp;&nbsp; (
646 
1'b0&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; ),<br>
647 
&nbsp;&nbsp; .oe&nbsp; ( ps2_data_pad_oe ),<br>
648 
&nbsp;&nbsp; .o&nbsp;&nbsp; ( ps2_data_pad_in ),<br>
649 
&nbsp;&nbsp; .pad ( ps2_data&nbsp;&nbsp;&nbsp; )<br>
650 
&nbsp;&nbsp; );<br>
651 
<br>
652 
<br>
653 
iobuftri<br>
654 
clk_tri_buf<br>
655 
&nbsp; (<br>
656 
&nbsp;&nbsp; .i&nbsp;&nbsp; ( 1'b0&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
657 
),<br>
658 
&nbsp;&nbsp; .oe&nbsp; ( ps2_clk_pad_oe ),<br>
659 
&nbsp;&nbsp; .o&nbsp;&nbsp; ( ps2_clk_pad_in ),<br>
660 
&nbsp;&nbsp; .pad ( ps2_clk&nbsp;&nbsp;&nbsp; )<br>
661 
&nbsp;&nbsp; );<br>
662 
<br>
663 
<br>
664 
<br>
665 
pullup ua0(ps2_clk);<br>
666 
pullup ua1(ps2_data);<br>
667 
<br>
668 
<br>
669 
ps2_model <br>
670 
#(.CLKCNT(10'h177))<br>
671 28 jt_eaton 
ps2_model<br>
672 27 jt_eaton 
(<br>
673 
&nbsp;&nbsp;
674 
.clk&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
675 
(
676 
clk&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
677 
),<br>
678 
&nbsp;&nbsp;
679 
.reset&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
680 
(
681 
reset&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
682 
),
683 
<br>
684 
&nbsp;&nbsp;
685 
.ps2_clk&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
686 
(
687 
ps2_clk&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
688 
),<br>
689 
&nbsp;&nbsp;
690 
.ps2_data&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
691 
(
692 
ps2_data&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
693 
)<br>
694 
<br>
695 28 jt_eaton 
);</code></p>
696 
<p><code><br>
697 
</code></p>
698 
<p><code><br>
699 27 jt_eaton 
</code><span style="font-family: monospace;">--------------------------------------------------------------------------------------------------------------------------------------</span><br>
700 
</p>
701 
<p>This file is a verilog code segment that declares all the wires and
702 
regs needed in the sim (except for clk and reset). It then&nbsp;
703 
instantiates the component and all needed models for the simulation.<br>
704 
</p>
705 
<p><br>
706 
</p>
707 
<p><br>
708 
</p>
709 
<p><br>
710 
</p>
711 
<h2><a name="manifesto"></a>test_define<br>
712 
</h2>
713 
<p><span style="font-family: monospace;">--------------------------------------------------------------------------------------------------------------------------------------</span></p>
714 
<p><br>
715 
</p>
716 
<p><span style="font-family: monospace;">initial</span><br
717 
 style="font-family: monospace;">
718 28 jt_eaton 
<span style="font-family: monospace;">begin</span><span
719 
 style="font-family: monospace;"></span><br
720 27 jt_eaton 
 style="font-family: monospace;">
721 
<span style="font-family: monospace;">$display("&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
722 
");</span><br style="font-family: monospace;">
723 
<span style="font-family: monospace;">$display("&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
724 
===================================================");</span><br
725 
 style="font-family: monospace;">
726 
<span style="font-family: monospace;">$display("&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
727 
Test
728 
Start");</span><br style="font-family: monospace;">
729 
<span style="font-family: monospace;">$display("&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
730 
===================================================");</span><br
731 
 style="font-family: monospace;">
732 
<span style="font-family: monospace;">$display("&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
733 
");</span><br style="font-family: monospace;">
734 
<br style="font-family: monospace;">
735 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
736 
=&nbsp;
737 
1'b0;</span><br style="font-family: monospace;">
738 
<span style="font-family: monospace;">device_tx_data&nbsp;&nbsp;
739 
=&nbsp; 8'h00;</span><br style="font-family: monospace;">
740 
<span style="font-family: monospace;">device_ack&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
741 
=&nbsp;
742 
1'b1;</span><br style="font-family: monospace;">
743 
<span style="font-family: monospace;">device_parity&nbsp;&nbsp;&nbsp;
744 
=&nbsp; 1'b1;</span><br style="font-family: monospace;">
745 
<span style="font-family: monospace;">device_stop&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
746 
=&nbsp;
747 
1'b1;</span><br style="font-family: monospace;">
748 
<br style="font-family: monospace;">
749 
<br style="font-family: monospace;">
750 
<br style="font-family: monospace;">
751 
<span style="font-family: monospace;">cg.next(20);</span><br
752 
 style="font-family: monospace;">
753 
<span style="font-family: monospace;">cg.reset_off;</span><br
754 
 style="font-family: monospace;">
755 
<br style="font-family: monospace;">
756 
<span style="font-family: monospace;">while (device_rx_read == 1'b0 )
757 
cg.next(1);</span><br style="font-family: monospace;">
758 
<span style="font-family: monospace;">cg.next(2000);</span><br
759 
 style="font-family: monospace;">
760 
<br style="font-family: monospace;">
761 
<span style="font-family: monospace;">device_parity&nbsp;&nbsp;&nbsp;
762 
=&nbsp; 1'b0;</span><br style="font-family: monospace;">
763 
<span style="font-family: monospace;">device_tx_data&nbsp;&nbsp;
764 
=&nbsp; 8'hfa;</span><br style="font-family: monospace;">
765 
<span style="font-family: monospace;">cg.next(1);</span><br
766 
 style="font-family: monospace;">
767 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
768 
=&nbsp;
769 
1'b1;</span><br style="font-family: monospace;">
770 
<span style="font-family: monospace;">cg.next(1);</span><br
771 
 style="font-family: monospace;">
772 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
773 
=&nbsp;
774 
1'b0;</span><br style="font-family: monospace;">
775 
<br style="font-family: monospace;">
776 
<br style="font-family: monospace;">
777 
<br style="font-family: monospace;">
778 
<br style="font-family: monospace;">
779 
<span style="font-family: monospace;">cg.next(20000);</span><br
780 
 style="font-family: monospace;">
781 
<br style="font-family: monospace;">
782 
<span style="font-family: monospace;">device_parity&nbsp;&nbsp;&nbsp;
783 
=&nbsp; 1'b0;</span><br style="font-family: monospace;">
784 
<span style="font-family: monospace;">device_tx_data&nbsp;&nbsp;
785 
=&nbsp; 8'haa;</span><br style="font-family: monospace;">
786 
<span style="font-family: monospace;">cg.next(1);</span><br
787 
 style="font-family: monospace;">
788 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
789 
=&nbsp;
790 
1'b1;</span><br style="font-family: monospace;">
791 
<span style="font-family: monospace;">cg.next(1);</span><br
792 
 style="font-family: monospace;">
793 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
794 
=&nbsp;
795 
1'b0;</span><br style="font-family: monospace;">
796 
<br style="font-family: monospace;">
797 
<br style="font-family: monospace;">
798 
<br style="font-family: monospace;">
799 
<br style="font-family: monospace;">
800 
<br style="font-family: monospace;">
801 
<br style="font-family: monospace;">
802 
<span style="font-family: monospace;">cg.next(20000);</span><br
803 
 style="font-family: monospace;">
804 
<br style="font-family: monospace;">
805 
<span style="font-family: monospace;">device_parity&nbsp;&nbsp;&nbsp;
806 
=&nbsp; 1'b0;</span><br style="font-family: monospace;">
807 
<span style="font-family: monospace;">device_tx_data&nbsp;&nbsp;
808 
=&nbsp; 8'h00;</span><br style="font-family: monospace;">
809 
<span style="font-family: monospace;">cg.next(1);</span><br
810 
 style="font-family: monospace;">
811 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
812 
=&nbsp;
813 
1'b1;</span><br style="font-family: monospace;">
814 
<span style="font-family: monospace;">cg.next(1);</span><br
815 
 style="font-family: monospace;">
816 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
817 
=&nbsp;
818 
1'b0;</span><br style="font-family: monospace;">
819 
<br style="font-family: monospace;">
820 
<br style="font-family: monospace;">
821 
<br style="font-family: monospace;">
822 
<br style="font-family: monospace;">
823 
<span style="font-family: monospace;">while (device_rx_read == 1'b0 )
824 
cg.next(1);</span><br style="font-family: monospace;">
825 
<span style="font-family: monospace;">cg.next(2000);</span><br
826 
 style="font-family: monospace;">
827 
<br style="font-family: monospace;">
828 
<span style="font-family: monospace;">device_parity&nbsp;&nbsp;&nbsp;
829 
=&nbsp; 1'b0;</span><br style="font-family: monospace;">
830 
<span style="font-family: monospace;">device_tx_data&nbsp;&nbsp;
831 
=&nbsp; 8'hfa;</span><br style="font-family: monospace;">
832 
<span style="font-family: monospace;">cg.next(1);</span><br
833 
 style="font-family: monospace;">
834 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
835 
=&nbsp;
836 
1'b1;</span><br style="font-family: monospace;">
837 
<span style="font-family: monospace;">cg.next(1);</span><br
838 
 style="font-family: monospace;">
839 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
840 
=&nbsp;
841 
1'b0;</span><br style="font-family: monospace;">
842 
<br style="font-family: monospace;">
843 
<br style="font-family: monospace;">
844 
<br style="font-family: monospace;">
845 
<br style="font-family: monospace;">
846 
<span style="font-family: monospace;">while (device_rx_read == 1'b0 )
847 
cg.next(1);</span><br style="font-family: monospace;">
848 
<span style="font-family: monospace;">cg.next(2000);</span><br
849 
 style="font-family: monospace;">
850 
<br style="font-family: monospace;">
851 
<span style="font-family: monospace;">device_parity&nbsp;&nbsp;&nbsp;
852 
=&nbsp; 1'b0;</span><br style="font-family: monospace;">
853 
<span style="font-family: monospace;">device_tx_data&nbsp;&nbsp;
854 
=&nbsp; 8'hfa;</span><br style="font-family: monospace;">
855 
<span style="font-family: monospace;">cg.next(1);</span><br
856 
 style="font-family: monospace;">
857 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
858 
=&nbsp;
859 
1'b1;</span><br style="font-family: monospace;">
860 
<span style="font-family: monospace;">cg.next(1);</span><br
861 
 style="font-family: monospace;">
862 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
863 
=&nbsp;
864 
1'b0;</span><br style="font-family: monospace;">
865 
<br style="font-family: monospace;">
866 
<br style="font-family: monospace;">
867 
<br style="font-family: monospace;">
868 
<br style="font-family: monospace;">
869 
<span style="font-family: monospace;">while (device_rx_read == 1'b0 )
870 
cg.next(1);</span><br style="font-family: monospace;">
871 
<span style="font-family: monospace;">cg.next(2000);</span><br
872 
 style="font-family: monospace;">
873 
<br style="font-family: monospace;">
874 
<span style="font-family: monospace;">device_parity&nbsp;&nbsp;&nbsp;
875 
=&nbsp; 1'b0;</span><br style="font-family: monospace;">
876 
<span style="font-family: monospace;">device_tx_data&nbsp;&nbsp;
877 
=&nbsp; 8'hfa;</span><br style="font-family: monospace;">
878 
<span style="font-family: monospace;">cg.next(1);</span><br
879 
 style="font-family: monospace;">
880 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
881 
=&nbsp;
882 
1'b1;</span><br style="font-family: monospace;">
883 
<span style="font-family: monospace;">cg.next(1);</span><br
884 
 style="font-family: monospace;">
885 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
886 
=&nbsp;
887 
1'b0;</span><br style="font-family: monospace;">
888 
<br style="font-family: monospace;">
889 
<br style="font-family: monospace;">
890 
<br style="font-family: monospace;">
891 
<br style="font-family: monospace;">
892 
<span style="font-family: monospace;">while (device_rx_read == 1'b0 )
893 
cg.next(1);</span><br style="font-family: monospace;">
894 
<span style="font-family: monospace;">cg.next(2000);</span><br
895 
 style="font-family: monospace;">
896 
<br style="font-family: monospace;">
897 
<span style="font-family: monospace;">device_parity&nbsp;&nbsp;&nbsp;
898 
=&nbsp; 1'b0;</span><br style="font-family: monospace;">
899 
<span style="font-family: monospace;">device_tx_data&nbsp;&nbsp;
900 
=&nbsp; 8'hfa;</span><br style="font-family: monospace;">
901 
<span style="font-family: monospace;">cg.next(1);</span><br
902 
 style="font-family: monospace;">
903 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
904 
=&nbsp;
905 
1'b1;</span><br style="font-family: monospace;">
906 
<span style="font-family: monospace;">cg.next(1);</span><br
907 
 style="font-family: monospace;">
908 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
909 
=&nbsp;
910 
1'b0;</span><br style="font-family: monospace;">
911 
<br style="font-family: monospace;">
912 
<br style="font-family: monospace;">
913 
<br style="font-family: monospace;">
914 
<span style="font-family: monospace;">while (device_rx_read == 1'b0 )
915 
cg.next(1);</span><br style="font-family: monospace;">
916 
<span style="font-family: monospace;">cg.next(2000);</span><br
917 
 style="font-family: monospace;">
918 
<br style="font-family: monospace;">
919 
<span style="font-family: monospace;">device_parity&nbsp;&nbsp;&nbsp;
920 
=&nbsp; 1'b0;</span><br style="font-family: monospace;">
921 
<span style="font-family: monospace;">device_tx_data&nbsp;&nbsp;
922 
=&nbsp; 8'hfa;</span><br style="font-family: monospace;">
923 
<span style="font-family: monospace;">cg.next(1);</span><br
924 
 style="font-family: monospace;">
925 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
926 
=&nbsp;
927 
1'b1;</span><br style="font-family: monospace;">
928 
<span style="font-family: monospace;">cg.next(1);</span><br
929 
 style="font-family: monospace;">
930 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
931 
=&nbsp;
932 
1'b0;</span><br style="font-family: monospace;">
933 
<br style="font-family: monospace;">
934 
<br style="font-family: monospace;">
935 
<br style="font-family: monospace;">
936 
<span style="font-family: monospace;">while (device_rx_read == 1'b0 )
937 
cg.next(1);</span><br style="font-family: monospace;">
938 
<span style="font-family: monospace;">cg.next(2000);</span><br
939 
 style="font-family: monospace;">
940 
<br style="font-family: monospace;">
941 
<span style="font-family: monospace;">device_parity&nbsp;&nbsp;&nbsp;
942 
=&nbsp; 1'b0;</span><br style="font-family: monospace;">
943 
<span style="font-family: monospace;">device_tx_data&nbsp;&nbsp;
944 
=&nbsp; 8'hfa;</span><br style="font-family: monospace;">
945 
<span style="font-family: monospace;">cg.next(1);</span><br
946 
 style="font-family: monospace;">
947 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
948 
=&nbsp;
949 
1'b1;</span><br style="font-family: monospace;">
950 
<span style="font-family: monospace;">cg.next(1);</span><br
951 
 style="font-family: monospace;">
952 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
953 
=&nbsp;
954 
1'b0;</span><br style="font-family: monospace;">
955 
<br style="font-family: monospace;">
956 
<br style="font-family: monospace;">
957 
<br style="font-family: monospace;">
958 
<span style="font-family: monospace;">while (device_rx_read == 1'b0 )
959 
cg.next(1);</span><br style="font-family: monospace;">
960 
<span style="font-family: monospace;">cg.next(2000);</span><br
961 
 style="font-family: monospace;">
962 
<br style="font-family: monospace;">
963 
<span style="font-family: monospace;">device_parity&nbsp;&nbsp;&nbsp;
964 
=&nbsp; 1'b0;</span><br style="font-family: monospace;">
965 
<span style="font-family: monospace;">device_tx_data&nbsp;&nbsp;
966 
=&nbsp; 8'hfa;</span><br style="font-family: monospace;">
967 
<span style="font-family: monospace;">cg.next(1);</span><br
968 
 style="font-family: monospace;">
969 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
970 
=&nbsp;
971 
1'b1;</span><br style="font-family: monospace;">
972 
<span style="font-family: monospace;">cg.next(1);</span><br
973 
 style="font-family: monospace;">
974 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
975 
=&nbsp;
976 
1'b0;</span><br style="font-family: monospace;">
977 
<br style="font-family: monospace;">
978 
<br style="font-family: monospace;">
979 
<br style="font-family: monospace;">
980 
<br style="font-family: monospace;">
981 
<br style="font-family: monospace;">
982 
<span style="font-family: monospace;">cg.next(20000);</span><br
983 
 style="font-family: monospace;">
984 
<br style="font-family: monospace;">
985 
<span style="font-family: monospace;">device_parity&nbsp;&nbsp;&nbsp;
986 
=&nbsp; 1'b0;</span><br style="font-family: monospace;">
987 
<span style="font-family: monospace;">device_tx_data&nbsp;&nbsp;
988 
=&nbsp; 8'h03;</span><br style="font-family: monospace;">
989 
<span style="font-family: monospace;">cg.next(1);</span><br
990 
 style="font-family: monospace;">
991 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
992 
=&nbsp;
993 
1'b1;</span><br style="font-family: monospace;">
994 
<span style="font-family: monospace;">cg.next(1);</span><br
995 
 style="font-family: monospace;">
996 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
997 
=&nbsp;
998 
1'b0;</span><br style="font-family: monospace;">
999 
<br style="font-family: monospace;">
1000 
<br style="font-family: monospace;">
1001 
<br style="font-family: monospace;">
1002 
<br style="font-family: monospace;">
1003 
<br style="font-family: monospace;">
1004 
<span style="font-family: monospace;">while (device_rx_read == 1'b0 )
1005 
cg.next(1);</span><br style="font-family: monospace;">
1006 
<span style="font-family: monospace;">cg.next(2000);</span><br
1007 
 style="font-family: monospace;">
1008 
<br style="font-family: monospace;">
1009 
<span style="font-family: monospace;">device_parity&nbsp;&nbsp;&nbsp;
1010 
=&nbsp; 1'b0;</span><br style="font-family: monospace;">
1011 
<span style="font-family: monospace;">device_tx_data&nbsp;&nbsp;
1012 
=&nbsp; 8'hfa;</span><br style="font-family: monospace;">
1013 
<span style="font-family: monospace;">cg.next(1);</span><br
1014 
 style="font-family: monospace;">
1015 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
1016 
=&nbsp;
1017 
1'b1;</span><br style="font-family: monospace;">
1018 
<span style="font-family: monospace;">cg.next(1);</span><br
1019 
 style="font-family: monospace;">
1020 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
1021 
=&nbsp;
1022 
1'b0;</span><br style="font-family: monospace;">
1023 
<br style="font-family: monospace;">
1024 
<br style="font-family: monospace;">
1025 
<br style="font-family: monospace;">
1026 
<span style="font-family: monospace;">while (device_rx_read == 1'b0 )
1027 
cg.next(1);</span><br style="font-family: monospace;">
1028 
<span style="font-family: monospace;">cg.next(2000);</span><br
1029 
 style="font-family: monospace;">
1030 
<br style="font-family: monospace;">
1031 
<span style="font-family: monospace;">device_parity&nbsp;&nbsp;&nbsp;
1032 
=&nbsp; 1'b0;</span><br style="font-family: monospace;">
1033 
<span style="font-family: monospace;">device_tx_data&nbsp;&nbsp;
1034 
=&nbsp; 8'hfa;</span><br style="font-family: monospace;">
1035 
<span style="font-family: monospace;">cg.next(1);</span><br
1036 
 style="font-family: monospace;">
1037 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
1038 
=&nbsp;
1039 
1'b1;</span><br style="font-family: monospace;">
1040 
<span style="font-family: monospace;">cg.next(1);</span><br
1041 
 style="font-family: monospace;">
1042 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
1043 
=&nbsp;
1044 
1'b0;</span><br style="font-family: monospace;">
1045 
<br style="font-family: monospace;">
1046 
<br style="font-family: monospace;">
1047 
<br style="font-family: monospace;">
1048 
<br style="font-family: monospace;">
1049 
<span style="font-family: monospace;">while (device_rx_read == 1'b0 )
1050 
cg.next(1);</span><br style="font-family: monospace;">
1051 
<span style="font-family: monospace;">cg.next(2000);</span><br
1052 
 style="font-family: monospace;">
1053 
<br style="font-family: monospace;">
1054 
<span style="font-family: monospace;">device_parity&nbsp;&nbsp;&nbsp;
1055 
=&nbsp; 1'b0;</span><br style="font-family: monospace;">
1056 
<span style="font-family: monospace;">device_tx_data&nbsp;&nbsp;
1057 
=&nbsp; 8'hfa;</span><br style="font-family: monospace;">
1058 
<span style="font-family: monospace;">cg.next(1);</span><br
1059 
 style="font-family: monospace;">
1060 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
1061 
=&nbsp;
1062 
1'b1;</span><br style="font-family: monospace;">
1063 
<span style="font-family: monospace;">cg.next(1);</span><br
1064 
 style="font-family: monospace;">
1065 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
1066 
=&nbsp;
1067 
1'b0;</span><br style="font-family: monospace;">
1068 
<br style="font-family: monospace;">
1069 
<br style="font-family: monospace;">
1070 
<br style="font-family: monospace;">
1071 
<span style="font-family: monospace;">while (device_rx_read == 1'b0 )
1072 
cg.next(1);</span><br style="font-family: monospace;">
1073 
<span style="font-family: monospace;">cg.next(2000);</span><br
1074 
 style="font-family: monospace;">
1075 
<br style="font-family: monospace;">
1076 
<span style="font-family: monospace;">device_parity&nbsp;&nbsp;&nbsp;
1077 
=&nbsp; 1'b0;</span><br style="font-family: monospace;">
1078 
<span style="font-family: monospace;">device_tx_data&nbsp;&nbsp;
1079 
=&nbsp; 8'hfa;</span><br style="font-family: monospace;">
1080 
<span style="font-family: monospace;">cg.next(1);</span><br
1081 
 style="font-family: monospace;">
1082 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
1083 
=&nbsp;
1084 
1'b1;</span><br style="font-family: monospace;">
1085 
<span style="font-family: monospace;">cg.next(1);</span><br
1086 
 style="font-family: monospace;">
1087 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
1088 
=&nbsp;
1089 
1'b0;</span><br style="font-family: monospace;">
1090 
<br style="font-family: monospace;">
1091 
<br style="font-family: monospace;">
1092 
<br style="font-family: monospace;">
1093 
<br style="font-family: monospace;">
1094 
<span style="font-family: monospace;">while (device_rx_read == 1'b0 )
1095 
cg.next(1);</span><br style="font-family: monospace;">
1096 
<span style="font-family: monospace;">cg.next(2000);</span><br
1097 
 style="font-family: monospace;">
1098 
<br style="font-family: monospace;">
1099 
<span style="font-family: monospace;">device_parity&nbsp;&nbsp;&nbsp;
1100 
=&nbsp; 1'b0;</span><br style="font-family: monospace;">
1101 
<span style="font-family: monospace;">device_tx_data&nbsp;&nbsp;
1102 
=&nbsp; 8'hfa;</span><br style="font-family: monospace;">
1103 
<span style="font-family: monospace;">cg.next(1);</span><br
1104 
 style="font-family: monospace;">
1105 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
1106 
=&nbsp;
1107 
1'b1;</span><br style="font-family: monospace;">
1108 
<span style="font-family: monospace;">cg.next(1);</span><br
1109 
 style="font-family: monospace;">
1110 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
1111 
=&nbsp;
1112 
1'b0;</span><br style="font-family: monospace;">
1113 
<br style="font-family: monospace;">
1114 
<br style="font-family: monospace;">
1115 
<br style="font-family: monospace;">
1116 
<br style="font-family: monospace;">
1117 
<br style="font-family: monospace;">
1118 
<br style="font-family: monospace;">
1119 
<span style="font-family: monospace;">cg.next(20000);</span><br
1120 
 style="font-family: monospace;">
1121 
<br style="font-family: monospace;">
1122 
<span style="font-family: monospace;">device_parity&nbsp;&nbsp;&nbsp;
1123 
=&nbsp; 1'b0;</span><br style="font-family: monospace;">
1124 
<span style="font-family: monospace;">device_tx_data&nbsp;&nbsp;
1125 
=&nbsp; 8'h12;</span><br style="font-family: monospace;">
1126 
<span style="font-family: monospace;">cg.next(1);</span><br
1127 
 style="font-family: monospace;">
1128 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
1129 
=&nbsp;
1130 
1'b1;</span><br style="font-family: monospace;">
1131 
<span style="font-family: monospace;">cg.next(1);</span><br
1132 
 style="font-family: monospace;">
1133 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
1134 
=&nbsp;
1135 
1'b0;</span><br style="font-family: monospace;">
1136 
<br style="font-family: monospace;">
1137 
<br style="font-family: monospace;">
1138 
<br style="font-family: monospace;">
1139 
<span style="font-family: monospace;">cg.next(20000);</span><br
1140 
 style="font-family: monospace;">
1141 
<br style="font-family: monospace;">
1142 
<span style="font-family: monospace;">device_parity&nbsp;&nbsp;&nbsp;
1143 
=&nbsp; 1'b1;</span><br style="font-family: monospace;">
1144 
<span style="font-family: monospace;">device_tx_data&nbsp;&nbsp;
1145 
=&nbsp; 8'h34;</span><br style="font-family: monospace;">
1146 
<span style="font-family: monospace;">cg.next(1);</span><br
1147 
 style="font-family: monospace;">
1148 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
1149 
=&nbsp;
1150 
1'b1;</span><br style="font-family: monospace;">
1151 
<span style="font-family: monospace;">cg.next(1);</span><br
1152 
 style="font-family: monospace;">
1153 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
1154 
=&nbsp;
1155 
1'b0;</span><br style="font-family: monospace;">
1156 
<br style="font-family: monospace;">
1157 
<br style="font-family: monospace;">
1158 
<br style="font-family: monospace;">
1159 
<span style="font-family: monospace;">cg.next(20000);</span><br
1160 
 style="font-family: monospace;">
1161 
<br style="font-family: monospace;">
1162 
<span style="font-family: monospace;">device_parity&nbsp;&nbsp;&nbsp;
1163 
=&nbsp; 1'b0;</span><br style="font-family: monospace;">
1164 
<span style="font-family: monospace;">device_tx_data&nbsp;&nbsp;
1165 
=&nbsp; 8'h56;</span><br style="font-family: monospace;">
1166 
<span style="font-family: monospace;">cg.next(1);</span><br
1167 
 style="font-family: monospace;">
1168 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
1169 
=&nbsp;
1170 
1'b1;</span><br style="font-family: monospace;">
1171 
<span style="font-family: monospace;">cg.next(1);</span><br
1172 
 style="font-family: monospace;">
1173 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
1174 
=&nbsp;
1175 
1'b0;</span><br style="font-family: monospace;">
1176 
<br style="font-family: monospace;">
1177 
<br style="font-family: monospace;">
1178 
<br style="font-family: monospace;">
1179 
<br style="font-family: monospace;">
1180 
<br style="font-family: monospace;">
1181 
<br style="font-family: monospace;">
1182 
<br style="font-family: monospace;">
1183 
<br style="font-family: monospace;">
1184 
<span style="font-family: monospace;">cg.next(20000);</span><br
1185 
 style="font-family: monospace;">
1186 
<br style="font-family: monospace;">
1187 
<span style="font-family: monospace;">device_parity&nbsp;&nbsp;&nbsp;
1188 
=&nbsp; 1'b0;</span><br style="font-family: monospace;">
1189 
<span style="font-family: monospace;">device_tx_data&nbsp;&nbsp;
1190 
=&nbsp; 8'h78;</span><br style="font-family: monospace;">
1191 
<span style="font-family: monospace;">cg.next(1);</span><br
1192 
 style="font-family: monospace;">
1193 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
1194 
=&nbsp;
1195 
1'b1;</span><br style="font-family: monospace;">
1196 
<span style="font-family: monospace;">cg.next(1);</span><br
1197 
 style="font-family: monospace;">
1198 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
1199 
=&nbsp;
1200 
1'b0;</span><br style="font-family: monospace;">
1201 
<br style="font-family: monospace;">
1202 
<br style="font-family: monospace;">
1203 
<br style="font-family: monospace;">
1204 
<span style="font-family: monospace;">cg.next(20000);</span><br
1205 
 style="font-family: monospace;">
1206 
<br style="font-family: monospace;">
1207 
<span style="font-family: monospace;">device_parity&nbsp;&nbsp;&nbsp;
1208 
=&nbsp; 1'b0;</span><br style="font-family: monospace;">
1209 
<span style="font-family: monospace;">device_tx_data&nbsp;&nbsp;
1210 
=&nbsp; 8'h9a;</span><br style="font-family: monospace;">
1211 
<span style="font-family: monospace;">cg.next(1);</span><br
1212 
 style="font-family: monospace;">
1213 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
1214 
=&nbsp;
1215 
1'b1;</span><br style="font-family: monospace;">
1216 
<span style="font-family: monospace;">cg.next(1);</span><br
1217 
 style="font-family: monospace;">
1218 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
1219 
=&nbsp;
1220 
1'b0;</span><br style="font-family: monospace;">
1221 
<br style="font-family: monospace;">
1222 
<br style="font-family: monospace;">
1223 
<br style="font-family: monospace;">
1224 
<span style="font-family: monospace;">cg.next(20000);</span><br
1225 
 style="font-family: monospace;">
1226 
<br style="font-family: monospace;">
1227 
<span style="font-family: monospace;">device_parity&nbsp;&nbsp;&nbsp;
1228 
=&nbsp; 1'b1;</span><br style="font-family: monospace;">
1229 
<span style="font-family: monospace;">device_tx_data&nbsp;&nbsp;
1230 
=&nbsp; 8'hbc;</span><br style="font-family: monospace;">
1231 
<span style="font-family: monospace;">cg.next(1);</span><br
1232 
 style="font-family: monospace;">
1233 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
1234 
=&nbsp;
1235 
1'b1;</span><br style="font-family: monospace;">
1236 
<span style="font-family: monospace;">cg.next(1);</span><br
1237 
 style="font-family: monospace;">
1238 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
1239 
=&nbsp;
1240 
1'b0;</span><br style="font-family: monospace;">
1241 
<br style="font-family: monospace;">
1242 
<br style="font-family: monospace;">
1243 
<br style="font-family: monospace;">
1244 
<br style="font-family: monospace;">
1245 
<br style="font-family: monospace;">
1246 
<br style="font-family: monospace;">
1247 
<span style="font-family: monospace;">cg.next(20000);</span><br
1248 
 style="font-family: monospace;">
1249 
<br style="font-family: monospace;">
1250 
<br style="font-family: monospace;">
1251 
<br style="font-family: monospace;">
1252 
<span style="font-family: monospace;">$display("%t&nbsp;&nbsp;&nbsp;
1253 
Test&nbsp; PASSED",$realtime);</span><br style="font-family: monospace;">
1254 
<span style="font-family: monospace;">$finish;</span><br
1255 
 style="font-family: monospace;">
1256 
<span style="font-family: monospace;">end</span><br
1257 
 style="font-family: monospace;">
1258 
<br style="font-family: monospace;">
1259 
<br>
1260 
</p>
1261 
<p><br>
1262 
</p>
1263 
<p><br>
1264 
<span style="font-family: monospace;">--------------------------------------------------------------------------------------------------------------------------------------</span><br>
1265 
</p>
1266 
<p><br>
1267 
</p>
1268 
<h2><a name="manifesto"></a>dmp_define<br>
1269 
</h2>
1270 
<p style="font-family: monospace;">--------------------------------------------------------------------------------------------------------------------------------------<br>
1271 
</p>
1272 
<p style="font-family: monospace;">$dumpfile ("TestBench.vcd");<br>
1273 
$dumpvars (0, TB);<br>
1274 
--------------------------------------------------------------------------------------------------------------------------------------<br>
1275 
<br>
1276 
</p>
1277 
<p><br>
1278 
<br>
1279 
</p>
1280 94 jt_eaton 
<p></p>
1281 
<p></p>
1282 27 jt_eaton 
<p><br>
1283 
&nbsp;<br>
1284 
</p>
1285 
<p><br>
1286 
<br>
1287 
</p>
1288 
<p><br>
1289 
<br>
1290 
</p>
1291 
<p><br>
1292 
<br>
1293 
</p>
1294 
<p><br>
1295 
<br>
1296 
</p>
1297 
<p><br>
1298 
<br>
1299 
</p>
1300 
</body>
1301 
</html>

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