OpenCores
URL https://opencores.org/ocsvn/socgen/socgen/trunk

Subversion Repositories socgen

[/] [socgen/] [trunk/] [doc/] [src/] [guides/] [guide_verification.html] - Blame information for rev 80

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 27 jt_eaton 
<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
2 
<html>
3 
<head>
4 
  <meta http-equiv="CONTENT-TYPE" content="text/html; charset=UTF-8">
5 
  <title>Verification Guidelines</title>
6 
  <meta name="GENERATOR" content="OpenOffice.org 3.0  (Linux)">
7 
  <meta name="CREATED" content="0;0">
8 
  <meta name="CHANGED" content="20100309;9312200">
9 
  <meta name="KEYWORDS" content="start">
10 
  <meta name="Info 3" content="">
11 
  <meta name="Info 4" content="">
12 
  <meta name="date" content="2008-01-08T12:01:41-0500">
13 
  <meta name="robots" content="index,follow">
14 
</head>
15 
<body dir="ltr" lang="en-US">
16 
<h1><a name="socgen_project"></a><big>SOCGEN Project</big></h1>
17 
<h2><br>
18 
</h2>
19 
<h2><a name="manifesto"></a>Verification Guidelines</h2>
20 
<p><br>
21 
<br>
22 
</p>
23 
<p>Verification is the art of stimulating&nbsp; a component&nbsp;
24 
module and checking that it produces the correct outputs. Stimulations
25 
are designed to
26 
ensure that all of the components functions are exercised and any
27 28 jt_eaton 
deviation from the expected behaviour&nbsp; is reported as an error.
28 
Every
29 27 jt_eaton 
component must have at least one test case but may have as many as
30 28 jt_eaton 
needed to fully verify the design. All components will have at least
31 
one interface and a bus functional model (bfm) must be created for each
32 
and every interface.<br>
33 27 jt_eaton 
</p>
34 
<p>A complete test suite is required for every component module.&nbsp;
35 
Each test_case is simulated and the log file will indicate whether the
36 
test passed or failed. Other output files such as dump files may also
37 
be produced duging the simulation.<br>
38 
</p>
39 
<p><br>
40 
</p>
41 
<p></p>
42 
<br>
43 
<p><img style="width: 800px; height: 600px;" alt=""
44 
 src="../png/ver_fig1.png"><br>
45 
</p>
46 
<p><br>
47 
</p>
48 
<p>A test suite is needed for every piece of IP in the design and
49 
creating this suite can be a very labor intensive operation. It usually
50 
takes four hours to create the test_cases for each hour that was spent
51 
creating the rtl code.&nbsp; A full test must be run on every leaf cell
52 
component and some of these are repeated as the components are used as
53 
children of other components.&nbsp; It is essential that all test_cases
54 
are written so that they may be reused when testing the component when
55 
it it part of a parent component.<br>
56 
</p>
57 
<p><br>
58 
</p>
59 
<p><br>
60 
</p>
61 
<p><br>
62 
</p>
63 
<p><br>
64 
</p>
65 
<p><br>
66 
</p>
67 
<p><img style="width: 800px; height: 600px;" alt=""
68 
 src="../png/ver_fig2.png"><br>
69 
</p>
70 
<p>In this case a new component is created by combining&nbsp; two leaf
71 
cell components and its test_case is created by combining blocks from
72 
those two components test_cases.<br>
73 
</p>
74 
<p><br>
75 
</p>
76 
<p><br>
77 
</p>
78 
<p><br>
79 
<br>
80 
</p>
81 
<p><br>
82 
</p>
83 
<p><img style="width: 800px; height: 600px;" alt=""
84 
 src="../png/ver_fig3.png"><br>
85 
</p>
86 
<p><br>
87 
</p>
88 
<p>Every interface on the component is connected to it's own bfm model
89 
that contains all the tasks needed to test the interface. The calling
90 
sequences needed to preform a particular test are all loaded from a
91 28 jt_eaton 
sperate test_define file. It is important that each interface has its
92 
task calls in
93 
a seperate code block in the test_define file. The goal is to develop
94 
these models and task
95 27 jt_eaton 
calls on&nbsp; the component simulation and then reuse them as the
96 
component is used in larger designs.&nbsp; Interleaving task calls for
97 
different models makes that difficult.<br>
98 
</p>
99 
<p><br>
100 
</p>
101 
<p><br>
102 28 jt_eaton 
</p>
103 
<h2><a name="manifesto"></a>Protocol checkers and monitors<br>
104 
</h2>
105 27 jt_eaton 
<br>
106 28 jt_eaton 
&nbsp;
107 
Protocol checkers and monitors are similar to a bus functional
108 
models&nbsp; except that they are for obsevation only and cannot
109 
control any signals. They watch every transaction that occurs on the
110 
interface and reports a failure when anything violates that interfaces
111 
defined protocols. <span style="font-family: serif;"> They are created
112 
in a seperate module and may be instantiated in the testbench&nbsp; and
113 
connected to an interface.<br>
114 
<br>
115 
The same protocol checker can also be included in the rtl code so it
116 
can monitor an interface that is buried deep inside a chip. Once
117 
inserted in the rtl source it will watch for&nbsp; and report errors
118 
that may occur during the regression suite. Since protocol checkers
119 
are&nbsp; not synthesizable they must be excluded from synthesis with a
120 
`ifndef SYNTHESYS statement.<br>
121 
<br>
122 
Monitors are similar to protocol checkers except that they are designed
123 
to be implemetent in actual logic.&nbsp; If they ever fire during
124 
product usage then these events should be latched and saved for later
125 
debugging.<br>
126 
&nbsp; <br>
127 
</span>
128 
<p><br>
129 
<br>
130 27 jt_eaton 
</p>
131 
<p><br>
132 
</p>
133 
<h2><a name="manifesto"></a>guidelines for creating reusable test_cases<br>
134 
</h2>
135 
<br>
136 
&nbsp; All test_cases will have a master clock and reset signal.&nbsp;
137 
The DUT and all models will respond to the reset signal. Anything in
138 
test_define will only change state on the rising edge of clock.<br
139 
 style="font-family: serif;">
140 
<br style="font-family: serif;">
141 
<span style="font-family: serif;">&nbsp; All test_cases will be
142 
self-checking.&nbsp; Test suites are usually run by scripts and robots
143 
that need a simple method to determine wether a test_case finished and
144 
passed. </span><br style="font-family: serif;">
145 
<br style="font-family: serif;">
146 
<span style="font-family: serif;">&nbsp; All models, tasks and protocal
147 
checkers will use a common method to report&nbsp; if there is a failure.</span><br
148 
 style="font-family: serif;">
149 
<br style="font-family: serif;">
150 
<span style="font-family: serif;">&nbsp; All test sequences will use a
151 
common method to signal the successful completion of the test</span><br
152 
 style="font-family: serif;">
153 
<br style="font-family: serif;">
154 
<span style="font-family: serif;">&nbsp; All messages in the log file
155 
must use the following format:</span><br>
156 
<br style="font-family: serif;">
157 
<ul style="font-family: monospace;">
158 
  <li><big>Time stamp&nbsp; &nbsp;&nbsp;&nbsp;&nbsp;&nbsp; This is the
159 
$realtime&nbsp; formated by %t</big></li>
160 
  <li><big>Instance Name&nbsp;&nbsp;&nbsp;&nbsp; This is obtained with
161 
%m</big></li>
162 
  <li><big>Message Type&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; This is either
163 
ERROR&nbsp; or WARNING. No type indicates informational message</big></li>
164 
  <li><big>Message&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
165 
 
166 
 
167 28 jt_eaton 
 
168 
 
169 27 jt_eaton 
    </big><br>
170 
  </li>
171 
</ul>
172 
<br style="font-family: serif;">
173 
<br style="font-family: serif;">
174 
<p style="font-family: serif;">&nbsp;&nbsp; All test cases MUST have a
175 
finite run time.&nbsp; Use a TIMEOUT counter to stop the sim if it
176 
exceeds the expected number of clocks<br style="font-family: serif;">
177 
</p>
178 
<span style="font-family: serif;">&nbsp;&nbsp;
179 
<code><span style="font-family: serif;">All test_cases must be
180 
deterministic. If any pseudorandom delays are used they must be
181 
"seeded" and repeatable from run to run.</span></code></span><code
182 
 style="font-family: serif;"><br>
183 
<br>
184 
<br>
185 
&nbsp;<span style="font-family: serif;"> </span></code><span
186 
 style="font-family: serif;"><code><span style="font-family: serif;">Do
187 
not interweave threads in the test_define blocks. Each block should
188 
only access a single BFM.</span><br style="font-family: serif;">
189 
<br style="font-family: serif;">
190 
<br style="font-family: serif;">
191 
<span style="font-family: serif;">&nbsp; Plan on designs where you will
192 
need to test multiple instances of a component</span><br
193 
 style="font-family: serif;">
194 
<br style="font-family: serif;">
195 
<span style="font-family: serif;">&nbsp; Only test a single
196 
configuration or mode in any test_case. If you need to test 3 different
197 
modes then create 3 different test_cases. The exception to this is when
198 
there is a mission mode requirement to switch modes and you are testing
199 
that switch.&nbsp; </span><br style="font-family: serif;">
200 
</code></span>
201 
<p style="font-family: serif;"><br>
202 
</p>
203 
<p><br>
204 
</p>
205 
<p><br>
206 
</p>
207 28 jt_eaton 
<h2><a name="manifesto"></a>Gate and Post Route Simulations<br>
208 
</h2>
209 
<br>
210 
&nbsp; All signals between the DUT and the bfms change only at the
211 
rising edge of clk. This is fine for RTL sims but will not work for
212 
real logic with setup and hold time requirements. For these the signals
213 
driving the dut must be delayed from clk and from each other to provide
214 
the required setup and hold times. Signals from the DUT will have
215 
delays and must only be tested during a prescribed time window.<br>
216 
This is accomplished with a set of modules that mimic the functions of
217 
a IC tester. These modules provide the interface between the BFM's and
218 
the DUT.<br>
219 
<br>
220 
<br>
221 
<img style="width: 800px; height: 600px;" alt=""
222 
 src="../png/ver_fig4.png"><br>
223 
<br style="font-family: serif;">
224 
<br style="font-family: serif;">
225 
&nbsp;<span style="font-family: serif;"></span><span
226 
 style="font-family: serif;"><br>
227 
</span>
228 
<p></p>
229 27 jt_eaton 
<p><br>
230 
</p>
231 
<p><br>
232 
</p>
233 
<p><br>
234 
</p>
235 
<p><br>
236 
</p>
237 
<p><br>
238 
</p>
239 
<p><br>
240 
<br>
241 
</p>
242 
<p><br>
243 
</p>
244 
<h2><a name="manifesto"></a>simulation directory (sim)<br>
245 
</h2>
246 
<p><br>
247 
</p>
248 
<big><code>
249 
./sim<br>
250 
&nbsp; +/bin<br>
251 
&nbsp;&nbsp; &nbsp;&nbsp; Makefile<br>
252 
&nbsp; +/bench<br>
253 
&nbsp;&nbsp; &nbsp;&nbsp; +verilog<br>
254 
&nbsp;&nbsp; &nbsp; &nbsp;&nbsp; TestBench<br>
255 
&nbsp;&nbsp; &nbsp; &nbsp;&nbsp; +models<br>
256 
&nbsp;&nbsp;&nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; model1<br>
257 
&nbsp;&nbsp;&nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; model2<br>
258 
&nbsp;&nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp;&nbsp; .<br>
259 
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; &nbsp;&nbsp; .<br>
260 
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; &nbsp;&nbsp; .<br>
261 
&nbsp; +/lib<br>
262 
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; +lib_part1<br>
263 
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; lib_part(s).v<br>
264 
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; +lib_part2<br>
265 
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; .<br>
266 
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; .<br>
267 
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; .<br>
268 
</code><code>&nbsp; +/run</code><br>
269 
<code>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; +test_case1<br>
270 
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; filelist<br>
271 
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; dmp_define<br>
272 
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; modellist<br>
273 
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; dut<br>
274 
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; test_define<br>
275 
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; liblist<br>
276 
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; TB.defs<br>
277 
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; +test_case2<br>
278 
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; .<br>
279 
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; .<br>
280 
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; .<br>
281 
&nbsp; +/log<br>
282 
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; test_case1.log<br>
283 
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; test_case2.log<br>
284 
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; .<br>
285 
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; .<br>
286 
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; .<br>
287 
&nbsp; +/out<br>
288 
&nbsp;</code><code>&nbsp;&nbsp;&nbsp;&nbsp; test_case1.vcd<br>
289 
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; test_case2.vcd<br>
290 
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; .<br>
291 
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; .<br>
292 
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; .</code><br>
293 
</big>
294 
<code><ouabache design="" works=""><big><br>
295 
<br>
296 
<br>
297 
</big>
298 
<br>
299 
</ouabache></code>
300 
<p>Each component will have a ./sim directory for the test suite.
301 
Typing:<br>
302 
</p>
303 
<p><big><big><br>
304 
<small><span style="font-family: monospace;">
305 
&lt;&gt;:~$&gt;cd ./sim/bin</span><br style="font-family: monospace;">
306 
</small><span style="font-family: monospace;"><small>
307 
&lt;&gt;:~$&gt;make run_sims</small><br>
308 
</span></big></big></p>
309 
<p><big><big><span style="font-family: monospace;"><br>
310 
</span></big></big>
311 
</p>
312 
will run the entire test suite. After that has been done then
313 
individual test_cases may be rerun by changing into their test_case
314 
directory and typing:<br>
315 
<code><ouabache design="" works=""><br>
316 
<br>
317 
</ouabache></code>
318 
<p><big><big><span style="font-family: monospace;"><small>&lt;&gt;:~$&gt;make
319 
sim</small></span></big></big>
320 
</p>
321 
<p><br>
322 
</p>
323 
<p>Each test_case will produce a log file that may be parsed for the
324 
string "PASSED" to indicate that the sim finished. If so then the log
325 
file should be parsed for the strings "ERROR" and "WARNING" to see if
326 
there were and errors or warnings. <br>
327 
</p>
328 
<p>Simulating a test_case requires involking a verilog simulator and
329 
passing it command line arguments and a TestBench file. Icarus verilog
330 
is the default simulator for the socgen project. Socgen uses a minumal
331 
command line and instead puts most needed information in the TestBench
332 
file.&nbsp; The only command line option is to set the VCD flag if a
333 
value change dump file is needed.<br>
334 
</p>
335 
<p><br>
336 
</p>
337 
<p><br>
338 
<br>
339 
<br>
340 
<br>
341 
<br>
342 
</p>
343 
<h2><a name="manifesto"></a>TestBench file<br>
344 
</h2>
345 
<code>
346 
<ouabache design="" works="">--------------------------------------------------------------------------------------------------------------------------------------<br>
347 
<br>
348 
`include&nbsp; "./TB.defs"<br>
349 
<br>
350 
`ifndef&nbsp;&nbsp;&nbsp;&nbsp; TIMESCALE<br>
351 
`define&nbsp;&nbsp;&nbsp;&nbsp; TIMESCALE&nbsp;&nbsp; 1ns/1ns<br>
352 
`endif<br>
353 
<br>
354 
<br>
355 
`ifndef&nbsp;&nbsp;&nbsp;&nbsp; TIMEFORMAT<br>
356 
`define&nbsp;&nbsp;&nbsp;&nbsp; TIMEFORMAT&nbsp; $timeformat(-6, 2, "
357 
us", 14);<br>
358 
`endif<br>
359 
<br>
360 
<br>
361 
`ifndef&nbsp;&nbsp;&nbsp;&nbsp; PERIOD<br>
362 
`define&nbsp;&nbsp;&nbsp;&nbsp; PERIOD&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
363 
40.00000 <br>
364 
`endif<br>
365 
<br>
366 
`ifndef&nbsp;&nbsp;&nbsp;&nbsp; TIMEOUT<br>
367 
`define&nbsp;&nbsp;&nbsp;&nbsp; TIMEOUT&nbsp;&nbsp;&nbsp;&nbsp; 200000<br>
368 
`endif<br>
369 
<br>
370 
<br>
371 
`timescale `TIMESCALE<br>
372 
<br>
373 
<br>
374 
`include&nbsp; "./filelist"<br>
375 
`include&nbsp; "./liblist"<br>
376 
`include&nbsp; "./modellist"<br>
377 
<br>
378 
<br>
379 
<br>
380 
<br>
381 
module TB();<br>
382 
<br>
383 
wire clk;<br>
384 
wire reset;<br>
385 
<br>
386 
`include "./dut"<br>
387 
`include "./test_define"<br>
388 
<br>
389 
<br>
390 
`ifdef VCD<br>
391 
initial<br>
392 
begin<br>
393 
`include "./dmp_define"<br>
394 
end<br>
395 
`endif<br>
396 
<br>
397 
clock_gen<br>
398 
#(.PERIOD(`PERIOD),<br>
399 
&nbsp; .TIMEOUT(`TIMEOUT))<br>
400 
cg <br>
401 
( .clk&nbsp;&nbsp; ( clk&nbsp;&nbsp; ),<br>
402 
&nbsp;
403 
.reset ( reset )<br>
404 
);<br>
405 
<br>
406 
<br>
407 
<br>
408 
<br>
409 
endmodule<br>
410 
</ouabache></code><span style="font-family: monospace;"><br>
411 
--------------------------------------------------------------------------------------------------------------------------------------<br>
412 
</span>
413 
<p><span style="font-family: monospace;"><br>
414 
</span></p>
415 
<p><br>
416 
<span style="font-family: monospace;"></span></p>
417 
<p>A single&nbsp; TestBench file provides the infrastructure for all
418 
test cases. The actual testing is determined by the data contained in
419 
six files in the ./sim/run/test_case directory. The TestBench file
420 
creates a top level module named TB and instantiates a clock_reset
421 
generator module to provide each test_case with a clock and a reset
422 
signal. It also provides a vcd dump&nbsp; and timeout&nbsp; functions
423 
for each test_case.<span style="font-family: monospace;"><br>
424 
</span></p>
425 
<p><span style="font-family: monospace;"><br>
426 
</span></p>
427 
<p><span style="font-family: monospace;"><br>
428 
</span></p>
429 
<h2><a name="manifesto"></a>TB.defs <br>
430 
</h2>
431 
<p><span style="font-family: monospace;">--------------------------------------------------------------------------------------------------------------------------------------</span>
432 
</p>
433 
<code>
434 
`define&nbsp;&nbsp;&nbsp;&nbsp; TIMESCALE&nbsp;&nbsp; 1ns/1ns<br>
435 
`define&nbsp;&nbsp;&nbsp;&nbsp; TIMEFORMAT&nbsp; $timeformat(-6, 2, "
436 
us", 14);<br>
437 
`define&nbsp;&nbsp;&nbsp;&nbsp; PERIOD&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
438 
40.0000 <br>
439 
`define&nbsp;&nbsp;&nbsp;&nbsp; TIMEOUT&nbsp;&nbsp;&nbsp;&nbsp; 200000<br>
440 
</code>
441 
<p></p>
442 
<p><span style="font-family: monospace;">--------------------------------------------------------------------------------------------------------------------------------------<br>
443 
</span></p>
444 
<p><span style="font-family: monospace;"><br>
445 
</span></p>
446 
<p>The TB.defs file may be used to set up the timescale and master
447 
clock period for the simulation.&nbsp; Any model or lib part that needs
448 
to reset the timescale back to the system default must use:<br>
449 
</p>
450 
<p><code>`timescale `TIMESCALE<br>
451 
</code></p>
452 
<p><code><br>
453 
<span style="font-family: serif;">Do NOT use</span><br>
454 
</code></p>
455 
<p><code>`include "./timescale.v"<br>
456 
</code></p>
457 
<p><code><br>
458 
<span style="font-family: serif;">The socgen project does not contain
459 
any timescale.v file.&nbsp; All socgen rtl code is preprocessed before
460 
it is passed to simulation and the value of the timescale may change
461 
depending on the simulation. All ip components must only contain
462 
synthesisable code and should not have any need for timescale.<br>
463 
</span></code></p>
464 
<p><code><span style="font-family: serif;">TIMEFORMAT will set the
465 
format that is used when time is displayed using the %t format . All
466 
$display statements must start by displaying $realtime using the %t
467 
format so every line in the log has a time stamp. Any display statement
468 
from an instantiated module must also have %m to print out it's
469 
instance name. If the message is an error or a warning then the strings
470 
ERROR or WARNING must be used so that this information may be parsed
471 
from the log file.<br>
472 
<br style="font-family: serif;">
473 
</span></code></p>
474 
<p><span style="font-family: monospace;"><br>
475 
</span>The TB.defs file may also
476 
be used to pass the size and location&nbsp; of an embedded&nbsp; bit
477 
file to the device_under_test<span style="font-family: monospace;"> <br>
478 
</span></p>
479 
<p><span style="font-family: monospace;">--------------------------------------------------------------------------------------------------------------------------------------</span></p>
480 
<p><span style="font-family: monospace;">`define&nbsp; ROM_WORDS 2048 <br>
481 
`define&nbsp; ROM_ADDR&nbsp;&nbsp; 11&nbsp; <br>
482 
`define&nbsp; ROM_WIDTH&nbsp; 12&nbsp; <br>
483 
`define&nbsp; ROM_FILE "../../../../../sw/mouse/mouse.abs12"<br>
484 
</span><span style="font-family: monospace;">--------------------------------------------------------------------------------------------------------------------------------------</span><br>
485 
</p>
486 
<p>The path is the relative path from the test_case run directory.<span
487 
 style="font-family: monospace;"><br>
488 
</span></p>
489 
<p><span style="font-family: monospace;"><br>
490 
</span></p>
491 
<h2><a name="manifesto"></a>filelist </h2>
492 
<p style="font-family: monospace;">--------------------------------------------------------------------------------------------------------------------------------------<br>
493 
</p>
494 
<p style="font-family: monospace;">`include
495 
"../../../rtl/gen/sim/soc_mouse.v"<br>
496 
`include "../../../../pic16c5x/rtl/gen/sim/pic16c5x.v"<br>
497 
`include
498 
"../../../../../children/logic/ip/io_module/rtl/gen/sim/io_module_mouse.v"<br>
499 
`include
500 
"../../../../../children/logic/ip/ps2_interface/rtl/gen/sim/ps2_interface.v"<br>
501 
`include "../../../../../children/logic/ip/uart/rtl/gen/sim/uart.v"<br>
502 
</p>
503 
<code style="font-family: monospace;"></code>
504 
<span style="font-family: monospace;">--------------------------------------------------------------------------------------------------------------------------------------</span>
505 
<p><br>
506 
</p>
507 
<p>The filelist uses `include statements to load all the rtl files into
508 
the simulation.The paths are&nbsp; relative from the test_case run
509 
directory. Note that all the verilog files have been post-processed and
510 
search directories or include directories are not needed.
511 
</p>
512 
<p><br>
513 
</p>
514 
<h2><a name="manifesto"></a>liblist</h2>
515 
<p><span style="font-family: monospace;">--------------------------------------------------------------------------------------------------------------------------------------</span>
516 
</p>
517 
<code>
518 
<br>
519 
`include "../../lib/cde_sram/cde_sram.v"<br>
520 
`include "../../lib/cde_lifo/cde_lifo.v"<br>
521 
`include "../../lib/cde_synchronizers/cde_sync_with_hysteresis.v"<br>
522 
<br>
523 
</code>
524 
<span style="font-family: monospace;">--------------------------------------------------------------------------------------------------------------------------------------</span><br>
525 
<p>The liblist uses `include statements to load all the generic lib
526 
models&nbsp; into
527 
the simulation.The paths are&nbsp; relative from the test_case run
528 
directory. Note that these libs may be replaced&nbsp; by vendor
529 
specific instances when the design is&nbsp; synthesised into gates.<br>
530 
</p>
531 
<p><br>
532 
</p>
533 
<p></p>
534 
<p><br>
535 
</p>
536 
<h2><a name="manifesto"></a>modellist</h2>
537 
<p><span style="font-family: monospace;">--------------------------------------------------------------------------------------------------------------------------------------</span>
538 
</p>
539 
<code><br>
540 
`include "../../bench/verilog/models/clock_gen.v"<br>
541 28 jt_eaton 
`include "../../bench/verilog/models/ps2_model.v"<br>
542 
</code><code>`include "../../bench/verilog/models/uart_model.v"</code><code>&nbsp;&nbsp;
543 
<br>
544 27 jt_eaton 
`include "../../bench/verilog/models/iobuftri.v"&nbsp;&nbsp;&nbsp; <br>
545 
</code><span style="font-family: monospace;"></span><code><br>
546 
</code>
547 
<span style="font-family: monospace;">--------------------------------------------------------------------------------------------------------------------------------------</span><br>
548 
<br>
549 
This list loads all of the simulation models used in the simulation.<br>
550 
<br>
551 
<p><br>
552 
<br>
553 
</p>
554 
<h2><a name="manifesto"></a>dut<br>
555 
</h2>
556 28 jt_eaton 
<p><span style="font-family: monospace;">--------------------------------------------------------------------------------------------------------------------------------------</span><code><br>
557 
wire&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; &nbsp; &nbsp; ps2_data_pad_oe;<br>
558 
wire&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; &nbsp;&nbsp; &nbsp; ps2_data_pad_in;<br>
559 
wire&nbsp;&nbsp;&nbsp;&nbsp; &nbsp;&nbsp; &nbsp;&nbsp; ps2_data;<br>
560 
wire&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; &nbsp;&nbsp; &nbsp; ps2_clk_pad_oe;<br>
561 
wire&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; &nbsp; &nbsp; ps2_clk_pad_in;<br>
562 
wire&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; &nbsp;&nbsp; &nbsp; ps2_clk;<br>
563 27 jt_eaton 
<br>
564 
wire [7:0]&nbsp;&nbsp;&nbsp;&nbsp; portaout;<br>
565 
wire [7:0]&nbsp;&nbsp;&nbsp;&nbsp; portbout;<br>
566 
wire [7:0]&nbsp;&nbsp;&nbsp;&nbsp; portcout;<br>
567 
<br>
568 
<br>
569 
wire [9:0]&nbsp;&nbsp;&nbsp;&nbsp; y_pos;<br>
570 
wire [9:0]&nbsp;&nbsp;&nbsp;&nbsp; x_pos;<br>
571 
wire&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
572 
new_packet;<br>
573 
wire&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
574 
ms_mid; <br>
575 
wire&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
576 
ms_right;&nbsp; <br>
577 
wire&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
578 
ms_left;&nbsp; <br>
579 
<br>
580 
<br>
581 
<br>
582 
wire&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
583 28 jt_eaton 
serial_txd;<br>
584 27 jt_eaton 
wire&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
585 28 jt_eaton 
serial_rxd;<br>
586 
wire&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; loop;<br>
587 
&nbsp; <br>
588 27 jt_eaton 
<br>
589 
soc_mouse<br>
590 
#(<br>
591 
.ROM_WORDS ( `ROM_WORDS ), <br>
592 
.ROM_ADDR&nbsp; ( `ROM_ADDR&nbsp; ),&nbsp; <br>
593 
.ROM_WIDTH ( `ROM_WIDTH ), <br>
594 
.ROM_FILE&nbsp; ( `ROM_FILE&nbsp; )<br>
595 
)<br>
596 
dut(<br>
597 28 jt_eaton 
&nbsp;&nbsp; .clk&nbsp;&nbsp;&nbsp; &nbsp; &nbsp; &nbsp;&nbsp; &nbsp; (
598 
clk&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; &nbsp;&nbsp; &nbsp; ),<br>
599 
&nbsp;&nbsp; .reset &nbsp;&nbsp; &nbsp; &nbsp; &nbsp;&nbsp; (
600 
reset&nbsp;&nbsp;&nbsp; &nbsp; &nbsp;&nbsp; &nbsp; ),<br>
601 27 jt_eaton 
<br>
602 
&nbsp;&nbsp; .ps2_data_pad_in ( ps2_data_pad_in ),<br>
603 
&nbsp;&nbsp; .ps2_clk_pad_in&nbsp; ( ps2_clk_pad_in&nbsp; ),<br>
604 
<br>
605 
&nbsp;&nbsp; .ps2_data_pad_oe ( ps2_data_pad_oe ),<br>
606 
&nbsp;&nbsp; .ps2_clk_pad_oe&nbsp; ( ps2_clk_pad_oe&nbsp; ),<br>
607 
<br>
608 28 jt_eaton 
&nbsp;&nbsp; .portaout&nbsp;&nbsp; &nbsp; &nbsp;&nbsp; (
609 
portaout&nbsp;&nbsp; &nbsp;&nbsp; &nbsp; ),<br>
610 
&nbsp;&nbsp; .portbout&nbsp; &nbsp; &nbsp; &nbsp; ( portbout&nbsp;
611 
&nbsp; &nbsp; &nbsp; ),<br>
612 
&nbsp;&nbsp; .portcout&nbsp; &nbsp; &nbsp; &nbsp; (
613 
portcout&nbsp;&nbsp; &nbsp;&nbsp; &nbsp; ),<br>
614 27 jt_eaton 
<br>
615 28 jt_eaton 
&nbsp;&nbsp; .y_pos&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; &nbsp;&nbsp; &nbsp; (
616 
y_pos&nbsp;&nbsp;&nbsp; &nbsp; &nbsp; &nbsp;&nbsp; ),<br>
617 
&nbsp;&nbsp; .x_pos&nbsp;&nbsp;&nbsp;&nbsp; &nbsp; &nbsp; &nbsp; (
618 
x_pos&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; &nbsp; &nbsp;&nbsp; ),<br>
619 
&nbsp;&nbsp; .new_packet &nbsp; &nbsp;&nbsp; ( new_packet &nbsp;
620 
&nbsp;&nbsp; ),<br>
621 
&nbsp;&nbsp; .ms_mid&nbsp;&nbsp;&nbsp;&nbsp; &nbsp;&nbsp; &nbsp; (
622 
ms_mid&nbsp;&nbsp;&nbsp;&nbsp; &nbsp; &nbsp;&nbsp; ), <br>
623 
&nbsp;&nbsp; .ms_right&nbsp; &nbsp; &nbsp; &nbsp; (
624 
ms_right&nbsp;&nbsp; &nbsp; &nbsp;&nbsp;
625 27 jt_eaton 
),&nbsp; <br>
626 28 jt_eaton 
&nbsp;&nbsp; .ms_left&nbsp;&nbsp; &nbsp; &nbsp; &nbsp; (
627 
ms_left&nbsp;&nbsp;&nbsp; &nbsp; &nbsp;&nbsp; ),&nbsp; <br>
628 27 jt_eaton 
<br>
629 28 jt_eaton 
&nbsp;&nbsp; .txd_pad_out&nbsp;&nbsp;&nbsp;&nbsp; (
630 
serial_txd&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; ),<br>
631 
&nbsp;&nbsp; .rxd_pad_in&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; (
632 
serial_rxd&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; ),<br>
633 
&nbsp;&nbsp; .cts_pad_in&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; (
634 
loop&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
635 
),<br>
636 
&nbsp;&nbsp; .rts_pad_out&nbsp;&nbsp;&nbsp;&nbsp; (
637 
loop&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
638 27 jt_eaton 
)&nbsp; <br>
639 
<br>
640 
&nbsp;&nbsp; );<br>
641 28 jt_eaton 
</code></p>
642 
<p><code>uart_model <br>
643 
#(.CLKCNT(4'hc))<br>
644 
uart_model<br>
645 
(<br>
646 
&nbsp;&nbsp;
647 
.clk&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
648 
(
649 
clk&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
650 
),<br>
651 
&nbsp;&nbsp;
652 
.reset&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
653 
(
654 
reset&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
655 
),
656 27 jt_eaton 
<br>
657 28 jt_eaton 
&nbsp;&nbsp;
658 
.txd_in &nbsp;&nbsp; &nbsp;
659 
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
660 
( serial_txd&nbsp; ),<br>
661 
&nbsp;&nbsp;
662 
.rxd_out &nbsp;&nbsp;
663 
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
664 
( serial_rxd&nbsp; )<br>
665 27 jt_eaton 
<br>
666 28 jt_eaton 
);</code><br>
667 
<code></code></p>
668 
<p><code><br>
669 
</code></p>
670 
<p><code><br>
671 27 jt_eaton 
iobuftri<br>
672 
data_tri_buf<br>
673 
&nbsp; (<br>
674 
&nbsp;&nbsp; .i&nbsp;&nbsp; (
675 
1'b0&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; ),<br>
676 
&nbsp;&nbsp; .oe&nbsp; ( ps2_data_pad_oe ),<br>
677 
&nbsp;&nbsp; .o&nbsp;&nbsp; ( ps2_data_pad_in ),<br>
678 
&nbsp;&nbsp; .pad ( ps2_data&nbsp;&nbsp;&nbsp; )<br>
679 
&nbsp;&nbsp; );<br>
680 
<br>
681 
<br>
682 
iobuftri<br>
683 
clk_tri_buf<br>
684 
&nbsp; (<br>
685 
&nbsp;&nbsp; .i&nbsp;&nbsp; ( 1'b0&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
686 
),<br>
687 
&nbsp;&nbsp; .oe&nbsp; ( ps2_clk_pad_oe ),<br>
688 
&nbsp;&nbsp; .o&nbsp;&nbsp; ( ps2_clk_pad_in ),<br>
689 
&nbsp;&nbsp; .pad ( ps2_clk&nbsp;&nbsp;&nbsp; )<br>
690 
&nbsp;&nbsp; );<br>
691 
<br>
692 
<br>
693 
<br>
694 
pullup ua0(ps2_clk);<br>
695 
pullup ua1(ps2_data);<br>
696 
<br>
697 
<br>
698 
ps2_model <br>
699 
#(.CLKCNT(10'h177))<br>
700 28 jt_eaton 
ps2_model<br>
701 27 jt_eaton 
(<br>
702 
&nbsp;&nbsp;
703 
.clk&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
704 
(
705 
clk&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
706 
),<br>
707 
&nbsp;&nbsp;
708 
.reset&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
709 
(
710 
reset&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
711 
),
712 
<br>
713 
&nbsp;&nbsp;
714 
.ps2_clk&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
715 
(
716 
ps2_clk&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
717 
),<br>
718 
&nbsp;&nbsp;
719 
.ps2_data&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
720 
(
721 
ps2_data&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
722 
)<br>
723 
<br>
724 28 jt_eaton 
);</code></p>
725 
<p><code><br>
726 
</code></p>
727 
<p><code><br>
728 27 jt_eaton 
</code><span style="font-family: monospace;">--------------------------------------------------------------------------------------------------------------------------------------</span><br>
729 
</p>
730 
<p>This file is a verilog code segment that declares all the wires and
731 
regs needed in the sim (except for clk and reset). It then&nbsp;
732 
instantiates the component and all needed models for the simulation.<br>
733 
</p>
734 
<p><br>
735 
</p>
736 
<p><br>
737 
</p>
738 
<p><br>
739 
</p>
740 
<h2><a name="manifesto"></a>test_define<br>
741 
</h2>
742 
<p><span style="font-family: monospace;">--------------------------------------------------------------------------------------------------------------------------------------</span></p>
743 
<p><br>
744 
</p>
745 
<p><span style="font-family: monospace;">initial</span><br
746 
 style="font-family: monospace;">
747 28 jt_eaton 
<span style="font-family: monospace;">begin</span><span
748 
 style="font-family: monospace;"></span><br
749 27 jt_eaton 
 style="font-family: monospace;">
750 
<span style="font-family: monospace;">$display("&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
751 
");</span><br style="font-family: monospace;">
752 
<span style="font-family: monospace;">$display("&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
753 
===================================================");</span><br
754 
 style="font-family: monospace;">
755 
<span style="font-family: monospace;">$display("&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
756 
Test
757 
Start");</span><br style="font-family: monospace;">
758 
<span style="font-family: monospace;">$display("&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
759 
===================================================");</span><br
760 
 style="font-family: monospace;">
761 
<span style="font-family: monospace;">$display("&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
762 
");</span><br style="font-family: monospace;">
763 
<br style="font-family: monospace;">
764 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
765 
=&nbsp;
766 
1'b0;</span><br style="font-family: monospace;">
767 
<span style="font-family: monospace;">device_tx_data&nbsp;&nbsp;
768 
=&nbsp; 8'h00;</span><br style="font-family: monospace;">
769 
<span style="font-family: monospace;">device_ack&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
770 
=&nbsp;
771 
1'b1;</span><br style="font-family: monospace;">
772 
<span style="font-family: monospace;">device_parity&nbsp;&nbsp;&nbsp;
773 
=&nbsp; 1'b1;</span><br style="font-family: monospace;">
774 
<span style="font-family: monospace;">device_stop&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
775 
=&nbsp;
776 
1'b1;</span><br style="font-family: monospace;">
777 
<br style="font-family: monospace;">
778 
<br style="font-family: monospace;">
779 
<br style="font-family: monospace;">
780 
<span style="font-family: monospace;">cg.next(20);</span><br
781 
 style="font-family: monospace;">
782 
<span style="font-family: monospace;">cg.reset_off;</span><br
783 
 style="font-family: monospace;">
784 
<br style="font-family: monospace;">
785 
<span style="font-family: monospace;">while (device_rx_read == 1'b0 )
786 
cg.next(1);</span><br style="font-family: monospace;">
787 
<span style="font-family: monospace;">cg.next(2000);</span><br
788 
 style="font-family: monospace;">
789 
<br style="font-family: monospace;">
790 
<span style="font-family: monospace;">device_parity&nbsp;&nbsp;&nbsp;
791 
=&nbsp; 1'b0;</span><br style="font-family: monospace;">
792 
<span style="font-family: monospace;">device_tx_data&nbsp;&nbsp;
793 
=&nbsp; 8'hfa;</span><br style="font-family: monospace;">
794 
<span style="font-family: monospace;">cg.next(1);</span><br
795 
 style="font-family: monospace;">
796 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
797 
=&nbsp;
798 
1'b1;</span><br style="font-family: monospace;">
799 
<span style="font-family: monospace;">cg.next(1);</span><br
800 
 style="font-family: monospace;">
801 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
802 
=&nbsp;
803 
1'b0;</span><br style="font-family: monospace;">
804 
<br style="font-family: monospace;">
805 
<br style="font-family: monospace;">
806 
<br style="font-family: monospace;">
807 
<br style="font-family: monospace;">
808 
<span style="font-family: monospace;">cg.next(20000);</span><br
809 
 style="font-family: monospace;">
810 
<br style="font-family: monospace;">
811 
<span style="font-family: monospace;">device_parity&nbsp;&nbsp;&nbsp;
812 
=&nbsp; 1'b0;</span><br style="font-family: monospace;">
813 
<span style="font-family: monospace;">device_tx_data&nbsp;&nbsp;
814 
=&nbsp; 8'haa;</span><br style="font-family: monospace;">
815 
<span style="font-family: monospace;">cg.next(1);</span><br
816 
 style="font-family: monospace;">
817 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
818 
=&nbsp;
819 
1'b1;</span><br style="font-family: monospace;">
820 
<span style="font-family: monospace;">cg.next(1);</span><br
821 
 style="font-family: monospace;">
822 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
823 
=&nbsp;
824 
1'b0;</span><br style="font-family: monospace;">
825 
<br style="font-family: monospace;">
826 
<br style="font-family: monospace;">
827 
<br style="font-family: monospace;">
828 
<br style="font-family: monospace;">
829 
<br style="font-family: monospace;">
830 
<br style="font-family: monospace;">
831 
<span style="font-family: monospace;">cg.next(20000);</span><br
832 
 style="font-family: monospace;">
833 
<br style="font-family: monospace;">
834 
<span style="font-family: monospace;">device_parity&nbsp;&nbsp;&nbsp;
835 
=&nbsp; 1'b0;</span><br style="font-family: monospace;">
836 
<span style="font-family: monospace;">device_tx_data&nbsp;&nbsp;
837 
=&nbsp; 8'h00;</span><br style="font-family: monospace;">
838 
<span style="font-family: monospace;">cg.next(1);</span><br
839 
 style="font-family: monospace;">
840 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
841 
=&nbsp;
842 
1'b1;</span><br style="font-family: monospace;">
843 
<span style="font-family: monospace;">cg.next(1);</span><br
844 
 style="font-family: monospace;">
845 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
846 
=&nbsp;
847 
1'b0;</span><br style="font-family: monospace;">
848 
<br style="font-family: monospace;">
849 
<br style="font-family: monospace;">
850 
<br style="font-family: monospace;">
851 
<br style="font-family: monospace;">
852 
<span style="font-family: monospace;">while (device_rx_read == 1'b0 )
853 
cg.next(1);</span><br style="font-family: monospace;">
854 
<span style="font-family: monospace;">cg.next(2000);</span><br
855 
 style="font-family: monospace;">
856 
<br style="font-family: monospace;">
857 
<span style="font-family: monospace;">device_parity&nbsp;&nbsp;&nbsp;
858 
=&nbsp; 1'b0;</span><br style="font-family: monospace;">
859 
<span style="font-family: monospace;">device_tx_data&nbsp;&nbsp;
860 
=&nbsp; 8'hfa;</span><br style="font-family: monospace;">
861 
<span style="font-family: monospace;">cg.next(1);</span><br
862 
 style="font-family: monospace;">
863 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
864 
=&nbsp;
865 
1'b1;</span><br style="font-family: monospace;">
866 
<span style="font-family: monospace;">cg.next(1);</span><br
867 
 style="font-family: monospace;">
868 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
869 
=&nbsp;
870 
1'b0;</span><br style="font-family: monospace;">
871 
<br style="font-family: monospace;">
872 
<br style="font-family: monospace;">
873 
<br style="font-family: monospace;">
874 
<br style="font-family: monospace;">
875 
<span style="font-family: monospace;">while (device_rx_read == 1'b0 )
876 
cg.next(1);</span><br style="font-family: monospace;">
877 
<span style="font-family: monospace;">cg.next(2000);</span><br
878 
 style="font-family: monospace;">
879 
<br style="font-family: monospace;">
880 
<span style="font-family: monospace;">device_parity&nbsp;&nbsp;&nbsp;
881 
=&nbsp; 1'b0;</span><br style="font-family: monospace;">
882 
<span style="font-family: monospace;">device_tx_data&nbsp;&nbsp;
883 
=&nbsp; 8'hfa;</span><br style="font-family: monospace;">
884 
<span style="font-family: monospace;">cg.next(1);</span><br
885 
 style="font-family: monospace;">
886 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
887 
=&nbsp;
888 
1'b1;</span><br style="font-family: monospace;">
889 
<span style="font-family: monospace;">cg.next(1);</span><br
890 
 style="font-family: monospace;">
891 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
892 
=&nbsp;
893 
1'b0;</span><br style="font-family: monospace;">
894 
<br style="font-family: monospace;">
895 
<br style="font-family: monospace;">
896 
<br style="font-family: monospace;">
897 
<br style="font-family: monospace;">
898 
<span style="font-family: monospace;">while (device_rx_read == 1'b0 )
899 
cg.next(1);</span><br style="font-family: monospace;">
900 
<span style="font-family: monospace;">cg.next(2000);</span><br
901 
 style="font-family: monospace;">
902 
<br style="font-family: monospace;">
903 
<span style="font-family: monospace;">device_parity&nbsp;&nbsp;&nbsp;
904 
=&nbsp; 1'b0;</span><br style="font-family: monospace;">
905 
<span style="font-family: monospace;">device_tx_data&nbsp;&nbsp;
906 
=&nbsp; 8'hfa;</span><br style="font-family: monospace;">
907 
<span style="font-family: monospace;">cg.next(1);</span><br
908 
 style="font-family: monospace;">
909 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
910 
=&nbsp;
911 
1'b1;</span><br style="font-family: monospace;">
912 
<span style="font-family: monospace;">cg.next(1);</span><br
913 
 style="font-family: monospace;">
914 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
915 
=&nbsp;
916 
1'b0;</span><br style="font-family: monospace;">
917 
<br style="font-family: monospace;">
918 
<br style="font-family: monospace;">
919 
<br style="font-family: monospace;">
920 
<br style="font-family: monospace;">
921 
<span style="font-family: monospace;">while (device_rx_read == 1'b0 )
922 
cg.next(1);</span><br style="font-family: monospace;">
923 
<span style="font-family: monospace;">cg.next(2000);</span><br
924 
 style="font-family: monospace;">
925 
<br style="font-family: monospace;">
926 
<span style="font-family: monospace;">device_parity&nbsp;&nbsp;&nbsp;
927 
=&nbsp; 1'b0;</span><br style="font-family: monospace;">
928 
<span style="font-family: monospace;">device_tx_data&nbsp;&nbsp;
929 
=&nbsp; 8'hfa;</span><br style="font-family: monospace;">
930 
<span style="font-family: monospace;">cg.next(1);</span><br
931 
 style="font-family: monospace;">
932 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
933 
=&nbsp;
934 
1'b1;</span><br style="font-family: monospace;">
935 
<span style="font-family: monospace;">cg.next(1);</span><br
936 
 style="font-family: monospace;">
937 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
938 
=&nbsp;
939 
1'b0;</span><br style="font-family: monospace;">
940 
<br style="font-family: monospace;">
941 
<br style="font-family: monospace;">
942 
<br style="font-family: monospace;">
943 
<span style="font-family: monospace;">while (device_rx_read == 1'b0 )
944 
cg.next(1);</span><br style="font-family: monospace;">
945 
<span style="font-family: monospace;">cg.next(2000);</span><br
946 
 style="font-family: monospace;">
947 
<br style="font-family: monospace;">
948 
<span style="font-family: monospace;">device_parity&nbsp;&nbsp;&nbsp;
949 
=&nbsp; 1'b0;</span><br style="font-family: monospace;">
950 
<span style="font-family: monospace;">device_tx_data&nbsp;&nbsp;
951 
=&nbsp; 8'hfa;</span><br style="font-family: monospace;">
952 
<span style="font-family: monospace;">cg.next(1);</span><br
953 
 style="font-family: monospace;">
954 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
955 
=&nbsp;
956 
1'b1;</span><br style="font-family: monospace;">
957 
<span style="font-family: monospace;">cg.next(1);</span><br
958 
 style="font-family: monospace;">
959 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
960 
=&nbsp;
961 
1'b0;</span><br style="font-family: monospace;">
962 
<br style="font-family: monospace;">
963 
<br style="font-family: monospace;">
964 
<br style="font-family: monospace;">
965 
<span style="font-family: monospace;">while (device_rx_read == 1'b0 )
966 
cg.next(1);</span><br style="font-family: monospace;">
967 
<span style="font-family: monospace;">cg.next(2000);</span><br
968 
 style="font-family: monospace;">
969 
<br style="font-family: monospace;">
970 
<span style="font-family: monospace;">device_parity&nbsp;&nbsp;&nbsp;
971 
=&nbsp; 1'b0;</span><br style="font-family: monospace;">
972 
<span style="font-family: monospace;">device_tx_data&nbsp;&nbsp;
973 
=&nbsp; 8'hfa;</span><br style="font-family: monospace;">
974 
<span style="font-family: monospace;">cg.next(1);</span><br
975 
 style="font-family: monospace;">
976 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
977 
=&nbsp;
978 
1'b1;</span><br style="font-family: monospace;">
979 
<span style="font-family: monospace;">cg.next(1);</span><br
980 
 style="font-family: monospace;">
981 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
982 
=&nbsp;
983 
1'b0;</span><br style="font-family: monospace;">
984 
<br style="font-family: monospace;">
985 
<br style="font-family: monospace;">
986 
<br style="font-family: monospace;">
987 
<span style="font-family: monospace;">while (device_rx_read == 1'b0 )
988 
cg.next(1);</span><br style="font-family: monospace;">
989 
<span style="font-family: monospace;">cg.next(2000);</span><br
990 
 style="font-family: monospace;">
991 
<br style="font-family: monospace;">
992 
<span style="font-family: monospace;">device_parity&nbsp;&nbsp;&nbsp;
993 
=&nbsp; 1'b0;</span><br style="font-family: monospace;">
994 
<span style="font-family: monospace;">device_tx_data&nbsp;&nbsp;
995 
=&nbsp; 8'hfa;</span><br style="font-family: monospace;">
996 
<span style="font-family: monospace;">cg.next(1);</span><br
997 
 style="font-family: monospace;">
998 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
999 
=&nbsp;
1000 
1'b1;</span><br style="font-family: monospace;">
1001 
<span style="font-family: monospace;">cg.next(1);</span><br
1002 
 style="font-family: monospace;">
1003 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
1004 
=&nbsp;
1005 
1'b0;</span><br style="font-family: monospace;">
1006 
<br style="font-family: monospace;">
1007 
<br style="font-family: monospace;">
1008 
<br style="font-family: monospace;">
1009 
<br style="font-family: monospace;">
1010 
<br style="font-family: monospace;">
1011 
<span style="font-family: monospace;">cg.next(20000);</span><br
1012 
 style="font-family: monospace;">
1013 
<br style="font-family: monospace;">
1014 
<span style="font-family: monospace;">device_parity&nbsp;&nbsp;&nbsp;
1015 
=&nbsp; 1'b0;</span><br style="font-family: monospace;">
1016 
<span style="font-family: monospace;">device_tx_data&nbsp;&nbsp;
1017 
=&nbsp; 8'h03;</span><br style="font-family: monospace;">
1018 
<span style="font-family: monospace;">cg.next(1);</span><br
1019 
 style="font-family: monospace;">
1020 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
1021 
=&nbsp;
1022 
1'b1;</span><br style="font-family: monospace;">
1023 
<span style="font-family: monospace;">cg.next(1);</span><br
1024 
 style="font-family: monospace;">
1025 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
1026 
=&nbsp;
1027 
1'b0;</span><br style="font-family: monospace;">
1028 
<br style="font-family: monospace;">
1029 
<br style="font-family: monospace;">
1030 
<br style="font-family: monospace;">
1031 
<br style="font-family: monospace;">
1032 
<br style="font-family: monospace;">
1033 
<span style="font-family: monospace;">while (device_rx_read == 1'b0 )
1034 
cg.next(1);</span><br style="font-family: monospace;">
1035 
<span style="font-family: monospace;">cg.next(2000);</span><br
1036 
 style="font-family: monospace;">
1037 
<br style="font-family: monospace;">
1038 
<span style="font-family: monospace;">device_parity&nbsp;&nbsp;&nbsp;
1039 
=&nbsp; 1'b0;</span><br style="font-family: monospace;">
1040 
<span style="font-family: monospace;">device_tx_data&nbsp;&nbsp;
1041 
=&nbsp; 8'hfa;</span><br style="font-family: monospace;">
1042 
<span style="font-family: monospace;">cg.next(1);</span><br
1043 
 style="font-family: monospace;">
1044 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
1045 
=&nbsp;
1046 
1'b1;</span><br style="font-family: monospace;">
1047 
<span style="font-family: monospace;">cg.next(1);</span><br
1048 
 style="font-family: monospace;">
1049 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
1050 
=&nbsp;
1051 
1'b0;</span><br style="font-family: monospace;">
1052 
<br style="font-family: monospace;">
1053 
<br style="font-family: monospace;">
1054 
<br style="font-family: monospace;">
1055 
<span style="font-family: monospace;">while (device_rx_read == 1'b0 )
1056 
cg.next(1);</span><br style="font-family: monospace;">
1057 
<span style="font-family: monospace;">cg.next(2000);</span><br
1058 
 style="font-family: monospace;">
1059 
<br style="font-family: monospace;">
1060 
<span style="font-family: monospace;">device_parity&nbsp;&nbsp;&nbsp;
1061 
=&nbsp; 1'b0;</span><br style="font-family: monospace;">
1062 
<span style="font-family: monospace;">device_tx_data&nbsp;&nbsp;
1063 
=&nbsp; 8'hfa;</span><br style="font-family: monospace;">
1064 
<span style="font-family: monospace;">cg.next(1);</span><br
1065 
 style="font-family: monospace;">
1066 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
1067 
=&nbsp;
1068 
1'b1;</span><br style="font-family: monospace;">
1069 
<span style="font-family: monospace;">cg.next(1);</span><br
1070 
 style="font-family: monospace;">
1071 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
1072 
=&nbsp;
1073 
1'b0;</span><br style="font-family: monospace;">
1074 
<br style="font-family: monospace;">
1075 
<br style="font-family: monospace;">
1076 
<br style="font-family: monospace;">
1077 
<br style="font-family: monospace;">
1078 
<span style="font-family: monospace;">while (device_rx_read == 1'b0 )
1079 
cg.next(1);</span><br style="font-family: monospace;">
1080 
<span style="font-family: monospace;">cg.next(2000);</span><br
1081 
 style="font-family: monospace;">
1082 
<br style="font-family: monospace;">
1083 
<span style="font-family: monospace;">device_parity&nbsp;&nbsp;&nbsp;
1084 
=&nbsp; 1'b0;</span><br style="font-family: monospace;">
1085 
<span style="font-family: monospace;">device_tx_data&nbsp;&nbsp;
1086 
=&nbsp; 8'hfa;</span><br style="font-family: monospace;">
1087 
<span style="font-family: monospace;">cg.next(1);</span><br
1088 
 style="font-family: monospace;">
1089 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
1090 
=&nbsp;
1091 
1'b1;</span><br style="font-family: monospace;">
1092 
<span style="font-family: monospace;">cg.next(1);</span><br
1093 
 style="font-family: monospace;">
1094 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
1095 
=&nbsp;
1096 
1'b0;</span><br style="font-family: monospace;">
1097 
<br style="font-family: monospace;">
1098 
<br style="font-family: monospace;">
1099 
<br style="font-family: monospace;">
1100 
<span style="font-family: monospace;">while (device_rx_read == 1'b0 )
1101 
cg.next(1);</span><br style="font-family: monospace;">
1102 
<span style="font-family: monospace;">cg.next(2000);</span><br
1103 
 style="font-family: monospace;">
1104 
<br style="font-family: monospace;">
1105 
<span style="font-family: monospace;">device_parity&nbsp;&nbsp;&nbsp;
1106 
=&nbsp; 1'b0;</span><br style="font-family: monospace;">
1107 
<span style="font-family: monospace;">device_tx_data&nbsp;&nbsp;
1108 
=&nbsp; 8'hfa;</span><br style="font-family: monospace;">
1109 
<span style="font-family: monospace;">cg.next(1);</span><br
1110 
 style="font-family: monospace;">
1111 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
1112 
=&nbsp;
1113 
1'b1;</span><br style="font-family: monospace;">
1114 
<span style="font-family: monospace;">cg.next(1);</span><br
1115 
 style="font-family: monospace;">
1116 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
1117 
=&nbsp;
1118 
1'b0;</span><br style="font-family: monospace;">
1119 
<br style="font-family: monospace;">
1120 
<br style="font-family: monospace;">
1121 
<br style="font-family: monospace;">
1122 
<br style="font-family: monospace;">
1123 
<span style="font-family: monospace;">while (device_rx_read == 1'b0 )
1124 
cg.next(1);</span><br style="font-family: monospace;">
1125 
<span style="font-family: monospace;">cg.next(2000);</span><br
1126 
 style="font-family: monospace;">
1127 
<br style="font-family: monospace;">
1128 
<span style="font-family: monospace;">device_parity&nbsp;&nbsp;&nbsp;
1129 
=&nbsp; 1'b0;</span><br style="font-family: monospace;">
1130 
<span style="font-family: monospace;">device_tx_data&nbsp;&nbsp;
1131 
=&nbsp; 8'hfa;</span><br style="font-family: monospace;">
1132 
<span style="font-family: monospace;">cg.next(1);</span><br
1133 
 style="font-family: monospace;">
1134 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
1135 
=&nbsp;
1136 
1'b1;</span><br style="font-family: monospace;">
1137 
<span style="font-family: monospace;">cg.next(1);</span><br
1138 
 style="font-family: monospace;">
1139 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
1140 
=&nbsp;
1141 
1'b0;</span><br style="font-family: monospace;">
1142 
<br style="font-family: monospace;">
1143 
<br style="font-family: monospace;">
1144 
<br style="font-family: monospace;">
1145 
<br style="font-family: monospace;">
1146 
<br style="font-family: monospace;">
1147 
<br style="font-family: monospace;">
1148 
<span style="font-family: monospace;">cg.next(20000);</span><br
1149 
 style="font-family: monospace;">
1150 
<br style="font-family: monospace;">
1151 
<span style="font-family: monospace;">device_parity&nbsp;&nbsp;&nbsp;
1152 
=&nbsp; 1'b0;</span><br style="font-family: monospace;">
1153 
<span style="font-family: monospace;">device_tx_data&nbsp;&nbsp;
1154 
=&nbsp; 8'h12;</span><br style="font-family: monospace;">
1155 
<span style="font-family: monospace;">cg.next(1);</span><br
1156 
 style="font-family: monospace;">
1157 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
1158 
=&nbsp;
1159 
1'b1;</span><br style="font-family: monospace;">
1160 
<span style="font-family: monospace;">cg.next(1);</span><br
1161 
 style="font-family: monospace;">
1162 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
1163 
=&nbsp;
1164 
1'b0;</span><br style="font-family: monospace;">
1165 
<br style="font-family: monospace;">
1166 
<br style="font-family: monospace;">
1167 
<br style="font-family: monospace;">
1168 
<span style="font-family: monospace;">cg.next(20000);</span><br
1169 
 style="font-family: monospace;">
1170 
<br style="font-family: monospace;">
1171 
<span style="font-family: monospace;">device_parity&nbsp;&nbsp;&nbsp;
1172 
=&nbsp; 1'b1;</span><br style="font-family: monospace;">
1173 
<span style="font-family: monospace;">device_tx_data&nbsp;&nbsp;
1174 
=&nbsp; 8'h34;</span><br style="font-family: monospace;">
1175 
<span style="font-family: monospace;">cg.next(1);</span><br
1176 
 style="font-family: monospace;">
1177 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
1178 
=&nbsp;
1179 
1'b1;</span><br style="font-family: monospace;">
1180 
<span style="font-family: monospace;">cg.next(1);</span><br
1181 
 style="font-family: monospace;">
1182 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
1183 
=&nbsp;
1184 
1'b0;</span><br style="font-family: monospace;">
1185 
<br style="font-family: monospace;">
1186 
<br style="font-family: monospace;">
1187 
<br style="font-family: monospace;">
1188 
<span style="font-family: monospace;">cg.next(20000);</span><br
1189 
 style="font-family: monospace;">
1190 
<br style="font-family: monospace;">
1191 
<span style="font-family: monospace;">device_parity&nbsp;&nbsp;&nbsp;
1192 
=&nbsp; 1'b0;</span><br style="font-family: monospace;">
1193 
<span style="font-family: monospace;">device_tx_data&nbsp;&nbsp;
1194 
=&nbsp; 8'h56;</span><br style="font-family: monospace;">
1195 
<span style="font-family: monospace;">cg.next(1);</span><br
1196 
 style="font-family: monospace;">
1197 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
1198 
=&nbsp;
1199 
1'b1;</span><br style="font-family: monospace;">
1200 
<span style="font-family: monospace;">cg.next(1);</span><br
1201 
 style="font-family: monospace;">
1202 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
1203 
=&nbsp;
1204 
1'b0;</span><br style="font-family: monospace;">
1205 
<br style="font-family: monospace;">
1206 
<br style="font-family: monospace;">
1207 
<br style="font-family: monospace;">
1208 
<br style="font-family: monospace;">
1209 
<br style="font-family: monospace;">
1210 
<br style="font-family: monospace;">
1211 
<br style="font-family: monospace;">
1212 
<br style="font-family: monospace;">
1213 
<span style="font-family: monospace;">cg.next(20000);</span><br
1214 
 style="font-family: monospace;">
1215 
<br style="font-family: monospace;">
1216 
<span style="font-family: monospace;">device_parity&nbsp;&nbsp;&nbsp;
1217 
=&nbsp; 1'b0;</span><br style="font-family: monospace;">
1218 
<span style="font-family: monospace;">device_tx_data&nbsp;&nbsp;
1219 
=&nbsp; 8'h78;</span><br style="font-family: monospace;">
1220 
<span style="font-family: monospace;">cg.next(1);</span><br
1221 
 style="font-family: monospace;">
1222 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
1223 
=&nbsp;
1224 
1'b1;</span><br style="font-family: monospace;">
1225 
<span style="font-family: monospace;">cg.next(1);</span><br
1226 
 style="font-family: monospace;">
1227 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
1228 
=&nbsp;
1229 
1'b0;</span><br style="font-family: monospace;">
1230 
<br style="font-family: monospace;">
1231 
<br style="font-family: monospace;">
1232 
<br style="font-family: monospace;">
1233 
<span style="font-family: monospace;">cg.next(20000);</span><br
1234 
 style="font-family: monospace;">
1235 
<br style="font-family: monospace;">
1236 
<span style="font-family: monospace;">device_parity&nbsp;&nbsp;&nbsp;
1237 
=&nbsp; 1'b0;</span><br style="font-family: monospace;">
1238 
<span style="font-family: monospace;">device_tx_data&nbsp;&nbsp;
1239 
=&nbsp; 8'h9a;</span><br style="font-family: monospace;">
1240 
<span style="font-family: monospace;">cg.next(1);</span><br
1241 
 style="font-family: monospace;">
1242 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
1243 
=&nbsp;
1244 
1'b1;</span><br style="font-family: monospace;">
1245 
<span style="font-family: monospace;">cg.next(1);</span><br
1246 
 style="font-family: monospace;">
1247 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
1248 
=&nbsp;
1249 
1'b0;</span><br style="font-family: monospace;">
1250 
<br style="font-family: monospace;">
1251 
<br style="font-family: monospace;">
1252 
<br style="font-family: monospace;">
1253 
<span style="font-family: monospace;">cg.next(20000);</span><br
1254 
 style="font-family: monospace;">
1255 
<br style="font-family: monospace;">
1256 
<span style="font-family: monospace;">device_parity&nbsp;&nbsp;&nbsp;
1257 
=&nbsp; 1'b1;</span><br style="font-family: monospace;">
1258 
<span style="font-family: monospace;">device_tx_data&nbsp;&nbsp;
1259 
=&nbsp; 8'hbc;</span><br style="font-family: monospace;">
1260 
<span style="font-family: monospace;">cg.next(1);</span><br
1261 
 style="font-family: monospace;">
1262 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
1263 
=&nbsp;
1264 
1'b1;</span><br style="font-family: monospace;">
1265 
<span style="font-family: monospace;">cg.next(1);</span><br
1266 
 style="font-family: monospace;">
1267 
<span style="font-family: monospace;">device_write&nbsp;&nbsp;&nbsp;&nbsp;
1268 
=&nbsp;
1269 
1'b0;</span><br style="font-family: monospace;">
1270 
<br style="font-family: monospace;">
1271 
<br style="font-family: monospace;">
1272 
<br style="font-family: monospace;">
1273 
<br style="font-family: monospace;">
1274 
<br style="font-family: monospace;">
1275 
<br style="font-family: monospace;">
1276 
<span style="font-family: monospace;">cg.next(20000);</span><br
1277 
 style="font-family: monospace;">
1278 
<br style="font-family: monospace;">
1279 
<br style="font-family: monospace;">
1280 
<br style="font-family: monospace;">
1281 
<span style="font-family: monospace;">$display("%t&nbsp;&nbsp;&nbsp;
1282 
Test&nbsp; PASSED",$realtime);</span><br style="font-family: monospace;">
1283 
<span style="font-family: monospace;">$finish;</span><br
1284 
 style="font-family: monospace;">
1285 
<span style="font-family: monospace;">end</span><br
1286 
 style="font-family: monospace;">
1287 
<br style="font-family: monospace;">
1288 
<br>
1289 
</p>
1290 
<p><br>
1291 
</p>
1292 
<p><br>
1293 
<span style="font-family: monospace;">--------------------------------------------------------------------------------------------------------------------------------------</span><br>
1294 
</p>
1295 
<p><br>
1296 
</p>
1297 
<h2><a name="manifesto"></a>dmp_define<br>
1298 
</h2>
1299 
<p style="font-family: monospace;">--------------------------------------------------------------------------------------------------------------------------------------<br>
1300 
</p>
1301 
<p style="font-family: monospace;">$dumpfile ("TestBench.vcd");<br>
1302 
$dumpvars (0, TB);<br>
1303 
--------------------------------------------------------------------------------------------------------------------------------------<br>
1304 
<br>
1305 
</p>
1306 
<p><br>
1307 
<br>
1308 
</p>
1309 
<p><br>
1310 
<br>
1311 
</p>
1312 
<p><br>
1313 
<br>
1314 
</p>
1315 
<p><br>
1316 
</p>
1317 
<p><br>
1318 
</p>
1319 
<p><br>
1320 
</p>
1321 
<p>This is a test<br>
1322 
</p>
1323 
<p><br>
1324 
&nbsp;<br>
1325 
</p>
1326 
<p><br>
1327 
<br>
1328 
</p>
1329 
<p><br>
1330 
<br>
1331 
</p>
1332 
<p><br>
1333 
<br>
1334 
</p>
1335 
<p><br>
1336 
<br>
1337 
</p>
1338 
<p><br>
1339 
<br>
1340 
</p>
1341 
</body>
1342 
</html>

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.