OpenCores
URL https://opencores.org/ocsvn/socgen/socgen/trunk

Subversion Repositories socgen

[/] [socgen/] [trunk/] [tools/] [simulation/] [build_icarus_filelists] - Blame information for rev 131

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 125 jt_eaton
eval 'exec `which perl` -S $0 ${1+"$@"}'
2
   if 0;
3
 
4
#/**********************************************************************/
5
#/*                                                                    */
6
#/*             -------                                                */
7
#/*            /   SOC  \                                              */
8
#/*           /    GEN   \                                             */
9
#/*          /    TOOL    \                                            */
10
#/*          ==============                                            */
11
#/*          |            |                                            */
12
#/*          |____________|                                            */
13
#/*                                                                    */
14
#/*                                                                    */
15
#/*                                                                    */
16
#/*  Author(s):                                                        */
17
#/*      - John Eaton, jt_eaton@opencores.org                          */
18
#/*                                                                    */
19
#/**********************************************************************/
20
#/*                                                                    */
21
#/*    Copyright (C) <2010-2011>                */
22
#/*                                                                    */
23
#/*  This source file may be used and distributed without              */
24
#/*  restriction provided that this copyright statement is not         */
25
#/*  removed from the file and that any derivative work contains       */
26
#/*  the original copyright notice and the associated disclaimer.      */
27
#/*                                                                    */
28
#/*  This source file is free software; you can redistribute it        */
29
#/*  and/or modify it under the terms of the GNU Lesser General        */
30
#/*  Public License as published by the Free Software Foundation;      */
31
#/*  either version 2.1 of the License, or (at your option) any        */
32
#/*  later version.                                                    */
33
#/*                                                                    */
34
#/*  This source is distributed in the hope that it will be            */
35
#/*  useful, but WITHOUT ANY WARRANTY; without even the implied        */
36
#/*  warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR           */
37
#/*  PURPOSE.  See the GNU Lesser General Public License for more      */
38
#/*  details.                                                          */
39
#/*                                                                    */
40
#/*  You should have received a copy of the GNU Lesser General         */
41
#/*  Public License along with this source; if not, download it        */
42
#/*  from http://www.opencores.org/lgpl.shtml                          */
43
#/*                                                                    */
44
#/**********************************************************************/
45
 
46
 
47
 
48
 
49
############################################################################
50
# General PERL config
51
############################################################################
52
use Getopt::Long;
53
use English;
54
use File::Basename;
55
use Cwd;
56
use XML::LibXML;
57
use lib './tools';
58
use sys::lib;
59
use yp::lib;
60
 
61
$OUTPUT_AUTOFLUSH = 1; # set autoflush of stdout to TRUE.
62
 
63
 
64
############################################################################
65
### Process the options
66
############################################################################
67
Getopt::Long::config("require_order", "prefix=-");
68
GetOptions("h","help",
69
           "work_site=s" => \$work_site,
70
           "vendor=s" => \$vendor,
71 131 jt_eaton
           "library=s" => \$library,
72 125 jt_eaton
           "component=s" => \$component,
73
           "version=s" => \$version
74
) || die "(use '$program_name -h' for help)";
75
 
76
 
77
 
78
##############################################################################
79
## Help option
80
##############################################################################
81
if ( $opt_h  or $opt_help)
82 131 jt_eaton
  { print "\n build_icarus_filelists -work_site /work  -vendor vendor_name  -library library_name  -component component_name   ";
83 125 jt_eaton
    print "\n";
84
    exit 1;
85
  }
86
 
87
 
88
##############################################################################
89
##
90
##############################################################################
91
 
92
 
93
 
94
$home = cwd();
95
 
96
my $variant = "";
97
if($version) {$variant = "${component}_${version}"}
98
else         {$variant = "${component}"}
99
 
100
#############################################################################
101
##
102
##
103
#############################################################################
104
 
105
my $parser = XML::LibXML->new();
106
 
107
 
108
 
109
#/*********************************************************************************************/
110
#/                                                                                            */
111
#/  Create filelists for simulation, code coverage                                            */
112
#/                                                                                            */
113
#/                                                                                            */
114
#/*********************************************************************************************/
115
 
116
@filelist_sim = (  );
117
 
118
 
119
 
120
 
121
 
122
 
123
 
124
 
125
#############################################################################
126
##
127
##
128
#############################################################################
129
 
130 131 jt_eaton
print "Building SIM filelists for  $work_site  $vendor $library   $component $version $variant \n" ;
131 130 jt_eaton
my $sim_library_path ;
132 131 jt_eaton
my $spirit_component_file    = $parser->parse_file(yp::lib::find_ipxact_component($vendor,$library,$component,$version));
133
my $socgen_file               = $parser->parse_file(yp::lib::find_componentConfiguration($vendor,$library,$component));
134
my $lib_comp_sep             = yp::lib::find_lib_comp_sep($vendor,$library,$component);
135 125 jt_eaton
 
136 130 jt_eaton
my $sim_comp_path            = $socgen_file->findnodes("//socgen:componentConfiguration/socgen:sim/socgen:comp_path/text()")->to_literal;
137 125 jt_eaton
 
138 130 jt_eaton
if ($sim_comp_path)
139
{
140
$sim_library_path            ="${lib_comp_sep}${sim_comp_path}";
141
}
142
else
143
{
144
$sim_library_path            = $socgen_file->findnodes("//socgen:componentConfiguration/socgen:sim/socgen:library_path/text()")->to_literal;
145
}
146 125 jt_eaton
 
147
 
148
#/*********************************************************************************************/
149
#/                                                                                            */
150
#/                                                                                            */
151
#/  Read each variants parameters and defaults into an array and their order into an array    */
152
#/  order must be preservered so that parameters can use the values of other parameters       */
153
#/                                                                                            */
154
#/*********************************************************************************************/
155
 
156
my %default_parameters = ();
157
my @parameter_order    = ();
158
 
159
 
160 130 jt_eaton
foreach  my   $i_name ($socgen_file->findnodes("//socgen:configurations/socgen:configuration[socgen:name/text() = '$variant']/socgen:parameters/socgen:parameter"))
161 125 jt_eaton
      {
162
      my($parameter_name)     = $i_name ->findnodes('socgen:name/text()')->to_literal ;
163
      my($parameter_default)  = $i_name ->findnodes('socgen:value/text()')->to_literal ;
164
      $default_parameters{$parameter_name}  = $parameter_default;
165
      push  @parameter_order ,$parameter_name ;
166
      }
167
 
168
 
169
 
170
 
171
 
172
 
173
 
174
 
175
 
176
foreach my $comp ($spirit_component_file->findnodes('//spirit:component'))
177
   {
178
   my($vendor)   = $comp->findnodes('./spirit:vendor/text()')->to_literal ;
179
   my($library)  = $comp->findnodes('./spirit:library/text()')->to_literal ;
180
   my($name)     = $comp->findnodes('./spirit:name/text()')->to_literal ;
181
   my($version)  = $comp->findnodes('./spirit:version/text()')->to_literal ;
182
   my $variant = "";
183
   if($version) {$variant = "${name}_${version}"}
184
   else         {$variant = "${name}"}
185 131 jt_eaton
   print "rtl/gen directories  for    $library - $component         VLNV        $vendor - $library -  $name -  $variant \n";
186 126 jt_eaton
   $module_name = yp::lib::get_module_name($vendor,$library,$name,$version);
187 125 jt_eaton
   }
188
 
189
 
190 131 jt_eaton
   print "CREATING componentRef filelists for   $library   $component  $name $variant \n";
191 125 jt_eaton
 
192
 
193
   #/*********************************************************************************************/
194
   #/                                                                                            */
195
   #/                                                                                            */
196
   #/                                                                                            */
197
   #/                                                                                            */
198
   #/                                                                                            */
199
   #/                                                                                            */
200
   #/*********************************************************************************************/
201
 
202
 
203 130 jt_eaton
foreach  my   $i_name ($socgen_file->findnodes("//socgen:testbench[socgen:variant/text() = '$variant']/socgen:code_coverage"))
204 125 jt_eaton
   {
205
 
206 131 jt_eaton
   my $path ="${home}${work_site}/${vendor}__${library}${sim_library_path}/cov";
207 125 jt_eaton
   mkdir $path,0755          unless( -e $path );
208 131 jt_eaton
   $path ="${home}${work_site}/${vendor}__${library}${sim_library_path}/cov/${variant}";
209 125 jt_eaton
   mkdir $path,0755          unless( -e $path );
210
 
211 128 jt_eaton
 
212 131 jt_eaton
   my $outfile ="${home}${work_site}/${vendor}__${library}${sim_library_path}/cov/${variant}/TestBench";
213 125 jt_eaton
   open  DUTFILE,">$outfile" or die "unable to open $outfile";
214
   print  DUTFILE  "`timescale    1ns/1ns   \n";
215
   print  DUTFILE  " module TB();   \n";
216 128 jt_eaton
 
217
      print DUTFILE  "     $module_name   \n";
218
      my $first =1;
219
      foreach  my  $parameter_name  (@parameter_order)
220
         {
221
         my($parameter_default)  =    $default_parameters{$parameter_name};
222
         if($first)
223
           {
224
           print DUTFILE  "   #(  .${parameter_name}(${parameter_default})";
225
           $first = 0;
226
           }
227
         else
228
           {
229
           print DUTFILE  ",\n       .${parameter_name}(${parameter_default})";
230
           }
231
         }
232
         if($first)
233
           {
234
           print DUTFILE  "  test \n (); \n\n\n\n";
235
           }
236
          else
237
           {
238
           print DUTFILE  ") test \n (); \n\n\n\n";
239
           }
240
 
241
 
242 125 jt_eaton
   print  DUTFILE  " endmodule   \n";
243 128 jt_eaton
 
244
 
245
 
246
 
247
 
248
 
249
 
250
 
251
 
252
 
253
 
254
 
255 125 jt_eaton
   }
256
 
257
 
258
 
259
   #/*********************************************************************************************/
260
   #/                                                                                            */
261
   #/ Make simulation file set                                                                   */
262
   #/                                                                                            */
263
   #/                                                                                            */
264
   #/                                                                                            */
265
   #/                                                                                            */
266
   #/*********************************************************************************************/
267
 
268 131 jt_eaton
   print "CREATING sim files for   $library  $component   $chip   $name  $variant \n";
269 125 jt_eaton
 
270
 
271
 
272
 
273
 
274
 
275 130 jt_eaton
    foreach  my   $i_name ($socgen_file->findnodes("//socgen:componentConfiguration/socgen:sim/socgen:icarus/socgen:test[socgen:variant/text() = '$variant']"))
276 125 jt_eaton
      {
277
      my($simulation)      = $i_name ->findnodes('socgen:name/text()')->to_literal ;
278
      my($configuration)   = $i_name ->findnodes('socgen:configuration/text()')->to_literal ;
279 131 jt_eaton
      print " sim files for   $library  $component   $variant  $simulation $configuration          \n";
280 125 jt_eaton
 
281
 
282 131 jt_eaton
      my $outfile ="${home}${work_site}/${vendor}__${library}${sim_library_path}/icarus/${simulation}/Makefile";
283 125 jt_eaton
      open  MAKSIMFILE,">$outfile" or die "unable to open $outfile";
284
 
285
 
286 131 jt_eaton
      my $outfile ="${home}${work_site}/${vendor}__${library}${sim_library_path}/icarus/${simulation}/TestBench";
287 125 jt_eaton
      open SIM_PARM_FILE,">$outfile" or die "unable to open $outfile";
288
 
289 128 jt_eaton
      print MAKSIMFILE  "include ${home}/tools/bin/Makefile.root\n";
290 125 jt_eaton
      print MAKSIMFILE  "comp=${variant}\n";
291
      print MAKSIMFILE  "test=${simulation}\n";
292 128 jt_eaton
      print MAKSIMFILE  "simulator=icarus\n";
293 125 jt_eaton
 
294
 
295
 
296
 
297
 
298
      my %local_parameters =  %default_parameters;
299
      my @local_order      =  @parameter_order;
300
 
301
 
302
 
303 130 jt_eaton
      foreach  my   $i_name ($socgen_file->findnodes("//socgen:componentConfiguration/socgen:sim/socgen:testbenches/socgen:testbench[socgen:variant/text() = '$variant']/./socgen:parameters/socgen:parameter/socgen:name"))
304 125 jt_eaton
         {
305
         my($par_name)   = $i_name ->findnodes('./text()')->to_literal ;
306
         my($par_value)  = $i_name ->findnodes('../socgen:value/text()')->to_literal ;
307
         if  ( $local_parameters{$par_name} eq '' )  { push @local_order , $par_name; }
308
         $local_parameters{$par_name} = $par_value;
309
         }
310
 
311
 
312
 
313 130 jt_eaton
      foreach  my   $i_name ($socgen_file->findnodes("//socgen:configurations/socgen:configuration[socgen:name/text() = '$configuration']/./socgen:parameters/socgen:parameter/socgen:name"))
314 125 jt_eaton
         {
315
         my($par_name)   = $i_name ->findnodes('./text()')->to_literal ;
316
         my($par_value)  = $i_name ->findnodes('../socgen:value/text()')->to_literal ;
317
         if($local_parameters{$par_name} eq '' )  { push @local_order , $par_name; }
318
         $local_parameters{$par_name} = $par_value;
319
         }
320
 
321
 
322
 
323 130 jt_eaton
      foreach  my   $i_name ($socgen_file->findnodes("//socgen:componentConfiguration/socgen:sim/socgen:icarus/socgen:test[socgen:name/text() = '$simulation']/./socgen:parameters/socgen:parameter/socgen:name"))
324 125 jt_eaton
         {
325
         my($par_name)   = $i_name ->findnodes('./text()')->to_literal ;
326
         my($par_value)  = $i_name ->findnodes('../socgen:value/text()')->to_literal ;
327
         if  ( $local_parameters{$par_name} eq '' )  { push @local_order , $par_name; }
328
         $local_parameters{$par_name} = $par_value;
329
         }
330
 
331
 
332
 
333
 
334
 
335
 
336
 
337
 
338
 
339 131 jt_eaton
      print SIM_PARM_FILE  "//  Testbench  for  $library    $component    $variant   $configuration    $simulation\n";
340 125 jt_eaton
      print SIM_PARM_FILE  "`ifndef     TIMESCALE                                \n";
341
      print SIM_PARM_FILE  "`define     TIMESCALE   1ns/1ns                                \n";
342
      print SIM_PARM_FILE  "`endif                                \n";
343
      print SIM_PARM_FILE  "                                \n";
344
      print SIM_PARM_FILE  "`ifndef     TIMEFORMAT                                \n";
345
      print SIM_PARM_FILE  "`define     TIMEFORMAT  \$timeformat(-6, 2, \" us\", 14);                                \n";
346
      print SIM_PARM_FILE  "`endif                                \n";
347
      print SIM_PARM_FILE  "                                \n";
348
      print SIM_PARM_FILE  "`timescale `TIMESCALE                                \n";
349
      print SIM_PARM_FILE  "                                \n";
350
      print SIM_PARM_FILE  "module TB();                                \n";
351
      print SIM_PARM_FILE  "                                \n";
352
      print SIM_PARM_FILE  "initial                                \n";
353
      print SIM_PARM_FILE  "begin                                \n";
354
      print SIM_PARM_FILE  "`TIMEFORMAT                                \n";
355
      print SIM_PARM_FILE  "end                                \n";
356
      print SIM_PARM_FILE  "                                \n";
357
      print SIM_PARM_FILE  "`ifdef VCD                                \n";
358
      print SIM_PARM_FILE  "initial                                \n";
359
      print SIM_PARM_FILE  " begin                                \n";
360
      print SIM_PARM_FILE  "`include \"./dmp_define\"                                \n";
361
      print SIM_PARM_FILE  " end                                \n";
362
      print SIM_PARM_FILE  "`endif                                \n";
363
      print SIM_PARM_FILE  " reg clk,START;            \n";
364
      print SIM_PARM_FILE  " wire FAIL,FINISH;                               \n";
365
      print SIM_PARM_FILE  " reg  failed;                               \n";
366
      print SIM_PARM_FILE  " reg [31:0] failcount;                               \n";
367
      print SIM_PARM_FILE  "initial                             \n";
368
      print SIM_PARM_FILE  "begin                             \n";
369
      print SIM_PARM_FILE  "clk=0;                             \n";
370
      print SIM_PARM_FILE  "START=0;                             \n";
371
      print SIM_PARM_FILE  "@ (posedge clk);                             \n";
372
      print SIM_PARM_FILE  "@ (posedge clk);                             \n";
373
      print SIM_PARM_FILE  "@ (posedge clk) ;                             \n";
374
      print SIM_PARM_FILE  "START = 1;                             \n";
375
      print SIM_PARM_FILE  "end                       \n";
376
      print SIM_PARM_FILE  "always@(posedge clk)           \n";
377
      print SIM_PARM_FILE  "if(START && FINISH)           \n";
378
      print SIM_PARM_FILE  "begin           \n";
379
      print SIM_PARM_FILE  "   if(failed)        \n";
380
      print SIM_PARM_FILE  "     begin        \n";
381
      print SIM_PARM_FILE  "     \$display(\"%t  SIM over: ERROR    %d failures\",\$realtime ,failcount );        \n";
382
      print SIM_PARM_FILE  "     end        \n";
383
      print SIM_PARM_FILE  "  else        \n";
384
      print SIM_PARM_FILE  "     begin        \n";
385
      print SIM_PARM_FILE  "     \$display(\"%t  SIM over: PASSED\",\$realtime  );        \n";
386
      print SIM_PARM_FILE  "     end // else: !if(failed)        \n";
387
      print SIM_PARM_FILE  "\$dumpflush;           \n";
388
      print SIM_PARM_FILE  "\$finish;           \n";
389
      print SIM_PARM_FILE  "end           \n";
390
      print SIM_PARM_FILE  "always@(posedge clk or negedge START)        \n";
391
      print SIM_PARM_FILE  "if(!START)        \n";
392
      print SIM_PARM_FILE  "begin        \n";
393
      print SIM_PARM_FILE  "failed <= 1\'b0;        \n";
394
      print SIM_PARM_FILE  "failcount <= 32\'h0;        \n";
395
      print SIM_PARM_FILE  "end        \n";
396
      print SIM_PARM_FILE  "else        \n";
397
      print SIM_PARM_FILE  "begin        \n";
398
      print SIM_PARM_FILE  "if(FAIL)        \n";
399
      print SIM_PARM_FILE  "begin        \n";
400
      print SIM_PARM_FILE  "failed <= 1\'b1;        \n";
401
      print SIM_PARM_FILE  "failcount <= failcount + 32\'h00000001;        \n";
402
      print SIM_PARM_FILE  "end        \n";
403
      print SIM_PARM_FILE  "else        \n";
404
      print SIM_PARM_FILE  "begin        \n";
405
      print SIM_PARM_FILE  "failed <= failed;        \n";
406
      print SIM_PARM_FILE  "failcount <= failcount;        \n";
407
      print SIM_PARM_FILE  "end        \n";
408
      print SIM_PARM_FILE  "end           \n";
409
 
410
      print SIM_PARM_FILE  "always                       \n";
411
      print SIM_PARM_FILE  " #($local_parameters{\"PERIOD\"}/2) clk = !clk;                       \n";
412
      print SIM_PARM_FILE  "`include \"./test_define\"                                \n";
413
 
414
 
415 126 jt_eaton
 
416 125 jt_eaton
      print SIM_PARM_FILE  "     $module_name   \n";
417
      my $first =1;
418
      foreach  my  $parameter_name  (@local_order)
419
         {
420
         my($parameter_default)  =    $local_parameters{$parameter_name};
421
         if($first)
422
           {
423
           print SIM_PARM_FILE  "   #(  .${parameter_name}(${parameter_default})";
424
           $first = 0;
425
           }
426
         else
427
           {
428
           print SIM_PARM_FILE  ",\n       .${parameter_name}(${parameter_default})";
429
           }
430
         }
431
      print SIM_PARM_FILE  ") test \n (.clk(clk),.START(START),.FAIL(FAIL),.FINISH(FINISH)); \n\n\n\n";
432
 
433
 
434
 
435
      print SIM_PARM_FILE  "task automatic next;           \n";
436
      print SIM_PARM_FILE  "  input [31:0] num;           \n";
437
      print SIM_PARM_FILE  "  repeat (num)       @ (posedge clk);           \n";
438
      print SIM_PARM_FILE  "endtask            \n";
439
      print SIM_PARM_FILE  "           \n";
440
      print SIM_PARM_FILE  "           \n";
441
      print SIM_PARM_FILE  "initial           \n";
442
      print SIM_PARM_FILE  "   begin           \n";
443
      print SIM_PARM_FILE  "   next($local_parameters{\"TIMEOUT\"});           \n";
444
      print SIM_PARM_FILE  "   \$display(\"%t  Sim over :ERROR    TIMEOUT\",\$realtime  );           \n";
445
      print SIM_PARM_FILE  "   @ (posedge clk)           \n";
446
      print SIM_PARM_FILE  "   \$dumpflush;                      \n";
447
      print SIM_PARM_FILE  "   \$finish;                         \n";
448
      print SIM_PARM_FILE  "   end           \n";
449
      print SIM_PARM_FILE  "            \n";
450
 
451
 
452
 
453
 
454
 
455
 
456
      print SIM_PARM_FILE  "endmodule                                \n";
457
 
458
 
459
 
460
 
461
 
462
      }
463
 
464
 
465
 
466
 
467
 
468
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.