OpenCores
URL https://opencores.org/ocsvn/socgen/socgen/trunk

Subversion Repositories socgen

[/] [socgen/] [trunk/] [tools/] [simulation/] [build_verilator_filelists] - Blame information for rev 131

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 125 jt_eaton
eval 'exec `which perl` -S $0 ${1+"$@"}'
2
   if 0;
3
 
4
#/**********************************************************************/
5
#/*                                                                    */
6
#/*             -------                                                */
7
#/*            /   SOC  \                                              */
8
#/*           /    GEN   \                                             */
9
#/*          /    TOOL    \                                            */
10
#/*          ==============                                            */
11
#/*          |            |                                            */
12
#/*          |____________|                                            */
13
#/*                                                                    */
14
#/*                                                                    */
15
#/*                                                                    */
16
#/*  Author(s):                                                        */
17
#/*      - John Eaton, jt_eaton@opencores.org                          */
18
#/*                                                                    */
19
#/**********************************************************************/
20
#/*                                                                    */
21
#/*    Copyright (C) <2010-2011>                */
22
#/*                                                                    */
23
#/*  This source file may be used and distributed without              */
24
#/*  restriction provided that this copyright statement is not         */
25
#/*  removed from the file and that any derivative work contains       */
26
#/*  the original copyright notice and the associated disclaimer.      */
27
#/*                                                                    */
28
#/*  This source file is free software; you can redistribute it        */
29
#/*  and/or modify it under the terms of the GNU Lesser General        */
30
#/*  Public License as published by the Free Software Foundation;      */
31
#/*  either version 2.1 of the License, or (at your option) any        */
32
#/*  later version.                                                    */
33
#/*                                                                    */
34
#/*  This source is distributed in the hope that it will be            */
35
#/*  useful, but WITHOUT ANY WARRANTY; without even the implied        */
36
#/*  warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR           */
37
#/*  PURPOSE.  See the GNU Lesser General Public License for more      */
38
#/*  details.                                                          */
39
#/*                                                                    */
40
#/*  You should have received a copy of the GNU Lesser General         */
41
#/*  Public License along with this source; if not, download it        */
42
#/*  from http://www.opencores.org/lgpl.shtml                          */
43
#/*                                                                    */
44
#/**********************************************************************/
45
 
46
 
47
 
48
 
49
############################################################################
50
# General PERL config
51
############################################################################
52
use Getopt::Long;
53
use English;
54
use File::Basename;
55
use Cwd;
56
use XML::LibXML;
57
use lib './tools';
58
use sys::lib;
59
use yp::lib;
60
 
61
$OUTPUT_AUTOFLUSH = 1; # set autoflush of stdout to TRUE.
62
 
63
 
64
############################################################################
65
### Process the options
66
############################################################################
67
Getopt::Long::config("require_order", "prefix=-");
68
GetOptions("h","help",
69
           "work_site=s" => \$work_site,
70
           "vendor=s" => \$vendor,
71 131 jt_eaton
           "library=s" => \$library,
72 125 jt_eaton
           "component=s" => \$component,
73
           "version=s" => \$version
74
) || die "(use '$program_name -h' for help)";
75
 
76
 
77
 
78
##############################################################################
79
## Help option
80
##############################################################################
81
if ( $opt_h  or $opt_help)
82 131 jt_eaton
  { print "\n build_verilator_filelists -work_site /work  -vendor vendor_name  -library library_name  -component component_name   ";
83 125 jt_eaton
    print "\n";
84
    exit 1;
85
  }
86
 
87
 
88
##############################################################################
89
##
90
##############################################################################
91
 
92
 
93
 
94
$home = cwd();
95
 
96
my $variant = "";
97
if($version) {$variant = "${component}_${version}"}
98
else         {$variant = "${component}"}
99
 
100
#############################################################################
101
##
102
##
103
#############################################################################
104
 
105
my $parser = XML::LibXML->new();
106
 
107
 
108
 
109
 
110
 
111
 
112
 
113
 
114
 
115
#############################################################################
116
##
117
##
118
#############################################################################
119
 
120 131 jt_eaton
print "Building SIM filelists for  $work_site  $vendor $library   $component $version $variant \n" ;
121 125 jt_eaton
 
122 131 jt_eaton
my $spirit_component_file    = $parser->parse_file(yp::lib::find_ipxact_component($vendor,$library,$component,$version));
123
my $socgen_file              = $parser->parse_file(yp::lib::find_componentConfiguration($vendor,$library,$component));
124 130 jt_eaton
my $sim_library_path ;
125 131 jt_eaton
my $lib_comp_sep             = yp::lib::find_lib_comp_sep($vendor,$library,$component);
126 130 jt_eaton
my $sim_comp_path            = $socgen_file->findnodes("//socgen:componentConfiguration/socgen:sim/socgen:comp_path/text()")->to_literal;
127 125 jt_eaton
 
128 130 jt_eaton
   if ($sim_comp_path)
129
      {
130
      $sim_library_path            ="${lib_comp_sep}${sim_comp_path}";
131
      }
132
   else
133
      {
134
      $sim_library_path            = $socgen_file->findnodes("//socgen:componentConfiguration/socgen:sim/socgen:library_path/text()")->to_literal;
135
      }
136 125 jt_eaton
 
137
 
138
 
139 130 jt_eaton
 
140
 
141 125 jt_eaton
#/*********************************************************************************************/
142
#/                                                                                            */
143
#/                                                                                            */
144
#/  Read each variants parameters and defaults into an array and their order into an array    */
145
#/  order must be preservered so that parameters can use the values of other parameters       */
146
#/                                                                                            */
147
#/*********************************************************************************************/
148
 
149
my %default_parameters = ();
150
my @parameter_order    = ();
151
 
152
 
153 130 jt_eaton
foreach  my   $i_name ($socgen_file->findnodes("//socgen:configurations/socgen:configuration[socgen:name/text() = '$variant']/socgen:parameters/socgen:parameter"))
154 125 jt_eaton
      {
155
      my($parameter_name)     = $i_name ->findnodes('socgen:name/text()')->to_literal ;
156
      my($parameter_default)  = $i_name ->findnodes('socgen:value/text()')->to_literal ;
157
      $default_parameters{$parameter_name}  = $parameter_default;
158
      push  @parameter_order ,$parameter_name ;
159
      }
160
 
161
 
162
 
163
 
164
 
165
 
166
 
167
 
168
 
169
foreach my $comp ($spirit_component_file->findnodes('//spirit:component'))
170
   {
171
   my($vendor)   = $comp->findnodes('./spirit:vendor/text()')->to_literal ;
172
   my($library)  = $comp->findnodes('./spirit:library/text()')->to_literal ;
173
   my($name)     = $comp->findnodes('./spirit:name/text()')->to_literal ;
174
   my($version)  = $comp->findnodes('./spirit:version/text()')->to_literal ;
175
   my $variant = "";
176
   if($version) {$variant = "${name}_${version}"}
177
   else         {$variant = "${name}"}
178 131 jt_eaton
   print "rtl/gen directories  for    $library - $component         VLNV        $vendor - $library -  $name -  $variant \n";
179 125 jt_eaton
   }
180
 
181 131 jt_eaton
   print "CREATING componentRef filelists for   $library   $component  $name $variant \n";
182 125 jt_eaton
 
183
 
184
   #/*********************************************************************************************/
185
   #/                                                                                            */
186
   #/                                                                                            */
187
   #/                                                                                            */
188
   #/                                                                                            */
189
   #/                                                                                            */
190
   #/                                                                                            */
191
   #/*********************************************************************************************/
192
 
193
 
194 130 jt_eaton
foreach  my   $i_name ($socgen_file->findnodes("//socgen:testbench[socgen:variant/text() = '$variant']/socgen:code_coverage"))
195 125 jt_eaton
   {
196 128 jt_eaton
 
197 131 jt_eaton
   my $path ="${home}${work_site}/${vendor}__${library}${sim_library_path}/cov";
198 125 jt_eaton
   mkdir $path,0755          unless( -e $path );
199 131 jt_eaton
   $path ="${home}${work_site}/${vendor}__${library}${sim_library_path}/cov/${variant}";
200 125 jt_eaton
   mkdir $path,0755          unless( -e $path );
201
 
202
 
203 131 jt_eaton
   my $outfile ="${home}${work_site}/${vendor}__${library}${sim_library_path}/cov/${variant}/TestBench";
204 125 jt_eaton
   open  DUTFILE,">$outfile" or die "unable to open $outfile";
205
   print  DUTFILE  "`timescale    1ns/1ns   \n";
206
   print  DUTFILE  " module TB();   \n";
207 128 jt_eaton
 
208
 
209
      print DUTFILE  "     $variant   \n";
210
      my $first =1;
211
      foreach  my  $parameter_name  (@parameter_order)
212
         {
213
         my($parameter_default)  =    $default_parameters{$parameter_name};
214
         if($first)
215
           {
216
           print DUTFILE  "   #(  .${parameter_name}(${parameter_default})";
217
           $first = 0;
218
           }
219
         else
220
           {
221
           print DUTFILE  ",\n       .${parameter_name}(${parameter_default})";
222
           }
223
         }
224
         if($first)
225
           {
226
           print DUTFILE  "  test \n (); \n\n\n\n";
227
           }
228
          else
229
           {
230
           print DUTFILE  ") test \n (); \n\n\n\n";
231
           }
232
 
233
 
234
   print  DUTFILE  " endmodule   \n";
235
 
236
 
237
 
238
 
239
 
240
 
241
 
242
 
243
 
244 125 jt_eaton
   }
245
 
246
 
247
 
248 128 jt_eaton
 
249
 
250
 
251
 
252
 
253
 
254
 
255
 
256
 
257
 
258
 
259
 
260
 
261
 
262
 
263
 
264
 
265
 
266
 
267
 
268
 
269
 
270
 
271 125 jt_eaton
   #/*********************************************************************************************/
272
   #/                                                                                            */
273
   #/ Make simulation file set                                                                   */
274
   #/                                                                                            */
275
   #/                                                                                            */
276
   #/                                                                                            */
277
   #/                                                                                            */
278
   #/*********************************************************************************************/
279
 
280 131 jt_eaton
   print "CREATING sim files for   $library  $component   $chip   $name  $variant \n";
281 125 jt_eaton
 
282
 
283
 
284
 
285
 
286
 
287 130 jt_eaton
    foreach  my   $i_name ($socgen_file->findnodes("//socgen:componentConfiguration/socgen:sim/socgen:verilator/socgen:test[socgen:variant/text() = '$variant']"))
288 125 jt_eaton
      {
289
      my($simulation)      = $i_name ->findnodes('socgen:name/text()')->to_literal ;
290
      my($configuration)   = $i_name ->findnodes('socgen:configuration/text()')->to_literal ;
291 131 jt_eaton
      print " sim files for   $library  $component   $variant  $simulation $configuration          \n";
292 125 jt_eaton
 
293 131 jt_eaton
      my $path ="${home}${work_site}/${vendor}__${library}${sim_library_path}/verilator";
294 125 jt_eaton
      mkdir $path,0755          unless( -e $path );
295 131 jt_eaton
      $path ="${home}${work_site}/${vendor}__${library}${sim_library_path}/verilator/${simulation}";
296 125 jt_eaton
      mkdir $path,0755          unless( -e $path );
297
 
298 131 jt_eaton
      my $outfile ="${home}${work_site}/${vendor}__${library}${sim_library_path}/verilator/${simulation}/Makefile";
299 125 jt_eaton
      open  MAKSIMFILE,">$outfile" or die "unable to open $outfile";
300
 
301
 
302 131 jt_eaton
      my $outfile ="${home}${work_site}/${vendor}__${library}${sim_library_path}/verilator/${simulation}/TestBench";
303 125 jt_eaton
      open SIM_PARM_FILE,">$outfile" or die "unable to open $outfile";
304
 
305
 
306
 
307
 
308
 
309
      my %local_parameters =  %default_parameters;
310
      my @local_order      =  @parameter_order;
311
 
312
 
313
 
314 130 jt_eaton
      foreach  my   $i_name ($socgen_file->findnodes("//socgen:componentConfiguration/socgen:sim/socgen:testbenches/socgen:testbench[socgen:variant/text() = '$variant']/./socgen:parameters/socgen:parameter/socgen:name"))
315 125 jt_eaton
         {
316
         my($par_name)   = $i_name ->findnodes('./text()')->to_literal ;
317
         my($par_value)  = $i_name ->findnodes('../socgen:value/text()')->to_literal ;
318
         if  ( $local_parameters{$par_name} eq '' )  { push @local_order , $par_name; }
319
         $local_parameters{$par_name} = $par_value;
320
         }
321
 
322
 
323
 
324 130 jt_eaton
      foreach  my   $i_name ($socgen_file->findnodes("//socgen:configurations/socgen:configuration[socgen:name/text() = '$configuration']/./socgen:parameters/socgen:parameter/socgen:name"))
325 125 jt_eaton
         {
326
         my($par_name)   = $i_name ->findnodes('./text()')->to_literal ;
327
         my($par_value)  = $i_name ->findnodes('../socgen:value/text()')->to_literal ;
328
         if($local_parameters{$par_name} eq '' )  { push @local_order , $par_name; }
329
         $local_parameters{$par_name} = $par_value;
330
         }
331
 
332
 
333
 
334 130 jt_eaton
      foreach  my   $i_name ($socgen_file->findnodes("//socgen:componentConfiguration/socgen:sim/socgen:verilator/socgen:test[socgen:name/text() = '$simulation']/./socgen:parameters/socgen:parameter/socgen:name"))
335 125 jt_eaton
         {
336
         my($par_name)   = $i_name ->findnodes('./text()')->to_literal ;
337
         my($par_value)  = $i_name ->findnodes('../socgen:value/text()')->to_literal ;
338
         if  ( $local_parameters{$par_name} eq '' )  { push @local_order , $par_name; }
339
         $local_parameters{$par_name} = $par_value;
340
         }
341
 
342
     my $timeout = $local_parameters{"TIMEOUT"};
343
 
344 128 jt_eaton
      print MAKSIMFILE  "include ${home}/tools/bin/Makefile.root\n";
345 125 jt_eaton
      print MAKSIMFILE  "comp=${variant}\n";
346
      print MAKSIMFILE  "test=${simulation}\n";
347
      print MAKSIMFILE  "timeout=${timeout}\n";
348 128 jt_eaton
      print MAKSIMFILE  "simulator=verilator\n";
349 125 jt_eaton
 
350
 
351
 
352 128 jt_eaton
 
353 131 jt_eaton
      my $module_name = yp::lib::get_module_name($vendor,$library,$component,$version);
354 125 jt_eaton
 
355
 
356
 
357
 
358 131 jt_eaton
      print SIM_PARM_FILE  "//  Testbench  for  $library    $component    $variant   $configuration    $simulation\n";
359 125 jt_eaton
      print SIM_PARM_FILE  "                \n";
360
      print SIM_PARM_FILE  "module TB(input clk, input START,     output FINISH,output FAIL                 );                                \n";
361
      print SIM_PARM_FILE  "                                \n";
362
      print SIM_PARM_FILE  "     $module_name   \n";
363
 
364
      my $first =1;
365
 
366
      foreach  my  $parameter_name  (@local_order)
367
         {
368
         my($parameter_default)  =    $local_parameters{$parameter_name};
369
         if($first)
370
           {
371
           print SIM_PARM_FILE  "   #(  .${parameter_name}(${parameter_default})";
372
           $first = 0;
373
           }
374
         else
375
           {
376
           print SIM_PARM_FILE  ",\n       .${parameter_name}(${parameter_default})";
377
           }
378
         }
379
      print SIM_PARM_FILE  ") test \n (.clk(clk),.START(START),.FAIL(FAIL),.FINISH(FINISH)); \n\n\n\n";
380 128 jt_eaton
      print SIM_PARM_FILE  "`include \"./test_define\"  \n";
381 125 jt_eaton
      print SIM_PARM_FILE  "endmodule                                \n";
382
 
383
 
384
      }
385
 
386
 
387
 
388
 
389
 
390
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.