| 1 |
119 |
jt_eaton |
# clock pin for Basys Board
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| 2 |
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NET "A_CLK" LOC = "p53" ; # oscillator 48 Mhz
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| 3 |
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NET "B_CLK" LOC = "p54" ; # resonator 100/50/25
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| 4 |
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| 5 |
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| 6 |
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NET "A_CLK" CLOCK_DEDICATED_ROUTE = FALSE;
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| 7 |
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PIN "core/clock_sys/DCM_SP_inst.CLKIN" CLOCK_DEDICATED_ROUTE = FALSE;
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| 8 |
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| 9 |
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| 10 |
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| 11 |
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# Pin assignment for DispCtl
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| 12 |
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# Connected to Basys onBoard 7seg display
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| 13 |
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| 14 |
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NET "SEG<0>" LOC = "p25" ; # Signal name = CA
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| 15 |
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NET "SEG<1>" LOC = "p16" ; # Signal name = CB
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| 16 |
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NET "SEG<2>" LOC = "p23" ; # Signal name = CC
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| 17 |
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NET "SEG<3>" LOC = "p21" ; # Signal name = CD
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| 18 |
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NET "SEG<4>" LOC = "p20" ; # Signal name = CE
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| 19 |
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NET "SEG<5>" LOC = "p17" ; # Signal name = CF
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| 20 |
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NET "SEG<6>" LOC = "p83" ; # Signal name = CG
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| 21 |
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NET "DP" LOC = "p22" ; # Signal name = DP
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| 22 |
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| 23 |
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NET "AN<3>" LOC = "p26" ; # Signal name = AN3
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| 24 |
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NET "AN<2>" LOC = "p32" ; # Signal name = AN2
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| 25 |
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NET "AN<1>" LOC = "p33" ; # Signal name = AN1
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| 26 |
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NET "AN<0>" LOC = "p34" ; # Signal name = AN0
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| 27 |
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| 28 |
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# Pin assignment for LEDs
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| 29 |
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NET "LED<7>" LOC = "p2" ; # Bank = 3, Signal name = LD7
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| 30 |
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NET "LED<6>" LOC = "p3" ; # Bank = 3, Signal name = LD6
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| 31 |
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NET "LED<5>" LOC = "p4" ; # Bank = 3, Signal name = LD5
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| 32 |
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NET "LED<4>" LOC = "p5" ; # Bank = 3, Signal name = LD4
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| 33 |
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NET "LED<3>" LOC = "p7" ; # Bank = 3, Signal name = LD3
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| 34 |
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NET "LED<2>" LOC = "p8" ; # Bank = 3, Signal name = LD2
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| 35 |
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NET "LED<1>" LOC = "p14" ; # Bank = 3, Signal name = LD1
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| 36 |
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NET "LED<0>" LOC = "p15" ; # Bank = 3, Signal name = LD0
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| 37 |
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| 38 |
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# Pin assignment for SWs
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| 39 |
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NET "SW<7>" LOC = "p6" ; # Bank = 3, Signal name = SW7
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| 40 |
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NET "SW<6>" LOC = "p10" ; # Bank = 3, Signal name = SW6
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| 41 |
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NET "SW<5>" LOC = "p12" ; # Bank = 3, Signal name = SW5
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| 42 |
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NET "SW<4>" LOC = "p18" ; # Bank = 3, Signal name = SW4
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| 43 |
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NET "SW<3>" LOC = "p24" ; # Bank = 3, Signal name = SW3
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| 44 |
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NET "SW<2>" LOC = "p29" ; # Bank = 3, Signal name = SW2
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| 45 |
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NET "SW<1>" LOC = "p36" ; # Bank = 3, Signal name = SW1
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| 46 |
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NET "SW<0>" LOC = "p38" ; # Bank = 2, Signal name = SW0
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| 47 |
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| 48 |
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# Pin assignment for BTNs
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| 49 |
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NET "BTN<3>" LOC = "p41" ; # Bank = 2, Signal name = BTN3
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| 50 |
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NET "BTN<2>" LOC = "p47" ; # Bank = 2, Signal name = BTN2
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| 51 |
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NET "BTN<1>" LOC = "p48" ; # Bank = 2, Signal name = BTN1
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| 52 |
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NET "BTN<0>" LOC = "p69" ; # Bank = 2, Signal name = BTN0
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| 53 |
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| 54 |
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# Loop back/demo signals
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| 55 |
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# Pin assignment for PS2
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| 56 |
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NET "PS2C" LOC = "p96" | DRIVE = 2 | PULLUP ; # Bank = 1, Signal name = PS2C
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| 57 |
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NET "PS2D" LOC = "p97" | DRIVE = 2 | PULLUP ; # Bank = 1, Signal name = PS2D
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| 58 |
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| 59 |
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# Pin assignment for VGA
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| 60 |
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NET "HSYNC_N" LOC = "p39" | DRIVE = 2 ; # Bank = 2, Signal name = HSYNC
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| 61 |
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NET "VSYNC_N" LOC = "p35" | DRIVE = 2 ; # Bank = 3, Signal name = VSYNC
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| 62 |
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NET "VGARED<2>" LOC = "p67" | DRIVE = 2 ; # Bank = 2, Signal name = RED2
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| 63 |
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NET "VGARED<1>" LOC = "p68" | DRIVE = 2 ; # Bank = 2, Signal name = RED1
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| 64 |
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NET "VGARED<0>" LOC = "p70" | DRIVE = 2 ; # Bank = 2, Signal name = RED0
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| 65 |
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NET "VGAGREEN<2>" LOC = "p50" | DRIVE = 2 ; # Bank = 2, Signal name = GRN2
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| 66 |
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NET "VGAGREEN<1>" LOC = "p51" | DRIVE = 2 ; # Bank = 2, Signal name = GRN1
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| 67 |
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NET "VGAGREEN<0>" LOC = "p52" | DRIVE = 2 ; # Bank = 2, Signal name = GRN0
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| 68 |
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NET "VGABLUE<1>" LOC = "p43" | DRIVE = 2 ; # Bank = 2, Signal name = BLU2
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| 69 |
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NET "VGABLUE<0>" LOC = "p44" | DRIVE = 2 ; # Bank = 2, Signal name = BLU1
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| 70 |
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| 71 |
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# Pin assignment for Expansion Ports
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| 72 |
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| 73 |
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NET "JA_1" LOC = "p81" | DRIVE = 6 ;
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| 74 |
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NET "JA_2" LOC = "p91" | DRIVE = 6 ;
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| 75 |
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NET "JA_3" LOC = "p82" | DRIVE = 6 ;
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| 76 |
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NET "JA_4" LOC = "p92" | DRIVE = 6 ;
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| 77 |
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| 78 |
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NET "JB_1" LOC = "p87" ;
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| 79 |
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NET "JB_2" LOC = "p93" ;
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| 80 |
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NET "JB_3" LOC = "p88" ;
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| 81 |
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NET "JB_4" LOC = "p94" ;
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| 82 |
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| 83 |
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NET "JC_1" LOC = "p77" ;
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| 84 |
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NET "JC_2" LOC = "p86" ;
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| 85 |
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NET "JC_3" LOC = "p76" ;
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| 86 |
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NET "JC_4" LOC = "p85" ;
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| 87 |
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| 88 |
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NET "RTS" LOC = "p75" ;
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| 89 |
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NET "CTS" LOC = "p59" ;
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| 90 |
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NET "RXD" LOC = "p74" ;
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| 91 |
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NET "TXD" LOC = "p58" ;
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