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jt_eaton |
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##############################################################################
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# Pin LOC Constraints #
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##############################################################################
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NET "A_CLK" LOC = "P85" | IOSTANDARD = LVTTL;
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#Peripherals#############################################################
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NET "LED<0>" LOC = "P105" | IOSTANDARD = LVTTL; #SHARED WITH ARD_D6
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NET "LED<1>" LOC = "P104" | IOSTANDARD = LVTTL; #SHARED WITH ARD_D7
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NET "BTN<0>" LOC = "P102" | IOSTANDARD = LVTTL;
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NET "BTN<1>" LOC = "P101" | IOSTANDARD = LVTTL;
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NET "SW<0>" LOC = "P99" | IOSTANDARD = LVTTL;
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NET "SW<1>" LOC = "P100" | IOSTANDARD = LVTTL;
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##PMOD1#############################################################################
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NET "PMOD1<0>" LOC = "P5" | IOSTANDARD = LVTTL;
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NET "PMOD1<1>" LOC = "P2" | IOSTANDARD = LVTTL;
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NET "PMOD1<2>" LOC = "P1" | IOSTANDARD = LVTTL;
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NET "PMOD1<3>" LOC = "P16" | IOSTANDARD = LVTTL;
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NET "PMOD1<4>" LOC = "P88" | IOSTANDARD = LVTTL;
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NET "PMOD1<5>" LOC = "P92" | IOSTANDARD = LVTTL;
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NET "PMOD1<6>" LOC = "P93" | IOSTANDARD = LVTTL;
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NET "PMOD1<7>" LOC = "P94" | IOSTANDARD = LVTTL;
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##PMOD2#############################################################################
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NET "PMOD2<0>" LOC = "P142" | IOSTANDARD = LVTTL;
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NET "PMOD2<1>" LOC = "P141" | IOSTANDARD = LVTTL;
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NET "PMOD2<2>" LOC = "P15" | IOSTANDARD = LVTTL;
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NET "PMOD2<3>" LOC = "P14" | IOSTANDARD = LVTTL;
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NET "PMOD2<4>" LOC = "P144" | IOSTANDARD = LVTTL;
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NET "PMOD2<5>" LOC = "P143" | IOSTANDARD = LVTTL;
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NET "PMOD2<6>" LOC = "P140" | IOSTANDARD = LVTTL;
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NET "PMOD2<7>" LOC = "P139" | IOSTANDARD = LVTTL;
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##PMOD3#############################################################################
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NET "PMOD3<0>" LOC = "P138" | IOSTANDARD = LVTTL;
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NET "PMOD3<1>" LOC = "P137" | IOSTANDARD = LVTTL;
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NET "PMOD3<2>" LOC = "P124" | IOSTANDARD = LVTTL;
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NET "PMOD3<3>" LOC = "P123" | IOSTANDARD = LVTTL;
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NET "PMOD3<4>" LOC = "P119" | IOSTANDARD = LVTTL;
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NET "PMOD3<5>" LOC = "P118" | IOSTANDARD = LVTTL;
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NET "PMOD3<6>" LOC = "P117" | IOSTANDARD = LVTTL;
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NET "PMOD3<7>" LOC = "P116" | IOSTANDARD = LVTTL;
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##PMOD4#############################################################################
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NET "PMOD4<0>" LOC = "P112" | IOSTANDARD = LVTTL;
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NET "PMOD4<1>" LOC = "P111" | IOSTANDARD = LVTTL;
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NET "PMOD4<2>" LOC = "P132" | IOSTANDARD = LVTTL;
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NET "PMOD4<3>" LOC = "P131" | IOSTANDARD = LVTTL;
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NET "PMOD4<4>" LOC = "P115" | IOSTANDARD = LVTTL;
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NET "PMOD4<5>" LOC = "P114" | IOSTANDARD = LVTTL;
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NET "PMOD4<6>" LOC = "P134" | IOSTANDARD = LVTTL;
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NET "PMOD4<7>" LOC = "P133" | IOSTANDARD = LVTTL;
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#RASPBERRY-PI CONNECTOR###############################################################
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NET "SYS_SPI_MOSI" LOC = "P80" | IOSTANDARD = LVTTL; #! dedicated in R1.5 - buffered to DIN pin for configuration only
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NET "SYS_SPI_MISO" LOC = "P75" | IOSTANDARD = LVTTL;
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NET "SYS_SPI_SCK" LOC = "P78" | IOSTANDARD = LVTTL; #! dedicated pin in R1.5 - buffered to CCLK pin for configuration only
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NET "RP_SPI_CE0N" LOC = "P79" | IOSTANDARD = LVTTL;
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#NET "SYS_SDA" LOC = "P98" | IOSTANDARD = LVTTL; #Shared with Arduino SDA
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#NET "SYS_SCL" LOC = "P97" | IOSTANDARD = LVTTL; #Shared with Arduino SCL
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#UART FROM RASPBERRY PI - As labelled in the Rpi (master) schematic
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#NET "SYS_TX" LOC= "P83" | IOSTANDARD = LVTTL; #Pi output FPGA input #Shared with Arduino TX
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#NET "SYS_RX" LOC= "P82" | IOSTANDARD = LVTTL; #Pi input FPGA output #Shared with Arduino RX
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#NET "RP_GPIO_GCLK" LOC = "P95" | IOSTANDARD = LVTTL;
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#NET "RP_GPIO_GEN2" LOC = "P81" | IOSTANDARD = LVTTL;
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#ARDUINO HEADERS########################################################################
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#SYS_SCL #Shared with RPI i2c
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#SYS_SDA #Shared with RPI i2c
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#NET "ARD_SCK" LOC= "P84" | IOSTANDARD = LVTTL; #D13
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#NET "ARD_MISO" LOC= "P87" | IOSTANDARD = LVTTL; #D12
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#NET "ARD_MOSI" LOC= "P51" | IOSTANDARD = LVTTL; #D11
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#NET "ARD_SS" LOC= "P74" | IOSTANDARD = LVTTL; #D10
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#NET "ARD_D9_FLSH_DI" LOC= "P64" | IOSTANDARD = LVTTL; #D9
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#NET "ARD_D8_FLSH_CS" LOC= "P38" | IOSTANDARD = LVTTL; #D8
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