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Subversion Repositories sockit_owm

[/] [sockit_owm/] [trunk/] [demo/] [Terasic_DE1/] [soc.sopc] - Blame information for rev 5

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{
   element jtag_uart.avalon_jtag_slave
   {
      datum _lockedAddress
      {
         value = "1";
         type = "boolean";
      }
      datum baseAddress
      {
         value = "25206784";
         type = "long";
      }
   }
   element cfi_flash
   {
      datum _sortIndex
      {
         value = "4";
         type = "int";
      }
      datum megawizard_uipreferences
      {
         value = "{}";
         type = "String";
      }
      datum sopceditor_expanded
      {
         value = "0";
         type = "boolean";
      }
   }
   element clk
   {
      datum _sortIndex
      {
         value = "11";
         type = "int";
      }
   }
   element sysid.control_slave
   {
      datum _lockedAddress
      {
         value = "1";
         type = "boolean";
      }
      datum baseAddress
      {
         value = "25206912";
         type = "long";
      }
   }
   element cpu
   {
      datum _sortIndex
      {
         value = "0";
         type = "int";
      }
      datum megawizard_uipreferences
      {
         value = "{output_language=VERILOG, output_directory=/home/izi/Workplace/fpga-hdl/DE1/DE1_soc_nios2}";
         type = "String";
      }
      datum sopceditor_expanded
      {
         value = "1";
         type = "boolean";
      }
   }
   element epcs_flash.epcs_control_port
   {
      datum _lockedAddress
      {
         value = "1";
         type = "boolean";
      }
      datum baseAddress
      {
         value = "25204736";
         type = "long";
      }
   }
   element epcs_flash
   {
      datum _sortIndex
      {
         value = "1";
         type = "int";
      }
      datum megawizard_uipreferences
      {
         value = "{output_language=VERILOG, output_directory=/home/izi/Workplace/fpga-hdl/DE1/DE1_soc_nios2}";
         type = "String";
      }
      datum sopceditor_expanded
      {
         value = "0";
         type = "boolean";
      }
   }
   element cpu.jtag_debug_module
   {
      datum _lockedAddress
      {
         value = "1";
         type = "boolean";
      }
      datum baseAddress
      {
         value = "25202688";
         type = "long";
      }
   }
   element jtag_uart
   {
      datum _sortIndex
      {
         value = "6";
         type = "int";
      }
      datum megawizard_uipreferences
      {
         value = "{}";
         type = "String";
      }
      datum sopceditor_expanded
      {
         value = "0";
         type = "boolean";
      }
   }
   element onchip_ram
   {
      datum _sortIndex
      {
         value = "2";
         type = "int";
      }
      datum megawizard_uipreferences
      {
         value = "{}";
         type = "String";
      }
      datum sopceditor_expanded
      {
         value = "0";
         type = "boolean";
      }
   }
   element onewire
   {
      datum _sortIndex
      {
         value = "12";
         type = "int";
      }
      datum sopceditor_expanded
      {
         value = "0";
         type = "boolean";
      }
   }
   element pio_7seg
   {
      datum _sortIndex
      {
         value = "8";
         type = "int";
      }
      datum megawizard_uipreferences
      {
         value = "{output_language=VERILOG, output_directory=/home/izi/Workplace/fpga-hdl/DE1/DE1_soc_nios2}";
         type = "String";
      }
      datum sopceditor_expanded
      {
         value = "0";
         type = "boolean";
      }
   }
   element pio_ledg
   {
      datum _sortIndex
      {
         value = "9";
         type = "int";
      }
      datum megawizard_uipreferences
      {
         value = "{}";
         type = "String";
      }
      datum sopceditor_expanded
      {
         value = "0";
         type = "boolean";
      }
   }
   element pio_ledr
   {
      datum _sortIndex
      {
         value = "10";
         type = "int";
      }
      datum megawizard_uipreferences
      {
         value = "{}";
         type = "String";
      }
      datum sopceditor_expanded
      {
         value = "0";
         type = "boolean";
      }
   }
   element sdram.s1
   {
      datum _lockedAddress
      {
         value = "1";
         type = "boolean";
      }
      datum baseAddress
      {
         value = "8388608";
         type = "long";
      }
   }
   element timer.s1
   {
      datum _lockedAddress
      {
         value = "1";
         type = "boolean";
      }
      datum baseAddress
      {
         value = "25206944";
         type = "long";
      }
   }
   element pio_7seg.s1
   {
      datum _lockedAddress
      {
         value = "1";
         type = "boolean";
      }
      datum baseAddress
      {
         value = "25206848";
         type = "long";
      }
   }
   element onchip_ram.s1
   {
      datum _lockedAddress
      {
         value = "1";
         type = "boolean";
      }
      datum baseAddress
      {
         value = "25182208";
         type = "long";
      }
   }
   element pio_ledg.s1
   {
      datum _lockedAddress
      {
         value = "1";
         type = "boolean";
      }
      datum baseAddress
      {
         value = "25206864";
         type = "long";
      }
   }
   element onewire.s1
   {
      datum _lockedAddress
      {
         value = "1";
         type = "boolean";
      }
   }
   element uart.s1
   {
      datum _lockedAddress
      {
         value = "1";
         type = "boolean";
      }
      datum baseAddress
      {
         value = "25206816";
         type = "long";
      }
   }
   element cfi_flash.s1
   {
      datum _lockedAddress
      {
         value = "1";
         type = "boolean";
      }
      datum baseAddress
      {
         value = "20971520";
         type = "long";
      }
   }
   element pio_ledr.s1
   {
      datum _lockedAddress
      {
         value = "1";
         type = "boolean";
      }
      datum baseAddress
      {
         value = "25206880";
         type = "long";
      }
   }
   element sdram
   {
      datum _sortIndex
      {
         value = "5";
         type = "int";
      }
      datum megawizard_uipreferences
      {
         value = "{}";
         type = "String";
      }
      datum sopceditor_expanded
      {
         value = "0";
         type = "boolean";
      }
   }
   element soc
   {
   }
   element sysid
   {
      datum _sortIndex
      {
         value = "13";
         type = "int";
      }
      datum megawizard_uipreferences
      {
         value = "{}";
         type = "String";
      }
      datum sopceditor_expanded
      {
         value = "0";
         type = "boolean";
      }
   }
   element timer
   {
      datum _sortIndex
      {
         value = "14";
         type = "int";
      }
      datum megawizard_uipreferences
      {
         value = "{}";
         type = "String";
      }
      datum sopceditor_expanded
      {
         value = "0";
         type = "boolean";
      }
   }
   element tri_state_bridge_flash
   {
      datum _sortIndex
      {
         value = "3";
         type = "int";
      }
      datum megawizard_uipreferences
      {
         value = "{}";
         type = "String";
      }
      datum sopceditor_expanded
      {
         value = "0";
         type = "boolean";
      }
   }
   element uart
   {
      datum _sortIndex
      {
         value = "7";
         type = "int";
      }
      datum megawizard_uipreferences
      {
         value = "{}";
         type = "String";
      }
      datum sopceditor_expanded
      {
         value = "0";
         type = "boolean";
      }
   }
}
]]>
 
 
 
 
 
 
 
 
 
 
  
  
  
 
 
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  ]]>
  
  
  
  
  
  
  
  
  M512_MEMORY 0 M4K_MEMORY 1 M9K_MEMORY 0 M20K_MEMORY 0 M144K_MEMORY 0 MRAM_MEMORY 0 MLAB_MEMORY 0 ESB 0 EPCS 1 DSP 0 EMUL 1 HARDCOPY 0 LVDS_IO 0 ADDRESS_STALL 1 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 DSP_SHIFTER_BLOCK 0
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  ]]>
  
  
  
  
  cpu.jtag_debug_module
  
 
 
   kind="altera_avalon_jtag_uart"
   version="10.0"
   enabled="1"
   name="jtag_uart">
  
  
  
  
  
  INTERACTIVE_ASCII_OUTPUT
  
  
  
  
  
 
 
  
  
  
  
  
  
  
  
  
  
  
  
  
  
 
 
   kind="altera_avalon_onchip_memory2"
   version="10.0"
   enabled="1"
   name="onchip_ram">
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
 
 
   kind="altera_avalon_new_sdram_controller"
   version="10.0"
   enabled="1"
   name="sdram">
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
 
 
  
  
  
  
  
  
  
  
  
  
  
  
 
 
  
  
  
  
  
  
  
  
  
  
  
  
 
 
  
  
  
  
  
  
  
  
  
  
  
  
 
 
   kind="altera_avalon_epcs_flash_controller"
   version="10.0"
   enabled="1"
   name="epcs_flash">
  
  
  
 
 
   kind="altera_avalon_cfi_flash"
   version="10.0"
   enabled="1"
   name="cfi_flash">
  
  
  
  
  
  
  
  
  
 
 
   kind="altera_avalon_tri_state_bridge"
   version="10.0"
   enabled="1"
   name="tri_state_bridge_flash">
  
 
 
 
  
  
  
  
  
  
  
  
  
  
 
 
  
  
  
  
  
  
  
  
 
 
 
   kind="avalon"
   version="6.1"
   start="cpu.instruction_master"
   end="cpu.jtag_debug_module">
  
  
 
 
   kind="avalon"
   version="6.1"
   start="cpu.data_master"
   end="cpu.jtag_debug_module">
  
  
 
 
 
   kind="avalon"
   version="6.1"
   start="cpu.data_master"
   end="jtag_uart.avalon_jtag_slave">
  
  
 
 
  
 
 
 
  
  
 
 
  
 
 
 
   kind="avalon"
   version="6.1"
   start="cpu.instruction_master"
   end="onchip_ram.s1">
  
  
 
 
   kind="avalon"
   version="6.1"
   start="cpu.data_master"
   end="onchip_ram.s1">
  
  
 
 
 
   kind="avalon"
   version="6.1"
   start="cpu.instruction_master"
   end="sdram.s1">
  
  
 
 
  
  
 
 
 
  
  
 
 
 
  
  
 
 
 
  
  
 
 
 
   kind="avalon"
   version="6.1"
   start="cpu.instruction_master"
   end="epcs_flash.epcs_control_port">
  
  
 
 
   kind="avalon"
   version="6.1"
   start="cpu.data_master"
   end="epcs_flash.epcs_control_port">
  
  
 
 
   kind="interrupt"
   version="10.0"
   start="cpu.d_irq"
   end="epcs_flash.irq">
  
 
 
 
   kind="clock"
   version="10.0"
   start="clk.clk"
   end="tri_state_bridge_flash.clk" />
 
   kind="avalon"
   version="6.1"
   start="cpu.instruction_master"
   end="tri_state_bridge_flash.avalon_slave">
  
  
 
 
   kind="avalon"
   version="6.1"
   start="cpu.data_master"
   end="tri_state_bridge_flash.avalon_slave">
  
  
 
 
   kind="avalon_tristate"
   version="10.0"
   start="tri_state_bridge_flash.tristate_master"
   end="cfi_flash.s1">
  
  
 
 
 
   kind="avalon"
   version="6.1"
   start="cpu.data_master"
   end="sysid.control_slave">
  
  
 
 
 
  
  
 
 
  
 
 
 
  
  
 
 
  
 


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Subversion Repositories sockit_owm

[/] [sockit_owm/] [trunk/] [demo/] [Terasic_DE1/] [soc.sopc] - Blame information for rev 5

Line No.	Rev	Author	Line
1	3	iztok
2
3
4			`{`
5			`element jtag_uart.avalon_jtag_slave`
6			`{`
7			`datum _lockedAddress`
8			`{`
9			`value = "1";`
10			`type = "boolean";`
11			`}`
12			`datum baseAddress`
13			`{`
14			`value = "25206784";`
15			`type = "long";`
16			`}`
17			`}`
18			`element cfi_flash`
19			`{`
20			`datum _sortIndex`
21			`{`
22			`value = "4";`
23			`type = "int";`
24			`}`
25			`datum megawizard_uipreferences`
26			`{`
27			`value = "{}";`
28			`type = "String";`
29			`}`
30			`datum sopceditor_expanded`
31			`{`
32			`value = "0";`
33			`type = "boolean";`
34			`}`
35			`}`
36			`element clk`
37			`{`
38			`datum _sortIndex`
39			`{`
40			`value = "11";`
41			`type = "int";`
42			`}`
43			`}`
44			`element sysid.control_slave`
45			`{`
46			`datum _lockedAddress`
47			`{`
48			`value = "1";`
49			`type = "boolean";`
50			`}`
51			`datum baseAddress`
52			`{`
53			`value = "25206912";`
54			`type = "long";`
55			`}`
56			`}`
57			`element cpu`
58			`{`
59			`datum _sortIndex`
60			`{`
61			`value = "0";`
62			`type = "int";`
63			`}`
64			`datum megawizard_uipreferences`
65			`{`
66			`value = "{output_language=VERILOG, output_directory=/home/izi/Workplace/fpga-hdl/DE1/DE1_soc_nios2}";`
67			`type = "String";`
68			`}`
69			`datum sopceditor_expanded`
70			`{`
71			`value = "1";`
72			`type = "boolean";`
73			`}`
74			`}`
75			`element epcs_flash.epcs_control_port`
76			`{`
77			`datum _lockedAddress`
78			`{`
79			`value = "1";`
80			`type = "boolean";`
81			`}`
82			`datum baseAddress`
83			`{`
84			`value = "25204736";`
85			`type = "long";`
86			`}`
87			`}`
88			`element epcs_flash`
89			`{`
90			`datum _sortIndex`
91			`{`
92			`value = "1";`
93			`type = "int";`
94			`}`
95			`datum megawizard_uipreferences`
96			`{`
97			`value = "{output_language=VERILOG, output_directory=/home/izi/Workplace/fpga-hdl/DE1/DE1_soc_nios2}";`
98			`type = "String";`
99			`}`
100			`datum sopceditor_expanded`
101			`{`
102			`value = "0";`
103			`type = "boolean";`
104			`}`
105			`}`
106			`element cpu.jtag_debug_module`
107			`{`
108			`datum _lockedAddress`
109			`{`
110			`value = "1";`
111			`type = "boolean";`
112			`}`
113			`datum baseAddress`
114			`{`
115			`value = "25202688";`
116			`type = "long";`
117			`}`
118			`}`
119			`element jtag_uart`
120			`{`
121			`datum _sortIndex`
122			`{`
123			`value = "6";`
124			`type = "int";`
125			`}`
126			`datum megawizard_uipreferences`
127			`{`
128			`value = "{}";`
129			`type = "String";`
130			`}`
131			`datum sopceditor_expanded`
132			`{`
133			`value = "0";`
134			`type = "boolean";`
135			`}`
136			`}`
137			`element onchip_ram`
138			`{`
139			`datum _sortIndex`
140			`{`
141			`value = "2";`
142			`type = "int";`
143			`}`
144			`datum megawizard_uipreferences`
145			`{`
146			`value = "{}";`
147			`type = "String";`
148			`}`
149			`datum sopceditor_expanded`
150			`{`
151			`value = "0";`
152			`type = "boolean";`
153			`}`
154			`}`
155			`element onewire`
156			`{`
157			`datum _sortIndex`
158			`{`
159			`value = "12";`
160			`type = "int";`
161			`}`
162			`datum sopceditor_expanded`
163			`{`
164			`value = "0";`
165			`type = "boolean";`
166			`}`
167			`}`
168			`element pio_7seg`
169			`{`
170			`datum _sortIndex`
171			`{`
172			`value = "8";`
173			`type = "int";`
174			`}`
175			`datum megawizard_uipreferences`
176			`{`
177			`value = "{output_language=VERILOG, output_directory=/home/izi/Workplace/fpga-hdl/DE1/DE1_soc_nios2}";`
178			`type = "String";`
179			`}`
180			`datum sopceditor_expanded`
181			`{`
182			`value = "0";`
183			`type = "boolean";`
184			`}`
185			`}`
186			`element pio_ledg`
187			`{`
188			`datum _sortIndex`
189			`{`
190			`value = "9";`
191			`type = "int";`
192			`}`
193			`datum megawizard_uipreferences`
194			`{`
195			`value = "{}";`
196			`type = "String";`
197			`}`
198			`datum sopceditor_expanded`
199			`{`
200			`value = "0";`
201			`type = "boolean";`
202			`}`
203			`}`
204			`element pio_ledr`
205			`{`
206			`datum _sortIndex`
207			`{`
208			`value = "10";`
209			`type = "int";`
210			`}`
211			`datum megawizard_uipreferences`
212			`{`
213			`value = "{}";`
214			`type = "String";`
215			`}`
216			`datum sopceditor_expanded`
217			`{`
218			`value = "0";`
219			`type = "boolean";`
220			`}`
221			`}`
222			`element sdram.s1`
223			`{`
224			`datum _lockedAddress`
225			`{`
226			`value = "1";`
227			`type = "boolean";`
228			`}`
229			`datum baseAddress`
230			`{`
231			`value = "8388608";`
232			`type = "long";`
233			`}`
234			`}`
235			`element timer.s1`
236			`{`
237			`datum _lockedAddress`
238			`{`
239			`value = "1";`
240			`type = "boolean";`
241			`}`
242			`datum baseAddress`
243			`{`
244			`value = "25206944";`
245			`type = "long";`
246			`}`
247			`}`
248			`element pio_7seg.s1`
249			`{`
250			`datum _lockedAddress`
251			`{`
252			`value = "1";`
253			`type = "boolean";`
254			`}`
255			`datum baseAddress`
256			`{`
257			`value = "25206848";`
258			`type = "long";`
259			`}`
260			`}`
261			`element onchip_ram.s1`
262			`{`
263			`datum _lockedAddress`
264			`{`
265			`value = "1";`
266			`type = "boolean";`
267			`}`
268			`datum baseAddress`
269			`{`
270			`value = "25182208";`
271			`type = "long";`
272			`}`
273			`}`
274			`element pio_ledg.s1`
275			`{`
276			`datum _lockedAddress`
277			`{`
278			`value = "1";`
279			`type = "boolean";`
280			`}`
281			`datum baseAddress`
282			`{`
283			`value = "25206864";`
284			`type = "long";`
285			`}`
286			`}`
287			`element onewire.s1`
288			`{`
289			`datum _lockedAddress`
290			`{`
291			`value = "1";`
292			`type = "boolean";`
293			`}`
294			`}`
295			`element uart.s1`
296			`{`
297			`datum _lockedAddress`
298			`{`
299			`value = "1";`
300			`type = "boolean";`
301			`}`
302			`datum baseAddress`
303			`{`
304			`value = "25206816";`
305			`type = "long";`
306			`}`
307			`}`
308			`element cfi_flash.s1`
309			`{`
310			`datum _lockedAddress`
311			`{`
312			`value = "1";`
313			`type = "boolean";`
314			`}`
315			`datum baseAddress`
316			`{`
317			`value = "20971520";`
318			`type = "long";`
319			`}`
320			`}`
321			`element pio_ledr.s1`
322			`{`
323			`datum _lockedAddress`
324			`{`
325			`value = "1";`
326			`type = "boolean";`
327			`}`
328			`datum baseAddress`
329			`{`
330			`value = "25206880";`
331			`type = "long";`
332			`}`
333			`}`
334			`element sdram`
335			`{`
336			`datum _sortIndex`
337			`{`
338			`value = "5";`
339			`type = "int";`
340			`}`
341			`datum megawizard_uipreferences`
342			`{`
343			`value = "{}";`
344			`type = "String";`
345			`}`
346			`datum sopceditor_expanded`
347			`{`
348			`value = "0";`
349			`type = "boolean";`
350			`}`
351			`}`
352			`element soc`
353			`{`
354			`}`
355			`element sysid`
356			`{`
357			`datum _sortIndex`
358			`{`
359			`value = "13";`
360			`type = "int";`
361			`}`
362			`datum megawizard_uipreferences`
363			`{`
364			`value = "{}";`
365			`type = "String";`
366			`}`
367			`datum sopceditor_expanded`
368			`{`
369			`value = "0";`
370			`type = "boolean";`
371			`}`
372			`}`
373			`element timer`
374			`{`
375			`datum _sortIndex`
376			`{`
377			`value = "14";`
378			`type = "int";`
379			`}`
380			`datum megawizard_uipreferences`
381			`{`
382			`value = "{}";`
383			`type = "String";`
384			`}`
385			`datum sopceditor_expanded`
386			`{`
387			`value = "0";`
388			`type = "boolean";`
389			`}`
390			`}`
391			`element tri_state_bridge_flash`
392			`{`
393			`datum _sortIndex`
394			`{`
395			`value = "3";`
396			`type = "int";`
397			`}`
398			`datum megawizard_uipreferences`
399			`{`
400			`value = "{}";`
401			`type = "String";`
402			`}`
403			`datum sopceditor_expanded`
404			`{`
405			`value = "0";`
406			`type = "boolean";`
407			`}`
408			`}`
409			`element uart`
410			`{`
411			`datum _sortIndex`
412			`{`
413			`value = "7";`
414			`type = "int";`
415			`}`
416			`datum megawizard_uipreferences`
417			`{`
418			`value = "{}";`
419			`type = "String";`
420			`}`
421			`datum sopceditor_expanded`
422			`{`
423			`value = "0";`
424			`type = "boolean";`
425			`}`
426			`}`
427			`}`
428			`]]>`
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496			`]]>`
497
498
499
500
501
502
503
504
505			`M512_MEMORY 0 M4K_MEMORY 1 M9K_MEMORY 0 M20K_MEMORY 0 M144K_MEMORY 0 MRAM_MEMORY 0 MLAB_MEMORY 0 ESB 0 EPCS 1 DSP 0 EMUL 1 HARDCOPY 0 LVDS_IO 0 ADDRESS_STALL 1 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 DSP_SHIFTER_BLOCK 0`
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520			`]]>`
521
522
523
524
525			`cpu.jtag_debug_module`
526
527
528
529			`kind="altera_avalon_jtag_uart"`
530			`version="10.0"`
531			`enabled="1"`
532			`name="jtag_uart">`
533
534
535
536
537
538			`INTERACTIVE_ASCII_OUTPUT`
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562			`kind="altera_avalon_onchip_memory2"`
563			`version="10.0"`
564			`enabled="1"`
565			`name="onchip_ram">`
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584			`kind="altera_avalon_new_sdram_controller"`
585			`version="10.0"`
586			`enabled="1"`
587			`name="sdram">`
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654			`kind="altera_avalon_epcs_flash_controller"`
655			`version="10.0"`
656			`enabled="1"`
657			`name="epcs_flash">`
658
659
660
661
662
663			`kind="altera_avalon_cfi_flash"`
664			`version="10.0"`
665			`enabled="1"`
666			`name="cfi_flash">`
667
668
669
670
671
672
673
674
675
676
677
678			`kind="altera_avalon_tri_state_bridge"`
679			`version="10.0"`
680			`enabled="1"`
681			`name="tri_state_bridge_flash">`
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709			`kind="avalon"`
710			`version="6.1"`
711			`start="cpu.instruction_master"`
712			`end="cpu.jtag_debug_module">`
713
714
715
716
717			`kind="avalon"`
718			`version="6.1"`
719			`start="cpu.data_master"`
720			`end="cpu.jtag_debug_module">`
721
722
723
724
725
726			`kind="avalon"`
727			`version="6.1"`
728			`start="cpu.data_master"`
729			`end="jtag_uart.avalon_jtag_slave">`
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746			`kind="avalon"`
747			`version="6.1"`
748			`start="cpu.instruction_master"`
749			`end="onchip_ram.s1">`
750
751
752
753
754			`kind="avalon"`
755			`version="6.1"`
756			`start="cpu.data_master"`
757			`end="onchip_ram.s1">`
758
759
760
761
762
763			`kind="avalon"`
764			`version="6.1"`
765			`start="cpu.instruction_master"`
766			`end="sdram.s1">`
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791			`kind="avalon"`
792			`version="6.1"`
793			`start="cpu.instruction_master"`
794			`end="epcs_flash.epcs_control_port">`
795
796
797
798
799			`kind="avalon"`
800			`version="6.1"`
801			`start="cpu.data_master"`
802			`end="epcs_flash.epcs_control_port">`
803
804
805
806
807			`kind="interrupt"`
808			`version="10.0"`
809			`start="cpu.d_irq"`
810			`end="epcs_flash.irq">`
811
812
813
814
815			`kind="clock"`
816			`version="10.0"`
817			`start="clk.clk"`
818			`end="tri_state_bridge_flash.clk" />`
819
820			`kind="avalon"`
821			`version="6.1"`
822			`start="cpu.instruction_master"`
823			`end="tri_state_bridge_flash.avalon_slave">`
824
825
826
827
828			`kind="avalon"`
829			`version="6.1"`
830			`start="cpu.data_master"`
831			`end="tri_state_bridge_flash.avalon_slave">`
832
833
834
835
836			`kind="avalon_tristate"`
837			`version="10.0"`
838			`start="tri_state_bridge_flash.tristate_master"`
839			`end="cfi_flash.s1">`
840
841
842
843
844
845			`kind="avalon"`
846			`version="6.1"`
847			`start="cpu.data_master"`
848			`end="sysid.control_slave">`
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868