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//////////////////////////////////////////////////////////////////////////////
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// //
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// Minimalistic 1-wire (onewire) master with Avalon MM bus interface //
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// //
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// Copyright (C) 2010 Iztok Jeras //
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// //
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//////////////////////////////////////////////////////////////////////////////
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// //
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// This program is free software: you can redistribute it and/or modify //
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// it under the terms of the GNU Lesser General Public License //
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// as published by the Free Software Foundation, either //
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// version 3 of the License, or (at your option) any later version. //
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// //
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// This program is distributed in the hope that it will be useful, //
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// but WITHOUT ANY WARRANTY; without even the implied warranty of //
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the //
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// GNU General Public License for more details. //
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// //
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// You should have received a copy of the GNU General Public License //
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// along with this program. If not, see <http://www.gnu.org/licenses/>. //
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// //
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//////////////////////////////////////////////////////////////////////////////
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#ifndef __SOCKIT_OWM_REGS_H__
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#define __SOCKIT_OWM_REGS_H__
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#include <io.h>
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//////////////////////////////////////////////////////////////////////////////
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// control status register //
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//////////////////////////////////////////////////////////////////////////////
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#define SOCKIT_OWM_CTL_REG 0
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#define IOADDR_SOCKIT_OWM_CTL(base) IO_CALC_ADDRESS_NATIVE(base, SOCKIT_OWM_CTL_REG)
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#define IORD_SOCKIT_OWM_CTL(base) IORD(base, SOCKIT_OWM_CTL_REG)
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#define IOWR_SOCKIT_OWM_CTL(base, data) IOWR(base, SOCKIT_OWM_CTL_REG, data)
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#define SOCKIT_OWM_CTL_DAT_MSK (0x00000001) // data bit
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#define SOCKIT_OWM_CTL_DAT_OFST (0)
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#define SOCKIT_OWM_CTL_RST_MSK (0x00000002) // reset
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#define SOCKIT_OWM_CTL_RST_OFST (1)
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#define SOCKIT_OWM_CTL_OVD_MSK (0x00000004) // overdrive
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#define SOCKIT_OWM_CTL_OVD_OFST (2)
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#define SOCKIT_OWM_CTL_CYC_MSK (0x00000008) // cycle
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#define SOCKIT_OWM_CTL_CYC_OFST (3)
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#define SOCKIT_OWM_CTL_PWR_MSK (0x00000010) // power (strong pull-up), if there is a single 1-wire line
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#define SOCKIT_OWM_CTL_PWR_OFST (5)
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#define SOCKIT_OWM_CTL_RSV_MSK (0x00000020) // reserved
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#define SOCKIT_OWM_CTL_RSV_OFST (5)
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#define SOCKIT_OWM_CTL_IRQ_MSK (0x00000040) // irq status
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#define SOCKIT_OWM_CTL_IRQ_OFST (6)
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#define SOCKIT_OWM_CTL_IEN_MSK (0x00000080) // irq enable
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#define SOCKIT_OWM_CTL_IEN_OFST (7)
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#define SOCKIT_OWM_CTL_SEL_MSK (0x00000f00) // port select number
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#define SOCKIT_OWM_CTL_SEL_OFST (8)
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#define SOCKIT_OWM_CTL_POWER_MSK (0xffff0000) // power (strong pull-up), if there is more than one 1-wire line
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#define SOCKIT_OWM_CTL_POWER_OFST (16)
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// two common commands
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#define SOCKIT_OWM_CTL_DLY_MSK ( SOCKIT_OWM_CTL_RST_MSK | SOCKIT_OWM_CTL_DAT_MSK)
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#define SOCKIT_OWM_CTL_IDL_MSK (SOCKIT_OWM_CTL_OVD_MSK | SOCKIT_OWM_CTL_RST_MSK | SOCKIT_OWM_CTL_DAT_MSK)
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//////////////////////////////////////////////////////////////////////////////
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// clock divider ratio register //
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//////////////////////////////////////////////////////////////////////////////
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#define SOCKIT_OWM_CDR_REG 1
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#define IOADDR_SOCKIT_OWM_CDR(base) IO_CALC_ADDRESS_NATIVE(base, SOCKIT_OWM_CDR_REG)
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#define IORD_SOCKIT_OWM_CDR(base) IORD(base, SOCKIT_OWM_CDR_REG)
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#define IOWR_SOCKIT_OWM_CDR(base, data) IOWR(base, SOCKIT_OWM_CDR_REG, data)
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#define SOCKIT_OWM_CDR_N_MSK (0x0000ffff) // normal mode
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#define SOCKIT_OWM_CDR_N_OFST (0)
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#define SOCKIT_OWM_CDR_O_MSK (0xffff0000) // overdrive mode
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#define SOCKIT_OWM_CDR_O_OFST (16)
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#endif /* __SOCKIT_OWM_REGS_H__ */
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