URL
https://opencores.org/ocsvn/softavrcore/softavrcore/trunk
[/] [softavrcore/] [trunk/] [synth/] [top-digilent_nexys_a7-cx7a100t.xdc] - Blame information for rev 2
Details |
Compare with Previous |
View Log
Line No. |
Rev |
Author |
Line |
1 |
2 |
apal |
set_property -dict { IOSTANDARD LVCMOS33 PACKAGE_PIN E3 } [get_ports hwclk]
|
2 |
|
|
set_property -dict { IOSTANDARD LVCMOS33 PACKAGE_PIN H17 } [get_ports {led[0]}]
|
3 |
|
|
set_property -dict { IOSTANDARD LVCMOS33 PACKAGE_PIN K15 } [get_ports {led[1]}]
|
4 |
|
|
set_property -dict { IOSTANDARD LVCMOS33 PACKAGE_PIN C4 } [get_ports ftdi_rx]
|
5 |
|
|
set_property -dict { IOSTANDARD LVCMOS33 PACKAGE_PIN D4 } [get_ports ftdi_tx]
|
6 |
|
|
|
7 |
|
|
create_clock -period 10 [get_ports hwclk]
|
8 |
|
|
|
9 |
|
|
set_property CONFIG_VOLTAGE 3.3 [current_design]
|
10 |
|
|
set_property CFGBVS VCCO [current_design]
|
11 |
|
|
|
© copyright 1999-2024
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.