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[/] [spacewire/] [tags/] [arelease/] [tb/] [tb_CODEC.tf] - Blame information for rev 5

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// F:\XILINX\MY-PROJECTS\SPACEWIRE_1355
// Verilog Test fixture created by
// HDL Bencher 6.1i
// Fri Apr 01 09:21:08 2005
//
// Notes:
// 1) This test fixture has been automatically generated from
//    Test Bench Waveform
// 2) Modified by btltz
 
`timescale 1ns/100ps
 
module tb_CODEC;
        wire Do;
        wire So;
        reg Di;
        reg Si;
        wire [5:0] PPUstate;
        wire LINK_ERR_o;
        wire err_int_o;
        wire tx_drvclk_o;
        wire rdbuf_o;
        reg Tx_type_i;
        reg [7:0] data_i;
        reg Txbuf_Empty;
        wire rx_drvclk_o;
        wire wrbuf_o;
        wire Rx_type_o;
        wire [7:0] data_o;
        reg Rxbuf_Full;
        wire [5:0] TIMEout;
        wire [1:0] CtrlFlg_o;
        wire TICK_OUT;
        wire Rx_DLL_LOCKED;
        reg [5:0] TIMEin;
        reg [1:0] CtrlFlg_i;
        reg TICK_IN;
        wire active;
        reg lnk_start;
        reg lnk_dis;
        reg AUTOSTART;
        reg reset;
        //reg clk10;
        reg gclk;
        reg GSR;        //Global signal, this was added automatically
 
        assign glbl.GSR = GSR;
                                        /*
        defparam UUT.DW = 8;
        defparam UUT.True = 1;
        defparam UUT.False = 0;  */
 
        SPW_CODEC intl_CODEC (
                .Do(Do),
                .So(So),
                .Di(Di),
                .Si(Si),
                .PPUstate(PPUstate),
                .LINK_ERR_o(LINK_ERR_o),
                .err_int_o(err_int_o),
                .tx_drvclk_o(tx_drvclk_o),
                .rdbuf_o(rdbuf_o),
                .Tx_type_i(Tx_type_i),
                .data_i(data_i),
                .Txbuf_Empty(Txbuf_Empty),
                .Rx_DLL_LOCKED(Rx_DLL_LOCKED),
                .rx_drvclk_o(rx_drvclk_o),
                .wrbuf_o(wrbuf_o),
                .Rx_type_o(Rx_type_o),
                .data_o(data_o),
                .Rxbuf_Full(Rxbuf_Full),
                .TIMEout(TIMEout),
                .CtrlFlg_o(CtrlFlg_o),
                .TICK_OUT(TICK_OUT),
                .TIMEin(TIMEin),
                .CtrlFlg_i(CtrlFlg_i),
                .TICK_IN(TICK_IN),
                .active(active),
                .lnk_start(lnk_start),
                .lnk_dis(lnk_dis),
                .AUTOSTART(AUTOSTART),
                .reset(reset),
        //      .clk10(clk10),
                .gclk(gclk)
        );
 
        integer TX_FILE;
        integer TX_ERROR;
 
  /*
always
begin                   //clock process
        clk10 = 1'b0;
        #4
        clk10 = 1'b1;
        #20  //output valid
        #30
        clk10 = 1'b0;
        #46
        clk10 = 1'b0;
end     */
 
always
begin                   //clock process
        gclk = 1'b0;
        #4      //L
        gclk = 1'b1;
        #5      /*outpur valid*/
        #5
        gclk = 1'b0;
        #6//L
        gclk = 1'b0;
end
 
initial  //FPGA GSR
begin
        GSR = 1;
        #100 GSR = 0;
end
 
initial
begin
        TX_ERROR=0;
        TX_FILE=$fopen("results.txt");
 
        // --------------------
        Di = 1'b0;
        Si = 1'b0;
        Rxbuf_Full = 1'b0;
        lnk_start = 1'b0;
        lnk_dis = 1'b0;
        AUTOSTART = 1'b0;
        // --------------------
        #100 // Time=100 ns
        lnk_start = 1'b1;
        // --------------------
        #100 // Time=200 ns
        AUTOSTART = 1'b1;
        //========================================wait for PPU 6.4uS + 12.8uS + 1clk
        #20000   //20uS
                Di = 1'b0;
                Si = 1'b0;
        // =========================================================================
        #1800 // Time=2000 ns
        Si = 1'b1;
        // --------------------
        #100 // Time=2100 ns
        Di = 1'b1;
        // --------------------
        #100 // Time=2200 ns
        Si = 1'b0;
        // --------------------
        #100 // Time=2300 ns
        Si = 1'b1;
        // --------------------
        #100 // Time=2400 ns
        Di = 1'b0;
        // --------------------
        #100 // Time=2500 ns
        Di = 1'b1;
        // --------------------
        #100 // Time=2600 ns
        Di = 1'b0;
        // --------------------
        #100 // Time=2700 ns
        Si = 1'b0;
        // --------------------
        #100 // Time=2800 ns
        Di = 1'b1;
        // --------------------
        #100 // Time=2900 ns
        Si = 1'b1;
        // --------------------
        #100 // Time=3000 ns
        Si = 1'b0;
        // --------------------
        #100 // Time=3100 ns
        Si = 1'b1;
        // --------------------
        #100 // Time=3200 ns
        Di = 1'b0;
        // --------------------
        #100 // Time=3300 ns
        Di = 1'b1;
        // --------------------
        #100 // Time=3400 ns
        Di = 1'b0;
        // --------------------
        #100 // Time=3500 ns
        Si = 1'b0;
        // --------------------
        #100 // Time=3600 ns
        Si = 1'b1;
        // --------------------
        #100 // Time=3700 ns
        Di = 1'b1;
        // --------------------
        #100 // Time=3800 ns
        Si = 1'b0;
        // --------------------
        #100 // Time=3900 ns
        Si = 1'b1;
        // --------------------
        #100 // Time=4000 ns
        Di = 1'b0;
        // --------------------
        #100 // Time=4100 ns
        Di = 1'b1;
        // --------------------
        #100 // Time=4200 ns
        Di = 1'b0;
        // --------------------
        #100 // Time=4300 ns
        Si = 1'b0;
        // --------------------
        #100 // Time=4400 ns
        Di = 1'b1;
        // --------------------
        #100 // Time=4500 ns
        Si = 1'b1;
        // --------------------
        #100 // Time=4600 ns
        Di = 1'b0;
        // --------------------
        #100 // Time=4700 ns
        Si = 1'b0;
        // --------------------
        #100 // Time=4800 ns
        Di = 1'b1;
        // --------------------
        #100 // Time=4900 ns
        Di = 1'b0;
        // --------------------
        #100 // Time=5000 ns
        Di = 1'b1;
        Si = 1'b0;
        // --------------------
        #100 // Time=5100 ns
        Si = 1'b1;
        // --------------------
        #100 // Time=5200 ns
        Si = 1'b0;
        // --------------------
        #100 // Time=5300 ns
        Si = 1'b1;
        // --------------------
        #100 // Time=5400 ns
        Si = 1'b0;
        // --------------------
        #100 // Time=5500 ns
        Di = 1'b0;
        // --------------------
        #800 // Time=6300 ns
        // --------------------
 
        if (TX_ERROR == 0) begin
                $display("No errors or warnings");
                $fdisplay(TX_FILE,"No errors or warnings");
        end else begin
                $display("%d errors found in simulation",TX_ERROR);
                $fdisplay(TX_FILE,"%d errors found in simulation",TX_ERROR);
        end
 
        $fclose(TX_FILE);
        $stop;
 
end
 
initial
begin
        TX_ERROR=0;
        TX_FILE=$fopen("results.txt");
 
        // --------------------
        Tx_type_i = 1'b0;
        data_i = 8'b00000000; //0
        Txbuf_Empty = 1'b0;
        TIMEin = 6'b000000; //0
        CtrlFlg_i = 2'b00; //0
        TICK_IN = 1'b0;
        reset = 1'b0;
        // --------------------
        #1600 // Time=1600 ns
        reset = 1'b1;
        // --------------------
        #150 // Time=1750 ns
        reset = 1'b0;
        //===========================================================
                #20000   //20uS
   data_i = 8'b00000001; //1
        // ===============================================
        #1300 // Time=3050 ns
        reset = 1'b0;
        // --------------------
        #550 // Time=3600 ns
        reset = 1'b1;
        // --------------------
        #50 // Time=3650 ns
        data_i = 8'b01111011; //7B
        // --------------------
        #100 // Time=3750 ns
        reset = 1'b0;
        // --------------------
        #400 // Time=4150 ns
        data_i = 8'b01111111; //7F
        // --------------------
        #500 // Time=4650 ns
        data_i = 8'b10000011; //83
        // --------------------
        #500 // Time=5150 ns
        data_i = 8'b10000111; //87
        // --------------------
        #500 // Time=5650 ns
        Tx_type_i = 1'b1;
        data_i = 8'b00000101; //5
        // --------------------
        #450 // Time=6100 ns
        Tx_type_i = 1'b1;
        // --------------------
        #50 // Time=6150 ns
        Tx_type_i = 1'b0;
        data_i = 8'b10001111; //8F
        // --------------------
        #150 // Time=6300 ns
        // --------------------
 
        if (TX_ERROR == 0) begin
                $display("No errors or warnings---Model Sim 5.7c");
                $fdisplay(TX_FILE,"No errors or warnings");
        end else begin
                $display("%d errors found in simulation",TX_ERROR);
                $fdisplay(TX_FILE,"%d errors found in simulation",TX_ERROR);
        end
 
        $fclose(TX_FILE);
        $stop;
 
end
 
task CHECK_Do;
        input NEXT_Do;
 
        #0 begin
                if (NEXT_Do !== Do) begin
                        $display("Error at time=%dns Do=%b, expected=%b",
                                $time, Do, NEXT_Do);
                        $fdisplay(TX_FILE,"Error at time=%dns Do=%b, expected=%b",
                                $time, Do, NEXT_Do);
                        TX_ERROR = TX_ERROR + 1;
                end
        end
endtask
 
task CHECK_So;
        input NEXT_So;
 
        #0 begin
                if (NEXT_So !== So) begin
                        $display("Error at time=%dns So=%b, expected=%b",
                                $time, So, NEXT_So);
                        $fdisplay(TX_FILE,"Error at time=%dns So=%b, expected=%b",
                                $time, So, NEXT_So);
                        TX_ERROR = TX_ERROR + 1;
                end
        end
endtask
 
task CHECK_PPUstate;
        input [5:0] NEXT_PPUstate;
 
        #0 begin
                if (NEXT_PPUstate !== PPUstate) begin
                        $display("Error at time=%dns PPUstate=%b, expected=%b",
                                $time, PPUstate, NEXT_PPUstate);
                        $fdisplay(TX_FILE,"Error at time=%dns PPUstate=%b, expected=%b",
                                $time, PPUstate, NEXT_PPUstate);
                        TX_ERROR = TX_ERROR + 1;
                end
        end
endtask
 
task CHECK_LINK_ERR_o;
        input NEXT_LINK_ERR_o;
 
        #0 begin
                if (NEXT_LINK_ERR_o !== LINK_ERR_o) begin
                        $display("Error at time=%dns LINK_ERR_o=%b, expected=%b",
                                $time, LINK_ERR_o, NEXT_LINK_ERR_o);
                        $fdisplay(TX_FILE,"Error at time=%dns LINK_ERR_o=%b, expected=%b",
                                $time, LINK_ERR_o, NEXT_LINK_ERR_o);
                        TX_ERROR = TX_ERROR + 1;
                end
        end
endtask
 
task CHECK_err_int_o;
        input NEXT_err_int_o;
 
        #0 begin
                if (NEXT_err_int_o !== err_int_o) begin
                        $display("Error at time=%dns err_int_o=%b, expected=%b",
                                $time, err_int_o, NEXT_err_int_o);
                        $fdisplay(TX_FILE,"Error at time=%dns err_int_o=%b, expected=%b",
                                $time, err_int_o, NEXT_err_int_o);
                        TX_ERROR = TX_ERROR + 1;
                end
        end
endtask
 
task CHECK_tx_drvclk_o;
        input NEXT_tx_drvclk_o;
 
        #0 begin
                if (NEXT_tx_drvclk_o !== tx_drvclk_o) begin
                        $display("Error at time=%dns tx_drvclk_o=%b, expected=%b",
                                $time, tx_drvclk_o, NEXT_tx_drvclk_o);
                        $fdisplay(TX_FILE,"Error at time=%dns tx_drvclk_o=%b, expected=%b",
                                $time, tx_drvclk_o, NEXT_tx_drvclk_o);
                        TX_ERROR = TX_ERROR + 1;
                end
        end
endtask
 
task CHECK_rdbuf_o;
        input NEXT_rdbuf_o;
 
        #0 begin
                if (NEXT_rdbuf_o !== rdbuf_o) begin
                        $display("Error at time=%dns rdbuf_o=%b, expected=%b",
                                $time, rdbuf_o, NEXT_rdbuf_o);
                        $fdisplay(TX_FILE,"Error at time=%dns rdbuf_o=%b, expected=%b",
                                $time, rdbuf_o, NEXT_rdbuf_o);
                        TX_ERROR = TX_ERROR + 1;
                end
        end
endtask
 
task CHECK_rx_drvclk_o;
        input NEXT_rx_drvclk_o;
 
        #0 begin
                if (NEXT_rx_drvclk_o !== rx_drvclk_o) begin
                        $display("Error at time=%dns rx_drvclk_o=%b, expected=%b",
                                $time, rx_drvclk_o, NEXT_rx_drvclk_o);
                        $fdisplay(TX_FILE,"Error at time=%dns rx_drvclk_o=%b, expected=%b",
                                $time, rx_drvclk_o, NEXT_rx_drvclk_o);
                        TX_ERROR = TX_ERROR + 1;
                end
        end
endtask
 
task CHECK_wrbuf_o;
        input NEXT_wrbuf_o;
 
        #0 begin
                if (NEXT_wrbuf_o !== wrbuf_o) begin
                        $display("Error at time=%dns wrbuf_o=%b, expected=%b",
                                $time, wrbuf_o, NEXT_wrbuf_o);
                        $fdisplay(TX_FILE,"Error at time=%dns wrbuf_o=%b, expected=%b",
                                $time, wrbuf_o, NEXT_wrbuf_o);
                        TX_ERROR = TX_ERROR + 1;
                end
        end
endtask
 
task CHECK_Rx_type_o;
        input NEXT_Rx_type_o;
 
        #0 begin
                if (NEXT_Rx_type_o !== Rx_type_o) begin
                        $display("Error at time=%dns Rx_type_o=%b, expected=%b",
                                $time, Rx_type_o, NEXT_Rx_type_o);
                        $fdisplay(TX_FILE,"Error at time=%dns Rx_type_o=%b, expected=%b",
                                $time, Rx_type_o, NEXT_Rx_type_o);
                        TX_ERROR = TX_ERROR + 1;
                end
        end
endtask
 
task CHECK_data_o;
        input [7:0] NEXT_data_o;
 
        #0 begin
                if (NEXT_data_o !== data_o) begin
                        $display("Error at time=%dns data_o=%b, expected=%b",
                                $time, data_o, NEXT_data_o);
                        $fdisplay(TX_FILE,"Error at time=%dns data_o=%b, expected=%b",
                                $time, data_o, NEXT_data_o);
                        TX_ERROR = TX_ERROR + 1;
                end
        end
endtask
 
task CHECK_TIMEout;
        input [5:0] NEXT_TIMEout;
 
        #0 begin
                if (NEXT_TIMEout !== TIMEout) begin
                        $display("Error at time=%dns TIMEout=%b, expected=%b",
                                $time, TIMEout, NEXT_TIMEout);
                        $fdisplay(TX_FILE,"Error at time=%dns TIMEout=%b, expected=%b",
                                $time, TIMEout, NEXT_TIMEout);
                        TX_ERROR = TX_ERROR + 1;
                end
        end
endtask
 
task CHECK_CtrlFlg_o;
        input [1:0] NEXT_CtrlFlg_o;
 
        #0 begin
                if (NEXT_CtrlFlg_o !== CtrlFlg_o) begin
                        $display("Error at time=%dns CtrlFlg_o=%b, expected=%b",
                                $time, CtrlFlg_o, NEXT_CtrlFlg_o);
                        $fdisplay(TX_FILE,"Error at time=%dns CtrlFlg_o=%b, expected=%b",
                                $time, CtrlFlg_o, NEXT_CtrlFlg_o);
                        TX_ERROR = TX_ERROR + 1;
                end
        end
endtask
 
task CHECK_TICK_OUT;
        input NEXT_TICK_OUT;
 
        #0 begin
                if (NEXT_TICK_OUT !== TICK_OUT) begin
                        $display("Error at time=%dns TICK_OUT=%b, expected=%b",
                                $time, TICK_OUT, NEXT_TICK_OUT);
                        $fdisplay(TX_FILE,"Error at time=%dns TICK_OUT=%b, expected=%b",
                                $time, TICK_OUT, NEXT_TICK_OUT);
                        TX_ERROR = TX_ERROR + 1;
                end
        end
endtask
 
task CHECK_active;
        input NEXT_active;
 
        #0 begin
                if (NEXT_active !== active) begin
                        $display("Error at time=%dns active=%b, expected=%b",
                                $time, active, NEXT_active);
                        $fdisplay(TX_FILE,"Error at time=%dns active=%b, expected=%b",
                                $time, active, NEXT_active);
                        TX_ERROR = TX_ERROR + 1;
                end
        end
endtask
 
endmodule

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Subversion Repositories spacewire

[/] [spacewire/] [tags/] [arelease/] [tb/] [tb_CODEC.tf] - Blame information for rev 5

Line No.	Rev	Author	Line
1	2	btltz	`// F:\XILINX\MY-PROJECTS\SPACEWIRE_1355`
2			`// Verilog Test fixture created by`
3			`// HDL Bencher 6.1i`
4			`// Fri Apr 01 09:21:08 2005`
5			`//`
6			`// Notes:`
7			`// 1) This test fixture has been automatically generated from`
8			`// Test Bench Waveform`
9			`// 2) Modified by btltz`
10
11			`timescale 1ns/100ps
12
13			`module tb_CODEC;`
14			`wire Do;`
15			`wire So;`
16			`reg Di;`
17			`reg Si;`
18			`wire [5:0] PPUstate;`
19			`wire LINK_ERR_o;`
20			`wire err_int_o;`
21			`wire tx_drvclk_o;`
22			`wire rdbuf_o;`
23			`reg Tx_type_i;`
24			`reg [7:0] data_i;`
25			`reg Txbuf_Empty;`
26			`wire rx_drvclk_o;`
27			`wire wrbuf_o;`
28			`wire Rx_type_o;`
29			`wire [7:0] data_o;`
30			`reg Rxbuf_Full;`
31			`wire [5:0] TIMEout;`
32			`wire [1:0] CtrlFlg_o;`
33			`wire TICK_OUT;`
34			`wire Rx_DLL_LOCKED;`
35			`reg [5:0] TIMEin;`
36			`reg [1:0] CtrlFlg_i;`
37			`reg TICK_IN;`
38			`wire active;`
39			`reg lnk_start;`
40			`reg lnk_dis;`
41			`reg AUTOSTART;`
42			`reg reset;`
43			`//reg clk10;`
44			`reg gclk;`
45			`reg GSR; //Global signal, this was added automatically`
46
47			`assign glbl.GSR = GSR;`
48			`/*`
49			`defparam UUT.DW = 8;`
50			`defparam UUT.True = 1;`
51			`defparam UUT.False = 0; */`
52
53			`SPW_CODEC intl_CODEC (`
54			`.Do(Do),`
55			`.So(So),`
56			`.Di(Di),`
57			`.Si(Si),`
58			`.PPUstate(PPUstate),`
59			`.LINK_ERR_o(LINK_ERR_o),`
60			`.err_int_o(err_int_o),`
61			`.tx_drvclk_o(tx_drvclk_o),`
62			`.rdbuf_o(rdbuf_o),`
63			`.Tx_type_i(Tx_type_i),`
64			`.data_i(data_i),`
65			`.Txbuf_Empty(Txbuf_Empty),`
66			`.Rx_DLL_LOCKED(Rx_DLL_LOCKED),`
67			`.rx_drvclk_o(rx_drvclk_o),`
68			`.wrbuf_o(wrbuf_o),`
69			`.Rx_type_o(Rx_type_o),`
70			`.data_o(data_o),`
71			`.Rxbuf_Full(Rxbuf_Full),`
72			`.TIMEout(TIMEout),`
73			`.CtrlFlg_o(CtrlFlg_o),`
74			`.TICK_OUT(TICK_OUT),`
75			`.TIMEin(TIMEin),`
76			`.CtrlFlg_i(CtrlFlg_i),`
77			`.TICK_IN(TICK_IN),`
78			`.active(active),`
79			`.lnk_start(lnk_start),`
80			`.lnk_dis(lnk_dis),`
81			`.AUTOSTART(AUTOSTART),`
82			`.reset(reset),`
83			`// .clk10(clk10),`
84			`.gclk(gclk)`
85			`);`
86
87			`integer TX_FILE;`
88			`integer TX_ERROR;`
89
90			`/*`
91			`always`
92			`begin //clock process`
93			`clk10 = 1'b0;`
94			`#4`
95			`clk10 = 1'b1;`
96			`#20 //output valid`
97			`#30`
98			`clk10 = 1'b0;`
99			`#46`
100			`clk10 = 1'b0;`
101			`end */`
102
103			`always`
104			`begin //clock process`
105			`gclk = 1'b0;`
106			`#4 //L`
107			`gclk = 1'b1;`
108			`#5 /outpur valid/`
109			`#5`
110			`gclk = 1'b0;`
111			`#6//L`
112			`gclk = 1'b0;`
113			`end`
114
115			`initial //FPGA GSR`
116			`begin`
117			`GSR = 1;`
118			`#100 GSR = 0;`
119			`end`
120
121			`initial`
122			`begin`
123			`TX_ERROR=0;`
124			`TX_FILE=$fopen("results.txt");`
125
126			`// --------------------`
127			`Di = 1'b0;`
128			`Si = 1'b0;`
129			`Rxbuf_Full = 1'b0;`
130			`lnk_start = 1'b0;`
131			`lnk_dis = 1'b0;`
132			`AUTOSTART = 1'b0;`
133			`// --------------------`
134			`#100 // Time=100 ns`
135			`lnk_start = 1'b1;`
136			`// --------------------`
137			`#100 // Time=200 ns`
138			`AUTOSTART = 1'b1;`
139			`//========================================wait for PPU 6.4uS + 12.8uS + 1clk`
140			`#20000 //20uS`
141			`Di = 1'b0;`
142			`Si = 1'b0;`
143			`// =========================================================================`
144			`#1800 // Time=2000 ns`
145			`Si = 1'b1;`
146			`// --------------------`
147			`#100 // Time=2100 ns`
148			`Di = 1'b1;`
149			`// --------------------`
150			`#100 // Time=2200 ns`
151			`Si = 1'b0;`
152			`// --------------------`
153			`#100 // Time=2300 ns`
154			`Si = 1'b1;`
155			`// --------------------`
156			`#100 // Time=2400 ns`
157			`Di = 1'b0;`
158			`// --------------------`
159			`#100 // Time=2500 ns`
160			`Di = 1'b1;`
161			`// --------------------`
162			`#100 // Time=2600 ns`
163			`Di = 1'b0;`
164			`// --------------------`
165			`#100 // Time=2700 ns`
166			`Si = 1'b0;`
167			`// --------------------`
168			`#100 // Time=2800 ns`
169			`Di = 1'b1;`
170			`// --------------------`
171			`#100 // Time=2900 ns`
172			`Si = 1'b1;`
173			`// --------------------`
174			`#100 // Time=3000 ns`
175			`Si = 1'b0;`
176			`// --------------------`
177			`#100 // Time=3100 ns`
178			`Si = 1'b1;`
179			`// --------------------`
180			`#100 // Time=3200 ns`
181			`Di = 1'b0;`
182			`// --------------------`
183			`#100 // Time=3300 ns`
184			`Di = 1'b1;`
185			`// --------------------`
186			`#100 // Time=3400 ns`
187			`Di = 1'b0;`
188			`// --------------------`
189			`#100 // Time=3500 ns`
190			`Si = 1'b0;`
191			`// --------------------`
192			`#100 // Time=3600 ns`
193			`Si = 1'b1;`
194			`// --------------------`
195			`#100 // Time=3700 ns`
196			`Di = 1'b1;`
197			`// --------------------`
198			`#100 // Time=3800 ns`
199			`Si = 1'b0;`
200			`// --------------------`
201			`#100 // Time=3900 ns`
202			`Si = 1'b1;`
203			`// --------------------`
204			`#100 // Time=4000 ns`
205			`Di = 1'b0;`
206			`// --------------------`
207			`#100 // Time=4100 ns`
208			`Di = 1'b1;`
209			`// --------------------`
210			`#100 // Time=4200 ns`
211			`Di = 1'b0;`
212			`// --------------------`
213			`#100 // Time=4300 ns`
214			`Si = 1'b0;`
215			`// --------------------`
216			`#100 // Time=4400 ns`
217			`Di = 1'b1;`
218			`// --------------------`
219			`#100 // Time=4500 ns`
220			`Si = 1'b1;`
221			`// --------------------`
222			`#100 // Time=4600 ns`
223			`Di = 1'b0;`
224			`// --------------------`
225			`#100 // Time=4700 ns`
226			`Si = 1'b0;`
227			`// --------------------`
228			`#100 // Time=4800 ns`
229			`Di = 1'b1;`
230			`// --------------------`
231			`#100 // Time=4900 ns`
232			`Di = 1'b0;`
233			`// --------------------`
234			`#100 // Time=5000 ns`
235			`Di = 1'b1;`
236			`Si = 1'b0;`
237			`// --------------------`
238			`#100 // Time=5100 ns`
239			`Si = 1'b1;`
240			`// --------------------`
241			`#100 // Time=5200 ns`
242			`Si = 1'b0;`
243			`// --------------------`
244			`#100 // Time=5300 ns`
245			`Si = 1'b1;`
246			`// --------------------`
247			`#100 // Time=5400 ns`
248			`Si = 1'b0;`
249			`// --------------------`
250			`#100 // Time=5500 ns`
251			`Di = 1'b0;`
252			`// --------------------`
253			`#800 // Time=6300 ns`
254			`// --------------------`
255
256			`if (TX_ERROR == 0) begin`
257			`$display("No errors or warnings");`
258			`$fdisplay(TX_FILE,"No errors or warnings");`
259			`end else begin`
260			`$display("%d errors found in simulation",TX_ERROR);`
261			`$fdisplay(TX_FILE,"%d errors found in simulation",TX_ERROR);`
262			`end`
263
264			`$fclose(TX_FILE);`
265			`$stop;`
266
267			`end`
268
269			`initial`
270			`begin`
271			`TX_ERROR=0;`
272			`TX_FILE=$fopen("results.txt");`
273
274			`// --------------------`
275			`Tx_type_i = 1'b0;`
276			`data_i = 8'b00000000; //0`
277			`Txbuf_Empty = 1'b0;`
278			`TIMEin = 6'b000000; //0`
279			`CtrlFlg_i = 2'b00; //0`
280			`TICK_IN = 1'b0;`
281			`reset = 1'b0;`
282			`// --------------------`
283			`#1600 // Time=1600 ns`
284			`reset = 1'b1;`
285			`// --------------------`
286			`#150 // Time=1750 ns`
287			`reset = 1'b0;`
288			`//===========================================================`
289			`#20000 //20uS`
290			`data_i = 8'b00000001; //1`
291			`// ===============================================`
292			`#1300 // Time=3050 ns`
293			`reset = 1'b0;`
294			`// --------------------`
295			`#550 // Time=3600 ns`
296			`reset = 1'b1;`
297			`// --------------------`
298			`#50 // Time=3650 ns`
299			`data_i = 8'b01111011; //7B`
300			`// --------------------`
301			`#100 // Time=3750 ns`
302			`reset = 1'b0;`
303			`// --------------------`
304			`#400 // Time=4150 ns`
305			`data_i = 8'b01111111; //7F`
306			`// --------------------`
307			`#500 // Time=4650 ns`
308			`data_i = 8'b10000011; //83`
309			`// --------------------`
310			`#500 // Time=5150 ns`
311			`data_i = 8'b10000111; //87`
312			`// --------------------`
313			`#500 // Time=5650 ns`
314			`Tx_type_i = 1'b1;`
315			`data_i = 8'b00000101; //5`
316			`// --------------------`
317			`#450 // Time=6100 ns`
318			`Tx_type_i = 1'b1;`
319			`// --------------------`
320			`#50 // Time=6150 ns`
321			`Tx_type_i = 1'b0;`
322			`data_i = 8'b10001111; //8F`
323			`// --------------------`
324			`#150 // Time=6300 ns`
325			`// --------------------`
326
327			`if (TX_ERROR == 0) begin`
328			`$display("No errors or warnings---Model Sim 5.7c");`
329			`$fdisplay(TX_FILE,"No errors or warnings");`
330			`end else begin`
331			`$display("%d errors found in simulation",TX_ERROR);`
332			`$fdisplay(TX_FILE,"%d errors found in simulation",TX_ERROR);`
333			`end`
334
335			`$fclose(TX_FILE);`
336			`$stop;`
337
338			`end`
339
340			`task CHECK_Do;`
341			`input NEXT_Do;`
342
343			`#0 begin`
344			`if (NEXT_Do !== Do) begin`
345			`$display("Error at time=%dns Do=%b, expected=%b",`
346			`$time, Do, NEXT_Do);`
347			`$fdisplay(TX_FILE,"Error at time=%dns Do=%b, expected=%b",`
348			`$time, Do, NEXT_Do);`
349			`TX_ERROR = TX_ERROR + 1;`
350			`end`
351			`end`
352			`endtask`
353
354			`task CHECK_So;`
355			`input NEXT_So;`
356
357			`#0 begin`
358			`if (NEXT_So !== So) begin`
359			`$display("Error at time=%dns So=%b, expected=%b",`
360			`$time, So, NEXT_So);`
361			`$fdisplay(TX_FILE,"Error at time=%dns So=%b, expected=%b",`
362			`$time, So, NEXT_So);`
363			`TX_ERROR = TX_ERROR + 1;`
364			`end`
365			`end`
366			`endtask`
367
368			`task CHECK_PPUstate;`
369			`input [5:0] NEXT_PPUstate;`
370
371			`#0 begin`
372			`if (NEXT_PPUstate !== PPUstate) begin`
373			`$display("Error at time=%dns PPUstate=%b, expected=%b",`
374			`$time, PPUstate, NEXT_PPUstate);`
375			`$fdisplay(TX_FILE,"Error at time=%dns PPUstate=%b, expected=%b",`
376			`$time, PPUstate, NEXT_PPUstate);`
377			`TX_ERROR = TX_ERROR + 1;`
378			`end`
379			`end`
380			`endtask`
381
382			`task CHECK_LINK_ERR_o;`
383			`input NEXT_LINK_ERR_o;`
384
385			`#0 begin`
386			`if (NEXT_LINK_ERR_o !== LINK_ERR_o) begin`
387			`$display("Error at time=%dns LINK_ERR_o=%b, expected=%b",`
388			`$time, LINK_ERR_o, NEXT_LINK_ERR_o);`
389			`$fdisplay(TX_FILE,"Error at time=%dns LINK_ERR_o=%b, expected=%b",`
390			`$time, LINK_ERR_o, NEXT_LINK_ERR_o);`
391			`TX_ERROR = TX_ERROR + 1;`
392			`end`
393			`end`
394			`endtask`
395
396			`task CHECK_err_int_o;`
397			`input NEXT_err_int_o;`
398
399			`#0 begin`
400			`if (NEXT_err_int_o !== err_int_o) begin`
401			`$display("Error at time=%dns err_int_o=%b, expected=%b",`
402			`$time, err_int_o, NEXT_err_int_o);`
403			`$fdisplay(TX_FILE,"Error at time=%dns err_int_o=%b, expected=%b",`
404			`$time, err_int_o, NEXT_err_int_o);`
405			`TX_ERROR = TX_ERROR + 1;`
406			`end`
407			`end`
408			`endtask`
409
410			`task CHECK_tx_drvclk_o;`
411			`input NEXT_tx_drvclk_o;`
412
413			`#0 begin`
414			`if (NEXT_tx_drvclk_o !== tx_drvclk_o) begin`
415			`$display("Error at time=%dns tx_drvclk_o=%b, expected=%b",`
416			`$time, tx_drvclk_o, NEXT_tx_drvclk_o);`
417			`$fdisplay(TX_FILE,"Error at time=%dns tx_drvclk_o=%b, expected=%b",`
418			`$time, tx_drvclk_o, NEXT_tx_drvclk_o);`
419			`TX_ERROR = TX_ERROR + 1;`
420			`end`
421			`end`
422			`endtask`
423
424			`task CHECK_rdbuf_o;`
425			`input NEXT_rdbuf_o;`
426
427			`#0 begin`
428			`if (NEXT_rdbuf_o !== rdbuf_o) begin`
429			`$display("Error at time=%dns rdbuf_o=%b, expected=%b",`
430			`$time, rdbuf_o, NEXT_rdbuf_o);`
431			`$fdisplay(TX_FILE,"Error at time=%dns rdbuf_o=%b, expected=%b",`
432			`$time, rdbuf_o, NEXT_rdbuf_o);`
433			`TX_ERROR = TX_ERROR + 1;`
434			`end`
435			`end`
436			`endtask`
437
438			`task CHECK_rx_drvclk_o;`
439			`input NEXT_rx_drvclk_o;`
440
441			`#0 begin`
442			`if (NEXT_rx_drvclk_o !== rx_drvclk_o) begin`
443			`$display("Error at time=%dns rx_drvclk_o=%b, expected=%b",`
444			`$time, rx_drvclk_o, NEXT_rx_drvclk_o);`
445			`$fdisplay(TX_FILE,"Error at time=%dns rx_drvclk_o=%b, expected=%b",`
446			`$time, rx_drvclk_o, NEXT_rx_drvclk_o);`
447			`TX_ERROR = TX_ERROR + 1;`
448			`end`
449			`end`
450			`endtask`
451
452			`task CHECK_wrbuf_o;`
453			`input NEXT_wrbuf_o;`
454
455			`#0 begin`
456			`if (NEXT_wrbuf_o !== wrbuf_o) begin`
457			`$display("Error at time=%dns wrbuf_o=%b, expected=%b",`
458			`$time, wrbuf_o, NEXT_wrbuf_o);`
459			`$fdisplay(TX_FILE,"Error at time=%dns wrbuf_o=%b, expected=%b",`
460			`$time, wrbuf_o, NEXT_wrbuf_o);`
461			`TX_ERROR = TX_ERROR + 1;`
462			`end`
463			`end`
464			`endtask`
465
466			`task CHECK_Rx_type_o;`
467			`input NEXT_Rx_type_o;`
468
469			`#0 begin`
470			`if (NEXT_Rx_type_o !== Rx_type_o) begin`
471			`$display("Error at time=%dns Rx_type_o=%b, expected=%b",`
472			`$time, Rx_type_o, NEXT_Rx_type_o);`
473			`$fdisplay(TX_FILE,"Error at time=%dns Rx_type_o=%b, expected=%b",`
474			`$time, Rx_type_o, NEXT_Rx_type_o);`
475			`TX_ERROR = TX_ERROR + 1;`
476			`end`
477			`end`
478			`endtask`
479
480			`task CHECK_data_o;`
481			`input [7:0] NEXT_data_o;`
482
483			`#0 begin`
484			`if (NEXT_data_o !== data_o) begin`
485			`$display("Error at time=%dns data_o=%b, expected=%b",`
486			`$time, data_o, NEXT_data_o);`
487			`$fdisplay(TX_FILE,"Error at time=%dns data_o=%b, expected=%b",`
488			`$time, data_o, NEXT_data_o);`
489			`TX_ERROR = TX_ERROR + 1;`
490			`end`
491			`end`
492			`endtask`
493
494			`task CHECK_TIMEout;`
495			`input [5:0] NEXT_TIMEout;`
496
497			`#0 begin`
498			`if (NEXT_TIMEout !== TIMEout) begin`
499			`$display("Error at time=%dns TIMEout=%b, expected=%b",`
500			`$time, TIMEout, NEXT_TIMEout);`
501			`$fdisplay(TX_FILE,"Error at time=%dns TIMEout=%b, expected=%b",`
502			`$time, TIMEout, NEXT_TIMEout);`
503			`TX_ERROR = TX_ERROR + 1;`
504			`end`
505			`end`
506			`endtask`
507
508			`task CHECK_CtrlFlg_o;`
509			`input [1:0] NEXT_CtrlFlg_o;`
510
511			`#0 begin`
512			`if (NEXT_CtrlFlg_o !== CtrlFlg_o) begin`
513			`$display("Error at time=%dns CtrlFlg_o=%b, expected=%b",`
514			`$time, CtrlFlg_o, NEXT_CtrlFlg_o);`
515			`$fdisplay(TX_FILE,"Error at time=%dns CtrlFlg_o=%b, expected=%b",`
516			`$time, CtrlFlg_o, NEXT_CtrlFlg_o);`
517			`TX_ERROR = TX_ERROR + 1;`
518			`end`
519			`end`
520			`endtask`
521
522			`task CHECK_TICK_OUT;`
523			`input NEXT_TICK_OUT;`
524
525			`#0 begin`
526			`if (NEXT_TICK_OUT !== TICK_OUT) begin`
527			`$display("Error at time=%dns TICK_OUT=%b, expected=%b",`
528			`$time, TICK_OUT, NEXT_TICK_OUT);`
529			`$fdisplay(TX_FILE,"Error at time=%dns TICK_OUT=%b, expected=%b",`
530			`$time, TICK_OUT, NEXT_TICK_OUT);`
531			`TX_ERROR = TX_ERROR + 1;`
532			`end`
533			`end`
534			`endtask`
535
536			`task CHECK_active;`
537			`input NEXT_active;`
538
539			`#0 begin`
540			`if (NEXT_active !== active) begin`
541			`$display("Error at time=%dns active=%b, expected=%b",`
542			`$time, active, NEXT_active);`
543			`$fdisplay(TX_FILE,"Error at time=%dns active=%b, expected=%b",`
544			`$time, active, NEXT_active);`
545			`TX_ERROR = TX_ERROR + 1;`
546			`end`
547			`end`
548			`endtask`
549
550			`endmodule`