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[/] [sparc64soc/] [trunk/] [T1-CPU/] [exu/] [sparc_exu_alu_16eql.v] - Blame information for rev 7

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1 2 dmitryr
// ========== Copyright Header Begin ==========================================
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// 
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// OpenSPARC T1 Processor File: sparc_exu_alu_16eql.v
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// Copyright (c) 2006 Sun Microsystems, Inc.  All Rights Reserved.
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// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES.
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// 
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// The above named program is free software; you can redistribute it and/or
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// modify it under the terms of the GNU General Public
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// License version 2 as published by the Free Software Foundation.
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// 
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// The above named program is distributed in the hope that it will be 
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// useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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// General Public License for more details.
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// 
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// You should have received a copy of the GNU General Public
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// License along with this work; if not, write to the Free Software
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// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
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// 
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// ========== Copyright Header End ============================================
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////////////////////////////////////////////////////////////////////////
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/*
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//  Module Name: sparc_exu_alu_16eql
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//      Description: Takes a 17 bit input and generates an active low output
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//                      signifying that all 17 bits have the same value.
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*/
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module sparc_exu_alu_16eql (/*AUTOARG*/
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   // Outputs
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   equal,
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   // Inputs
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   in
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   ) ;
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   input [16:0] in;
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   output       equal;
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   wire [15:0]  inxor;
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   wire [7:0]   nor1;
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   wire [1:0]   nand2;
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   assign inxor[0] = in[15] ^ in[14];
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   assign inxor[1] = in[14] ^ in[13];
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   assign inxor[2] = in[13] ^ in[12];
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   assign inxor[3] = in[12] ^ in[11];
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   assign inxor[4] = in[11] ^ in[10];
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   assign inxor[5] = in[10] ^ in[9];
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   assign inxor[6] = in[9] ^ in[8];
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   assign inxor[7] = in[8] ^ in[7];
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   assign inxor[8] = in[7] ^ in[6];
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   assign inxor[9] = in[6] ^ in[5];
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   assign inxor[10] = in[5] ^ in[4];
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   assign inxor[11] = in[4] ^ in[3];
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   assign inxor[12] = in[3] ^ in[2];
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   assign inxor[13] = in[2] ^ in[1];
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   assign inxor[14] = in[1] ^ in[0];
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   assign inxor[15] = in[16] ^ in[15];
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   assign nor1[0] = ~(inxor[15] | inxor[14]);
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   assign       nor1[1] = ~(inxor[1] | inxor[0]);
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   assign       nor1[2] = ~(inxor[3] | inxor[2]);
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   assign       nor1[3] = ~(inxor[5] | inxor[4]);
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   assign       nor1[4] = ~(inxor[7] | inxor[6]);
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   assign       nor1[5] = ~(inxor[9] | inxor[8]);
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   assign       nor1[6] = ~(inxor[11] | inxor[10]);
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   assign       nor1[7] = ~(inxor[13] | inxor[12]);
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   assign       nand2[0] = ~(nor1[1] & nor1[2] & nor1[3] & nor1[4]);
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   assign       nand2[1] = ~(nor1[5] & nor1[6] & nor1[7] & nor1[0]);
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   assign       equal = ~(nand2[1] | nand2[0]);
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endmodule // sparc_exu_div_32eql

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