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[/] [sparc64soc/] [trunk/] [T1-CPU/] [exu/] [sparc_exu_ecl_cnt6.v] - Blame information for rev 2

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1 2 dmitryr
// ========== Copyright Header Begin ==========================================
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// 
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// OpenSPARC T1 Processor File: sparc_exu_ecl_cnt6.v
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// Copyright (c) 2006 Sun Microsystems, Inc.  All Rights Reserved.
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// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES.
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// 
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// The above named program is free software; you can redistribute it and/or
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// modify it under the terms of the GNU General Public
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// License version 2 as published by the Free Software Foundation.
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// 
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// The above named program is distributed in the hope that it will be 
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// useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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// General Public License for more details.
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// 
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// You should have received a copy of the GNU General Public
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// License along with this work; if not, write to the Free Software
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// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
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// 
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// ========== Copyright Header End ============================================
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////////////////////////////////////////////////////////////////////////
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/*
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//  Module Name: sparc_exu_cnt6
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//      Description: 6 bit binary counter
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*/
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module sparc_exu_ecl_cnt6 (/*AUTOARG*/
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   // Outputs
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   cntr,
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   // Inputs
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   reset, clk, se
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   ) ;
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   input reset;
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   input clk;
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   input se;
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   output [5:0] cntr;
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   wire [5:0]   next_cntr;
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   wire         tog1;
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   wire         tog2;
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   wire         tog3;
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   wire         tog4;
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   wire         tog5;
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   assign       tog1 = cntr[0];
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   assign       tog2 = cntr[0] & cntr[1];
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   assign       tog3 = cntr[0] & cntr[1] & cntr[2];
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   assign       tog4 = cntr[0] & cntr[1] & cntr[2] & cntr[3];
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   assign       tog5 = cntr[0] & cntr[1] & cntr[2] & cntr[3] & cntr[4];
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   assign next_cntr[0] = ~reset & ~cntr[0];
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   assign next_cntr[1] = ~reset & ((~cntr[1] & tog1) | (cntr[1] & ~tog1));
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   assign next_cntr[2] = ~reset & ((~cntr[2] & tog2) | (cntr[2] & ~tog2));
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   assign next_cntr[3] = ~reset & ((~cntr[3] & tog3) | (cntr[3] & ~tog3));
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   assign next_cntr[4] = ~reset & ((~cntr[4] & tog4) | (cntr[4] & ~tog4));
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   assign next_cntr[5] = ~reset & ((~cntr[5] & tog5) | (cntr[5] & ~tog5));
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   // counter flop
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   dff_s #(6) cntr_dff(.din(next_cntr[5:0]), .clk(clk), .q(cntr[5:0]), .se(se), .si(), .so());
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endmodule // sparc_exu_ecl_cnt6

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