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[/] [sparc64soc/] [trunk/] [T1-CPU/] [ffu/] [sparc_ffu_part_add32.v] - Blame information for rev 2

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1 2 dmitryr
// ========== Copyright Header Begin ==========================================
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// 
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// OpenSPARC T1 Processor File: sparc_ffu_part_add32.v
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// Copyright (c) 2006 Sun Microsystems, Inc.  All Rights Reserved.
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// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES.
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// 
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// The above named program is free software; you can redistribute it and/or
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// modify it under the terms of the GNU General Public
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// License version 2 as published by the Free Software Foundation.
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// 
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// The above named program is distributed in the hope that it will be 
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// useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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// General Public License for more details.
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// 
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// You should have received a copy of the GNU General Public
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// License along with this work; if not, write to the Free Software
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// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
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// 
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// ========== Copyright Header End ============================================
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///////////////////////////////////////////////////////////////////////
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/*
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//  Module Name: sparc_ffu_part_add32
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//      Description: This is the ffu VIS adder.  It can do either
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//                              2 16 bit adds or 1 32 bit add.
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*/
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module sparc_ffu_part_add32 (/*AUTOARG*/
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   // Outputs
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   z,
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   // Inputs
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   a, b, cin, add32
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   ) ;
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   input [31:0] a;
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   input [31:0] b;
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   input        cin;
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   input        add32;
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   output [31:0] z;
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   wire          cout15; // carry out from lower 16 bit add
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   wire          cin16; // carry in to the upper 16 bit add
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   assign        cin16 = (add32)? cout15: cin;
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   assign      {cout15, z[15:0]} = a[15:0]+b[15:0]+{15'b0,cin};
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   assign      z[31:16] = a[31:16]+b[31:16]+{15'b0,cin16};
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endmodule // sparc_ffu_part_add32

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